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1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py2# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m3 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,M33# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m4 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,M44# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m5 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,M55 6fmov d31, #1.000000007fdiv d30, d31, d308 9# Newton series for 1 / x.10frecpe d1, d011frecps d2, d0, d112fmul d1, d1, d213frecps d2, d0, d114fmul d1, d1, d215frecps d0, d0, d116fmul d0, d1, d017 18# ALL: Iterations: 10019# ALL-NEXT: Instructions: 90020 21# M3-NEXT: Total Cycles: 250322# M4-NEXT: Total Cycles: 240323# M5-NEXT: Total Cycles: 240324 25# ALL-NEXT: Total uOps: 90026 27# ALL: Dispatch Width: 628 29# M3-NEXT: uOps Per Cycle: 0.3630# M3-NEXT: IPC: 0.3631# M3-NEXT: Block RThroughput: 3.332 33# M4-NEXT: uOps Per Cycle: 0.3734# M4-NEXT: IPC: 0.3735# M4-NEXT: Block RThroughput: 2.336 37# M5-NEXT: uOps Per Cycle: 0.3738# M5-NEXT: IPC: 0.3739# M5-NEXT: Block RThroughput: 2.340 41# ALL: Instruction Info:42# ALL-NEXT: [1]: #uOps43# ALL-NEXT: [2]: Latency44# ALL-NEXT: [3]: RThroughput45# ALL-NEXT: [4]: MayLoad46# ALL-NEXT: [5]: MayStore47# ALL-NEXT: [6]: HasSideEffects (U)48 49# ALL: [1] [2] [3] [4] [5] [6] Instructions:50# ALL-NEXT: 1 1 0.33 fmov d31, #1.0000000051 52# M3-NEXT: 1 12 3.25 fdiv d30, d31, d3053# M3-NEXT: 1 4 0.50 frecpe d1, d054 55# M4-NEXT: 1 12 2.25 fdiv d30, d31, d3056# M4-NEXT: 1 3 0.50 frecpe d1, d057 58# M5-NEXT: 1 12 2.25 fdiv d30, d31, d3059# M5-NEXT: 1 3 0.50 frecpe d1, d060 61# ALL-NEXT: 1 4 0.33 frecps d2, d0, d162# ALL-NEXT: 1 3 0.33 fmul d1, d1, d263# ALL-NEXT: 1 4 0.33 frecps d2, d0, d164# ALL-NEXT: 1 3 0.33 fmul d1, d1, d265# ALL-NEXT: 1 4 0.33 frecps d0, d0, d166# ALL-NEXT: 1 3 0.33 fmul d0, d1, d067