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1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py2# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m3 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM33# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m4 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM44# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m5 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM55 6 sub w0, w1, w2, sxtb #07 add x3, x4, w5, sxth #18 subs x6, x7, w8, uxtw #29 adds x9, x10, x11, uxtx #310 sub w12, w13, w14, uxtb #011 add x15, x16, w17, uxth #112 subs x18, x19, w20, sxtw #213 adds x21, x22, x23, sxtx #314 15# ALL: Iterations: 10016# ALL-NEXT: Instructions: 80017 18# EM3-NEXT: Total Cycles: 30419# EM4-NEXT: Total Cycles: 30420# EM5-NEXT: Total Cycles: 25421 22# ALL-NEXT: Total uOps: 80023 24# EM3: Dispatch Width: 625# EM3-NEXT: uOps Per Cycle: 2.6326# EM3-NEXT: IPC: 2.6327# EM3-NEXT: Block RThroughput: 3.028 29# EM4: Dispatch Width: 630# EM4-NEXT: uOps Per Cycle: 2.6331# EM4-NEXT: IPC: 2.6332# EM4-NEXT: Block RThroughput: 3.033 34# EM5: Dispatch Width: 635# EM5-NEXT: uOps Per Cycle: 3.1536# EM5-NEXT: IPC: 3.1537# EM5-NEXT: Block RThroughput: 2.538 39# ALL: Instruction Info:40# ALL-NEXT: [1]: #uOps41# ALL-NEXT: [2]: Latency42# ALL-NEXT: [3]: RThroughput43# ALL-NEXT: [4]: MayLoad44# ALL-NEXT: [5]: MayStore45# ALL-NEXT: [6]: HasSideEffects (U)46 47# ALL: [1] [2] [3] [4] [5] [6] Instructions:48 49# EM3-NEXT: 1 1 0.25 sub w0, w1, w2, sxtb50# EM3-NEXT: 1 2 0.50 add x3, x4, w5, sxth #151# EM3-NEXT: 1 1 0.25 subs x6, x7, w8, uxtw #252# EM3-NEXT: 1 1 0.25 adds x9, x10, x11, uxtx #353# EM3-NEXT: 1 1 0.25 sub w12, w13, w14, uxtb54# EM3-NEXT: 1 2 0.50 add x15, x16, w17, uxth #155# EM3-NEXT: 1 2 0.50 subs x18, x19, w20, sxtw #256# EM3-NEXT: 1 2 0.50 adds x21, x22, x23, sxtx #357 58# EM4-NEXT: 1 1 0.25 sub w0, w1, w2, sxtb59# EM4-NEXT: 1 2 0.50 add x3, x4, w5, sxth #160# EM4-NEXT: 1 1 0.25 subs x6, x7, w8, uxtw #261# EM4-NEXT: 1 1 0.25 adds x9, x10, x11, uxtx #362# EM4-NEXT: 1 1 0.25 sub w12, w13, w14, uxtb63# EM4-NEXT: 1 2 0.50 add x15, x16, w17, uxth #164# EM4-NEXT: 1 2 0.50 subs x18, x19, w20, sxtw #265# EM4-NEXT: 1 2 0.50 adds x21, x22, x23, sxtx #366 67# EM5-NEXT: 1 1 0.17 sub w0, w1, w2, sxtb68# EM5-NEXT: 1 2 0.50 add x3, x4, w5, sxth #169# EM5-NEXT: 1 1 0.25 subs x6, x7, w8, uxtw #270# EM5-NEXT: 1 1 0.25 adds x9, x10, x11, uxtx #371# EM5-NEXT: 1 1 0.17 sub w12, w13, w14, uxtb72# EM5-NEXT: 1 2 0.50 add x15, x16, w17, uxth #173# EM5-NEXT: 1 2 0.50 subs x18, x19, w20, sxtw #274# EM5-NEXT: 1 2 0.50 adds x21, x22, x23, sxtx #375