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1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py2# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m3 -resource-pressure=false -noalias=false < %s | FileCheck %s -check-prefixes=ALL,M33# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m4 -resource-pressure=false -noalias=false < %s | FileCheck %s -check-prefixes=ALL,M44# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m5 -resource-pressure=false -noalias=false < %s | FileCheck %s -check-prefixes=ALL,M55 6stur d0, [sp, #2]7stur q0, [sp, #16]8 9str b0, [sp], #110str q0, [sp], #1611 12str h0, [sp, #2]!13str q0, [sp, #16]!14 15str s0, [sp, #4]16str q0, [sp, #16]17 18str d0, [sp, x0, lsl #3]19str q0, [sp, x0, lsl #4]20 21str b0, [sp, x0]22str q0, [sp, x0]23 24str h0, [sp, w0, sxtw #1]25str q0, [sp, w0, uxtw #4]26 27str s0, [sp, w0, sxtw]28str q0, [sp, w0, uxtw]29 30stp d0, d1, [sp], #1631stp q0, q1, [sp], #3232 33stp s0, s1, [sp, #8]!34stp q0, q1, [sp, #32]!35 36stp d0, d1, [sp, #16]37stp q0, q1, [sp, #32]38 39# ALL: Iterations: 10040# ALL-NEXT: Instructions: 220041 42# M3-NEXT: Total Cycles: 320343# M3-NEXT: Total uOps: 290044 45# M4-NEXT: Total Cycles: 320346# M4-NEXT: Total uOps: 300047 48# M5-NEXT: Total Cycles: 280349# M5-NEXT: Total uOps: 250050 51# ALL: Dispatch Width: 652 53# M3-NEXT: uOps Per Cycle: 0.9154# M3-NEXT: IPC: 0.6955# M3-NEXT: Block RThroughput: 22.056 57# M4-NEXT: uOps Per Cycle: 0.9458# M4-NEXT: IPC: 0.6959# M4-NEXT: Block RThroughput: 12.560 61# M5-NEXT: uOps Per Cycle: 0.8962# M5-NEXT: IPC: 0.7863# M5-NEXT: Block RThroughput: 11.064 65# ALL: Instruction Info:66# ALL-NEXT: [1]: #uOps67# ALL-NEXT: [2]: Latency68# ALL-NEXT: [3]: RThroughput69# ALL-NEXT: [4]: MayLoad70# ALL-NEXT: [5]: MayStore71# ALL-NEXT: [6]: HasSideEffects (U)72 73# ALL: [1] [2] [3] [4] [5] [6] Instructions:74 75# M3-NEXT: 1 1 1.00 * stur d0, [sp, #2]76# M3-NEXT: 1 1 1.00 * stur q0, [sp, #16]77# M3-NEXT: 1 1 1.00 * str b0, [sp], #178# M3-NEXT: 1 1 1.00 * str q0, [sp], #1679# M3-NEXT: 1 1 1.00 * str h0, [sp, #2]!80# M3-NEXT: 1 1 1.00 * str q0, [sp, #16]!81# M3-NEXT: 1 1 1.00 * str s0, [sp, #4]82# M3-NEXT: 1 1 1.00 * str q0, [sp, #16]83# M3-NEXT: 1 1 1.00 * str d0, [sp, x0, lsl #3]84# M3-NEXT: 2 3 1.00 * str q0, [sp, x0, lsl #4]85# M3-NEXT: 1 1 1.00 * str b0, [sp, x0]86# M3-NEXT: 1 1 1.00 * str q0, [sp, x0]87# M3-NEXT: 2 3 1.00 * str h0, [sp, w0, sxtw #1]88# M3-NEXT: 2 3 1.00 * str q0, [sp, w0, uxtw #4]89# M3-NEXT: 2 3 1.00 * str s0, [sp, w0, sxtw]90# M3-NEXT: 2 3 1.00 * str q0, [sp, w0, uxtw]91# M3-NEXT: 1 1 1.00 * stp d0, d1, [sp], #1692# M3-NEXT: 2 1 1.00 * stp q0, q1, [sp], #3293# M3-NEXT: 1 1 1.00 * stp s0, s1, [sp, #8]!94# M3-NEXT: 2 1 1.00 * stp q0, q1, [sp, #32]!95# M3-NEXT: 1 1 1.00 * stp d0, d1, [sp, #16]96# M3-NEXT: 1 1 1.00 * stp q0, q1, [sp, #32]97 98# M4-NEXT: 1 1 0.50 * stur d0, [sp, #2]99# M4-NEXT: 1 1 0.50 * stur q0, [sp, #16]100# M4-NEXT: 1 1 0.50 * str b0, [sp], #1101# M4-NEXT: 1 1 0.50 * str q0, [sp], #16102# M4-NEXT: 1 1 0.50 * str h0, [sp, #2]!103# M4-NEXT: 1 1 0.50 * str q0, [sp, #16]!104# M4-NEXT: 1 1 0.50 * str s0, [sp, #4]105# M4-NEXT: 1 1 0.50 * str q0, [sp, #16]106# M4-NEXT: 1 1 0.50 * str d0, [sp, x0, lsl #3]107# M4-NEXT: 2 3 0.50 * str q0, [sp, x0, lsl #4]108# M4-NEXT: 1 1 0.50 * str b0, [sp, x0]109# M4-NEXT: 1 1 0.50 * str q0, [sp, x0]110# M4-NEXT: 2 3 0.50 * str h0, [sp, w0, sxtw #1]111# M4-NEXT: 2 3 0.50 * str q0, [sp, w0, uxtw #4]112# M4-NEXT: 2 3 0.50 * str s0, [sp, w0, sxtw]113# M4-NEXT: 2 3 0.50 * str q0, [sp, w0, uxtw]114# M4-NEXT: 1 1 0.50 * stp d0, d1, [sp], #16115# M4-NEXT: 2 1 1.00 * stp q0, q1, [sp], #32116# M4-NEXT: 1 1 0.50 * stp s0, s1, [sp, #8]!117# M4-NEXT: 2 1 1.00 * stp q0, q1, [sp, #32]!118# M4-NEXT: 1 1 0.50 * stp d0, d1, [sp, #16]119# M4-NEXT: 2 1 1.00 * stp q0, q1, [sp, #32]120 121# M5-NEXT: 1 1 0.50 * stur d0, [sp, #2]122# M5-NEXT: 1 1 0.50 * stur q0, [sp, #16]123# M5-NEXT: 1 1 0.50 * str b0, [sp], #1124# M5-NEXT: 1 1 0.50 * str q0, [sp], #16125# M5-NEXT: 1 1 0.50 * str h0, [sp, #2]!126# M5-NEXT: 1 1 0.50 * str q0, [sp, #16]!127# M5-NEXT: 1 1 0.50 * str s0, [sp, #4]128# M5-NEXT: 1 1 0.50 * str q0, [sp, #16]129# M5-NEXT: 1 1 0.50 * str d0, [sp, x0, lsl #3]130# M5-NEXT: 2 3 0.50 * str q0, [sp, x0, lsl #4]131# M5-NEXT: 1 1 0.50 * str b0, [sp, x0]132# M5-NEXT: 1 1 0.50 * str q0, [sp, x0]133# M5-NEXT: 1 1 0.50 * str h0, [sp, w0, sxtw #1]134# M5-NEXT: 2 3 0.50 * str q0, [sp, w0, uxtw #4]135# M5-NEXT: 1 1 0.50 * str s0, [sp, w0, sxtw]136# M5-NEXT: 2 3 0.50 * str q0, [sp, w0, uxtw]137# M5-NEXT: 1 1 0.50 * stp d0, d1, [sp], #16138# M5-NEXT: 1 1 1.00 * stp q0, q1, [sp], #32139# M5-NEXT: 1 1 0.50 * stp s0, s1, [sp, #8]!140# M5-NEXT: 1 1 1.00 * stp q0, q1, [sp, #32]!141# M5-NEXT: 1 1 0.50 * stp d0, d1, [sp, #16]142# M5-NEXT: 1 1 1.00 * stp q0, q1, [sp, #32]143