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1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py2# RUN: llvm-mca -mtriple=aarch64 -mcpu=neoverse-n3 -mattr=+sve --instruction-info=0 --resource-pressure=0 --timeline --timeline-max-iterations=2 < %s | FileCheck %s3 4# LLVM-MCA-BEGIN madd5mul x0, x0, x06madd x0, x1, x2, x07madd x0, x1, x2, x08madd x0, x0, x0, x09# LLVM-MCA-END10 11# LLVM-MCA-BEGIN smaddl12mul x0, x0, x013smaddl x0, w1, w2, x014smaddl x0, w1, w2, x015smaddl x0, w0, w0, x016# LLVM-MCA-END17 18# LLVM-MCA-BEGIN fmadd19fadd d0, d0, d020fmadd d0, d1, d2, d021fmul d0, d0, d022fmadd d0, d1, d2, d023fmadd d0, d1, d2, d024fmadd d0, d0, d1, d225# LLVM-MCA-END26 27# LLVM-MCA-BEGIN saba28mul v0.4s, v0.4s, v0.4s29saba v0.4s, v1.4s, v2.4s30saba v0.4s, v1.4s, v2.4s31saba v0.4s, v0.4s, v1.4s32# LLVM-MCA-END33 34# LLVM-MCA-BEGIN sdot35mul v0.4s, v0.4s, v0.4s36sdot v0.4s, v1.16b, v2.16b37sdot v0.4s, v1.16b, v2.16b38sdot v0.4s, v0.16b, v1.16b39# LLVM-MCA-END40 41# LLVM-MCA-BEGIN smmla42mul v0.4s, v0.4s, v0.4s43smmla v0.4s, v1.16b, v2.16b44smmla v0.4s, v1.16b, v2.16b45smmla v0.4s, v0.16b, v1.16b46# LLVM-MCA-END47 48# LLVM-MCA-BEGIN mla49mul v0.4s, v0.4s, v0.4s50mla v0.4s, v1.4s, v2.4s51mla v0.4s, v1.4s, v2.4s52mla v0.4s, v0.4s, v1.4s53# LLVM-MCA-END54 55# LLVM-MCA-BEGIN sqrdmlah56mul v0.4s, v0.4s, v0.4s57sqrdmlah v0.8h, v1.8h, v2.8h58sqrdmlah v0.8h, v1.8h, v2.8h59sqrdmlah v0.8h, v1.8h, v2.8h60# LLVM-MCA-END61 62# LLVM-MCA-BEGIN smlal263mul v0.4s, v0.4s, v0.4s64smlal2 v0.4s, v1.8h, v2.8h65smlal2 v0.4s, v1.8h, v2.8h66smlal2 v0.4s, v0.8h, v1.8h67# LLVM-MCA-END68 69# LLVM-MCA-BEGIN sqdmlal270mul v0.4s, v0.4s, v0.4s71sqdmlal2 v0.4s, v1.8h, v2.8h72sqdmlal2 v0.4s, v1.8h, v2.8h73sqdmlal2 v0.4s, v1.8h, v2.8h74# LLVM-MCA-END75 76# LLVM-MCA-BEGIN sadalp77mul v0.4s, v0.4s, v0.4s78sadalp v0.2d, v1.4s79sadalp v0.2d, v1.4s80sadalp v0.2d, v0.4s81# LLVM-MCA-END82 83# LLVM-MCA-BEGIN fcmla84fmul v0.4s, v0.4s, v0.4s85fcmla v0.2d, v1.2d, v2.2d, #9086fcmla v0.2d, v1.2d, v2.2d, #9087fcmla v0.2d, v0.2d, v1.2d, #9088# LLVM-MCA-END89 90# LLVM-MCA-BEGIN fmla91fmul v0.2d, v0.2d, v0.2d92fmla v0.2d, v1.2d, v2.2d93fadd v0.2d, v0.2d, v0.2d94fmla v0.2d, v1.2d, v2.2d95fmla v0.2d, v1.2d, v2.2d96fmla v0.2d, v0.2d, v1.2d97# LLVM-MCA-END98 99# LLVM-MCA-BEGIN fmlal100fmul v0.2d, v0.2d, v0.2d101fmlal v0.4s, v1.4h, v2.4h102fadd v0.2d, v0.2d, v0.2d103fmlal v0.4s, v1.4h, v2.4h104fmlal v0.4s, v1.4h, v2.4h105fmlal v0.4s, v0.4h, v1.4h106# LLVM-MCA-END107 108# LLVM-MCA-BEGIN bfdot109fmul v0.2d, v0.2d, v0.2d110bfdot v0.4s, v1.8h, v2.8h111bfdot v0.4s, v1.8h, v2.8h112bfdot v0.4s, v0.8h, v1.8h113# LLVM-MCA-END114 115# LLVM-MCA-BEGIN bfmmla116fmul v0.2d, v0.2d, v0.2d117bfmmla v0.4s, v1.8h, v2.8h118bfmmla v0.4s, v1.8h, v2.8h119bfmmla v0.4s, v0.8h, v1.8h120# LLVM-MCA-END121 122# LLVM-MCA-BEGIN bfmlalb123fmul v0.2d, v0.2d, v0.2d124bfmlalb v0.4s, v1.8h, v2.8h125bfmlalb v0.4s, v1.8h, v2.8h126bfmlalb v0.4s, v0.8h, v1.8h127# LLVM-MCA-END128 129# LLVM-MCA-BEGIN crc32130mul w0, w0, w0131crc32cb w0, w0, w1132crc32cb w0, w0, w1133crc32cb w0, w0, w0134crc32b w0, w0, w15135crc32h w0, w0, w21136crc32w w0, w0, w24137crc32x w0, w0, x25138crc32ch w0, w0, w16139crc32cw w0, w0, w23140crc32cx w0, w0, x5141# LLVM-MCA-END142 143# LLVM-MCA-BEGIN Z saba144mul z0.d, z0.d, z0.d145saba z0.d, z1.d, z2.d146saba z0.d, z1.d, z2.d147saba z0.d, z0.d, z1.d148# LLVM-MCA-END149 150# LLVM-MCA-BEGIN Z sabalt151mul z0.h, z0.h, z0.h152sabalt z0.h, z1.b, z2.b153sabalt z0.h, z1.b, z2.b154sabalt z0.h, z0.b, z1.b155# LLVM-MCA-END156 157# LLVM-MCA-BEGIN Z sadalp158mul z0.d, z0.d, z0.d159sadalp z0.d, p0/m, z1.s160sadalp z0.d, p0/m, z1.s161sadalp z0.d, p0/m, z0.s162# LLVM-MCA-END163 164# LLVM-MCA-BEGIN Z ssra165mul z0.d, z0.d, z0.d166ssra z0.d, z1.d, #1167ssra z0.d, z1.d, #1168ssra z0.d, z0.d, #1169# LLVM-MCA-END170 171# LLVM-MCA-BEGIN Z cdot.s172mul z0.d, z0.d, z0.d173cdot z0.s, z1.b, z2.b, #90174cdot z0.s, z1.b, z2.b, #90175cdot z0.s, z0.b, z1.b, #90176# LLVM-MCA-END177 178# LLVM-MCA-BEGIN Z cdot.d179mul z0.d, z0.d, z0.d180cdot z0.d, z1.h, z2.h, #90181cdot z0.d, z1.h, z2.h, #90182cdot z0.d, z0.h, z1.h, #90183# LLVM-MCA-END184 185# LLVM-MCA-BEGIN Z cmla.b186mul z0.d, z0.d, z0.d187cmla z0.b, z1.b, z2.b, #90188cmla z0.b, z1.b, z2.b, #90189cmla z0.b, z0.b, z1.b, #90190# LLVM-MCA-END191 192# LLVM-MCA-BEGIN Z cmla.d193mul z0.d, z0.d, z0.d194cmla z0.d, z1.d, z2.d, #90195cmla z0.d, z1.d, z2.d, #90196cmla z0.d, z0.d, z1.d, #90197# LLVM-MCA-END198 199# LLVM-MCA-BEGIN Z sdot.s200mul z0.d, p0/m, z0.d, z0.d201sdot z0.s, z1.b, z2.b202sdot z0.s, z1.b, z2.b203sdot z0.s, z0.b, z1.b204# LLVM-MCA-END205 206# LLVM-MCA-BEGIN Z sudot207mul z0.d, p0/m, z0.d, z0.d208sdot z0.s, z1.b, z2.b[1]209sdot z0.s, z1.b, z2.b[1]210sdot z0.s, z0.b, z1.b[1]211# LLVM-MCA-END212 213# LLVM-MCA-BEGIN Z sdot.d214mul z0.d, z0.d, z0.d215sdot z0.d, z1.h, z2.h216sdot z0.d, z1.h, z2.h217sdot z0.d, z0.h, z1.h218# LLVM-MCA-END219 220# LLVM-MCA-BEGIN Z smmla221mul z0.s, z0.s, z0.s222smmla z0.s, z1.b, z2.b223smmla z0.s, z1.b, z2.b224smmla z0.s, z0.b, z1.b225# LLVM-MCA-END226 227# LLVM-MCA-BEGIN Z mla.b228mul z0.d, z0.d, z0.d229mla z0.b, p0/m, z1.b, z2.b230mla z0.b, p0/m, z1.b, z2.b231mla z0.b, p0/m, z0.b, z1.b232# LLVM-MCA-END233 234# LLVM-MCA-BEGIN Z mla.d235mul z0.d, z0.d, z0.d236mla z0.d, p0/m, z1.d, z2.d237mla z0.d, p0/m, z1.d, z2.d238mla z0.d, p0/m, z0.d, z1.d239# LLVM-MCA-END240 241# LLVM-MCA-BEGIN Z smlalb242mul z0.d, z0.d, z0.d243smlalb z0.d, z1.s, z2.s244smlalb z0.d, z1.s, z2.s245smlalb z0.d, z0.s, z1.s246# LLVM-MCA-END247 248# LLVM-MCA-BEGIN Z sqdmlalb249mul z0.d, z0.d, z0.d250sqdmlalb z0.d, z1.s, z2.s251sqdmlalb z0.d, z1.s, z2.s252sqdmlalb z0.d, z0.s, z1.s253# LLVM-MCA-END254 255# LLVM-MCA-BEGIN Z sqrdmlah.b256mul z0.d, z0.d, z0.d257sqrdmlah z0.b, z1.b, z2.b258sqrdmlah z0.b, z1.b, z2.b259sqrdmlah z0.b, z0.b, z1.b260# LLVM-MCA-END261 262# LLVM-MCA-BEGIN Z sqrdmlah.d263mul z0.d, z0.d, z0.d264sqrdmlah z0.d, z1.d, z2.d265sqrdmlah z0.d, z1.d, z2.d266sqrdmlah z0.d, z0.d, z1.d267# LLVM-MCA-END268 269# LLVM-MCA-BEGIN Z fcmla ZPmZZ270fmul z0.d, z0.d, z0.d271fcmla z0.d, p0/m, z1.d, z2.d, 90272fcmla z0.d, p0/m, z1.d, z2.d, 90273fcmla z0.d, p0/m, z0.d, z1.d, 90274# LLVM-MCA-END275 276# LLVM-MCA-BEGIN Z fcmla ZZZI277fmul z0.d, z0.d, z0.d278fcmla z0.s, z1.s, z2.s[1], 90279fcmla z0.s, z1.s, z2.s[1], 90280fcmla z0.s, z0.s, z1.s[1], 90281# LLVM-MCA-END282 283# LLVM-MCA-BEGIN Z fmla ZPmZZ284fmul z0.d, z0.d, z0.d285fmla z0.d, p0/m, z1.d, z2.d286fmla z0.d, p0/m, z1.d, z2.d287fmla z0.d, p0/m, z0.d, z1.d288# LLVM-MCA-END289 290# LLVM-MCA-BEGIN Z fmla ZZZI291fmul z0.d, z0.d, z0.d292fmla z0.d, z1.d, z2.d[1]293fmla z0.d, z1.d, z2.d[1]294fmla z0.d, z0.d, z1.d[1]295# LLVM-MCA-END296 297# LLVM-MCA-BEGIN Z fmlalb ZZZ298fmul z0.d, z0.d, z0.d299fmlalb z0.s, z1.h, z2.h300fmlalb z0.s, z1.h, z2.h301fmlalb z0.s, z0.h, z1.h302# LLVM-MCA-END303 304# LLVM-MCA-BEGIN Z bfdot305fmul z0.d, z0.d, z0.d306bfdot z0.s, z1.h, z2.h307bfdot z0.s, z1.h, z2.h308bfdot z0.s, z0.h, z1.h309# LLVM-MCA-END310 311# LLVM-MCA-BEGIN Z bfmmla312fmul z0.d, z0.d, z0.d313bfmmla z0.s, z1.h, z2.h314bfmmla z0.s, z1.h, z2.h315bfmmla z0.s, z0.h, z1.h316# LLVM-MCA-END317 318# LLVM-MCA-BEGIN bfmlalb319fmul z0.d, z0.d, z0.d320bfmlalb z0.s, z1.h, z2.h321bfmlalb z0.s, z1.h, z2.h322bfmlalb z0.s, z0.h, z1.h323# LLVM-MCA-END324 325# CHECK: [0] Code Region - madd326 327# CHECK: Iterations: 100328# CHECK-NEXT: Instructions: 400329# CHECK-NEXT: Total Cycles: 703330# CHECK-NEXT: Total uOps: 400331 332# CHECK: Dispatch Width: 5333# CHECK-NEXT: uOps Per Cycle: 0.57334# CHECK-NEXT: IPC: 0.57335# CHECK-NEXT: Block RThroughput: 3.0336 337# CHECK: Timeline view:338# CHECK-NEXT: 0123456339# CHECK-NEXT: Index 0123456789340 341# CHECK: [0,0] DeeER. . .. mul x0, x0, x0342# CHECK-NEXT: [0,1] D==eeER . .. madd x0, x1, x2, x0343# CHECK-NEXT: [0,2] D===eeER . .. madd x0, x1, x2, x0344# CHECK-NEXT: [0,3] D=====eeER. .. madd x0, x0, x0, x0345# CHECK-NEXT: [1,0] D=======eeER .. mul x0, x0, x0346# CHECK-NEXT: [1,1] .D========eeER .. madd x0, x1, x2, x0347# CHECK-NEXT: [1,2] .D=========eeER.. madd x0, x1, x2, x0348# CHECK-NEXT: [1,3] .D===========eeER madd x0, x0, x0, x0349 350# CHECK: Average Wait times (based on the timeline view):351# CHECK-NEXT: [0]: Executions352# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue353# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready354# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage355 356# CHECK: [0] [1] [2] [3]357# CHECK-NEXT: 0. 2 4.5 0.5 0.0 mul x0, x0, x0358# CHECK-NEXT: 1. 2 6.0 0.0 0.0 madd x0, x1, x2, x0359# CHECK-NEXT: 2. 2 7.0 0.0 0.0 madd x0, x1, x2, x0360# CHECK-NEXT: 3. 2 9.0 0.0 0.0 madd x0, x0, x0, x0361# CHECK-NEXT: 2 6.6 0.1 0.0 <total>362 363# CHECK: [1] Code Region - smaddl364 365# CHECK: Iterations: 100366# CHECK-NEXT: Instructions: 400367# CHECK-NEXT: Total Cycles: 703368# CHECK-NEXT: Total uOps: 400369 370# CHECK: Dispatch Width: 5371# CHECK-NEXT: uOps Per Cycle: 0.57372# CHECK-NEXT: IPC: 0.57373# CHECK-NEXT: Block RThroughput: 3.0374 375# CHECK: Timeline view:376# CHECK-NEXT: 0123456377# CHECK-NEXT: Index 0123456789378 379# CHECK: [0,0] DeeER. . .. mul x0, x0, x0380# CHECK-NEXT: [0,1] D==eeER . .. smaddl x0, w1, w2, x0381# CHECK-NEXT: [0,2] D===eeER . .. smaddl x0, w1, w2, x0382# CHECK-NEXT: [0,3] D=====eeER. .. smaddl x0, w0, w0, x0383# CHECK-NEXT: [1,0] D=======eeER .. mul x0, x0, x0384# CHECK-NEXT: [1,1] .D========eeER .. smaddl x0, w1, w2, x0385# CHECK-NEXT: [1,2] .D=========eeER.. smaddl x0, w1, w2, x0386# CHECK-NEXT: [1,3] .D===========eeER smaddl x0, w0, w0, x0387 388# CHECK: Average Wait times (based on the timeline view):389# CHECK-NEXT: [0]: Executions390# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue391# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready392# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage393 394# CHECK: [0] [1] [2] [3]395# CHECK-NEXT: 0. 2 4.5 0.5 0.0 mul x0, x0, x0396# CHECK-NEXT: 1. 2 6.0 0.0 0.0 smaddl x0, w1, w2, x0397# CHECK-NEXT: 2. 2 7.0 0.0 0.0 smaddl x0, w1, w2, x0398# CHECK-NEXT: 3. 2 9.0 0.0 0.0 smaddl x0, w0, w0, x0399# CHECK-NEXT: 2 6.6 0.1 0.0 <total>400 401# CHECK: [2] Code Region - fmadd402 403# CHECK: Iterations: 100404# CHECK-NEXT: Instructions: 600405# CHECK-NEXT: Total Cycles: 1703406# CHECK-NEXT: Total uOps: 600407 408# CHECK: Dispatch Width: 5409# CHECK-NEXT: uOps Per Cycle: 0.35410# CHECK-NEXT: IPC: 0.35411# CHECK-NEXT: Block RThroughput: 3.0412 413# CHECK: Timeline view:414# CHECK-NEXT: 0123456789 0123456415# CHECK-NEXT: Index 0123456789 0123456789416 417# CHECK: [0,0] DeeER. . . . . . .. fadd d0, d0, d0418# CHECK-NEXT: [0,1] D==eeeeER . . . . . .. fmadd d0, d1, d2, d0419# CHECK-NEXT: [0,2] D======eeeER . . . . .. fmul d0, d0, d0420# CHECK-NEXT: [0,3] D=======eeeeER . . . . .. fmadd d0, d1, d2, d0421# CHECK-NEXT: [0,4] D=========eeeeER . . . .. fmadd d0, d1, d2, d0422# CHECK-NEXT: [0,5] .D============eeeeER. . . .. fmadd d0, d0, d1, d2423# CHECK-NEXT: [1,0] .D================eeER . . .. fadd d0, d0, d0424# CHECK-NEXT: [1,1] .D==================eeeeER . .. fmadd d0, d1, d2, d0425# CHECK-NEXT: [1,2] .D======================eeeER . .. fmul d0, d0, d0426# CHECK-NEXT: [1,3] .D=======================eeeeER .. fmadd d0, d1, d2, d0427# CHECK-NEXT: [1,4] . D========================eeeeER .. fmadd d0, d1, d2, d0428# CHECK-NEXT: [1,5] . D============================eeeeER fmadd d0, d0, d1, d2429 430# CHECK: Average Wait times (based on the timeline view):431# CHECK-NEXT: [0]: Executions432# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue433# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready434# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage435 436# CHECK: [0] [1] [2] [3]437# CHECK-NEXT: 0. 2 9.0 0.5 0.0 fadd d0, d0, d0438# CHECK-NEXT: 1. 2 11.0 0.0 0.0 fmadd d0, d1, d2, d0439# CHECK-NEXT: 2. 2 15.0 0.0 0.0 fmul d0, d0, d0440# CHECK-NEXT: 3. 2 16.0 0.0 0.0 fmadd d0, d1, d2, d0441# CHECK-NEXT: 4. 2 17.5 0.0 0.0 fmadd d0, d1, d2, d0442# CHECK-NEXT: 5. 2 21.0 0.0 0.0 fmadd d0, d0, d1, d2443# CHECK-NEXT: 2 14.9 0.1 0.0 <total>444 445# CHECK: [3] Code Region - saba446 447# CHECK: Iterations: 100448# CHECK-NEXT: Instructions: 400449# CHECK-NEXT: Total Cycles: 1303450# CHECK-NEXT: Total uOps: 400451 452# CHECK: Dispatch Width: 5453# CHECK-NEXT: uOps Per Cycle: 0.31454# CHECK-NEXT: IPC: 0.31455# CHECK-NEXT: Block RThroughput: 3.0456 457# CHECK: Timeline view:458# CHECK-NEXT: 0123456789459# CHECK-NEXT: Index 0123456789 012345678460 461# CHECK: [0,0] DeeeeER . . . . . mul v0.4s, v0.4s, v0.4s462# CHECK-NEXT: [0,1] D====eeeeER . . . . saba v0.4s, v1.4s, v2.4s463# CHECK-NEXT: [0,2] D=====eeeeER . . . . saba v0.4s, v1.4s, v2.4s464# CHECK-NEXT: [0,3] D=========eeeeER . . . saba v0.4s, v0.4s, v1.4s465# CHECK-NEXT: [1,0] D=============eeeeER. . . mul v0.4s, v0.4s, v0.4s466# CHECK-NEXT: [1,1] .D================eeeeER . . saba v0.4s, v1.4s, v2.4s467# CHECK-NEXT: [1,2] .D=================eeeeER. . saba v0.4s, v1.4s, v2.4s468# CHECK-NEXT: [1,3] .D=====================eeeeER saba v0.4s, v0.4s, v1.4s469 470# CHECK: Average Wait times (based on the timeline view):471# CHECK-NEXT: [0]: Executions472# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue473# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready474# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage475 476# CHECK: [0] [1] [2] [3]477# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s478# CHECK-NEXT: 1. 2 11.0 0.0 0.0 saba v0.4s, v1.4s, v2.4s479# CHECK-NEXT: 2. 2 12.0 0.0 0.0 saba v0.4s, v1.4s, v2.4s480# CHECK-NEXT: 3. 2 16.0 0.0 0.0 saba v0.4s, v0.4s, v1.4s481# CHECK-NEXT: 2 11.6 0.1 0.0 <total>482 483# CHECK: [4] Code Region - sdot484 485# CHECK: Iterations: 100486# CHECK-NEXT: Instructions: 400487# CHECK-NEXT: Total Cycles: 1103488# CHECK-NEXT: Total uOps: 400489 490# CHECK: Dispatch Width: 5491# CHECK-NEXT: uOps Per Cycle: 0.36492# CHECK-NEXT: IPC: 0.36493# CHECK-NEXT: Block RThroughput: 1.5494 495# CHECK: Timeline view:496# CHECK-NEXT: 0123456789497# CHECK-NEXT: Index 0123456789 01234498 499# CHECK: [0,0] DeeeeER . . . . mul v0.4s, v0.4s, v0.4s500# CHECK-NEXT: [0,1] D====eeeER. . . . sdot v0.4s, v1.16b, v2.16b501# CHECK-NEXT: [0,2] D=====eeeER . . . sdot v0.4s, v1.16b, v2.16b502# CHECK-NEXT: [0,3] D========eeeER . . . sdot v0.4s, v0.16b, v1.16b503# CHECK-NEXT: [1,0] D===========eeeeER . . mul v0.4s, v0.4s, v0.4s504# CHECK-NEXT: [1,1] .D==============eeeER . sdot v0.4s, v1.16b, v2.16b505# CHECK-NEXT: [1,2] .D===============eeeER . sdot v0.4s, v1.16b, v2.16b506# CHECK-NEXT: [1,3] .D==================eeeER sdot v0.4s, v0.16b, v1.16b507 508# CHECK: Average Wait times (based on the timeline view):509# CHECK-NEXT: [0]: Executions510# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue511# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready512# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage513 514# CHECK: [0] [1] [2] [3]515# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s516# CHECK-NEXT: 1. 2 10.0 0.0 0.0 sdot v0.4s, v1.16b, v2.16b517# CHECK-NEXT: 2. 2 11.0 0.0 0.0 sdot v0.4s, v1.16b, v2.16b518# CHECK-NEXT: 3. 2 14.0 0.0 0.0 sdot v0.4s, v0.16b, v1.16b519# CHECK-NEXT: 2 10.4 0.1 0.0 <total>520 521# CHECK: [5] Code Region - smmla522 523# CHECK: Iterations: 100524# CHECK-NEXT: Instructions: 400525# CHECK-NEXT: Total Cycles: 1103526# CHECK-NEXT: Total uOps: 400527 528# CHECK: Dispatch Width: 5529# CHECK-NEXT: uOps Per Cycle: 0.36530# CHECK-NEXT: IPC: 0.36531# CHECK-NEXT: Block RThroughput: 1.5532 533# CHECK: Timeline view:534# CHECK-NEXT: 0123456789535# CHECK-NEXT: Index 0123456789 01234536 537# CHECK: [0,0] DeeeeER . . . . mul v0.4s, v0.4s, v0.4s538# CHECK-NEXT: [0,1] D====eeeER. . . . smmla v0.4s, v1.16b, v2.16b539# CHECK-NEXT: [0,2] D=====eeeER . . . smmla v0.4s, v1.16b, v2.16b540# CHECK-NEXT: [0,3] D========eeeER . . . smmla v0.4s, v0.16b, v1.16b541# CHECK-NEXT: [1,0] D===========eeeeER . . mul v0.4s, v0.4s, v0.4s542# CHECK-NEXT: [1,1] .D==============eeeER . smmla v0.4s, v1.16b, v2.16b543# CHECK-NEXT: [1,2] .D===============eeeER . smmla v0.4s, v1.16b, v2.16b544# CHECK-NEXT: [1,3] .D==================eeeER smmla v0.4s, v0.16b, v1.16b545 546# CHECK: Average Wait times (based on the timeline view):547# CHECK-NEXT: [0]: Executions548# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue549# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready550# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage551 552# CHECK: [0] [1] [2] [3]553# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s554# CHECK-NEXT: 1. 2 10.0 0.0 0.0 smmla v0.4s, v1.16b, v2.16b555# CHECK-NEXT: 2. 2 11.0 0.0 0.0 smmla v0.4s, v1.16b, v2.16b556# CHECK-NEXT: 3. 2 14.0 0.0 0.0 smmla v0.4s, v0.16b, v1.16b557# CHECK-NEXT: 2 10.4 0.1 0.0 <total>558 559# CHECK: [6] Code Region - mla560 561# CHECK: Iterations: 100562# CHECK-NEXT: Instructions: 400563# CHECK-NEXT: Total Cycles: 1303564# CHECK-NEXT: Total uOps: 400565 566# CHECK: Dispatch Width: 5567# CHECK-NEXT: uOps Per Cycle: 0.31568# CHECK-NEXT: IPC: 0.31569# CHECK-NEXT: Block RThroughput: 4.0570 571# CHECK: Timeline view:572# CHECK-NEXT: 0123456789573# CHECK-NEXT: Index 0123456789 012345678574 575# CHECK: [0,0] DeeeeER . . . . . mul v0.4s, v0.4s, v0.4s576# CHECK-NEXT: [0,1] D====eeeeER . . . . mla v0.4s, v1.4s, v2.4s577# CHECK-NEXT: [0,2] D=====eeeeER . . . . mla v0.4s, v1.4s, v2.4s578# CHECK-NEXT: [0,3] D=========eeeeER . . . mla v0.4s, v0.4s, v1.4s579# CHECK-NEXT: [1,0] D=============eeeeER. . . mul v0.4s, v0.4s, v0.4s580# CHECK-NEXT: [1,1] .D================eeeeER . . mla v0.4s, v1.4s, v2.4s581# CHECK-NEXT: [1,2] .D=================eeeeER. . mla v0.4s, v1.4s, v2.4s582# CHECK-NEXT: [1,3] .D=====================eeeeER mla v0.4s, v0.4s, v1.4s583 584# CHECK: Average Wait times (based on the timeline view):585# CHECK-NEXT: [0]: Executions586# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue587# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready588# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage589 590# CHECK: [0] [1] [2] [3]591# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s592# CHECK-NEXT: 1. 2 11.0 0.0 0.0 mla v0.4s, v1.4s, v2.4s593# CHECK-NEXT: 2. 2 12.0 0.0 0.0 mla v0.4s, v1.4s, v2.4s594# CHECK-NEXT: 3. 2 16.0 0.0 0.0 mla v0.4s, v0.4s, v1.4s595# CHECK-NEXT: 2 11.6 0.1 0.0 <total>596 597# CHECK: [7] Code Region - sqrdmlah598 599# CHECK: Iterations: 100600# CHECK-NEXT: Instructions: 400601# CHECK-NEXT: Total Cycles: 1203602# CHECK-NEXT: Total uOps: 400603 604# CHECK: Dispatch Width: 5605# CHECK-NEXT: uOps Per Cycle: 0.33606# CHECK-NEXT: IPC: 0.33607# CHECK-NEXT: Block RThroughput: 4.0608 609# CHECK: Timeline view:610# CHECK-NEXT: 0123456789611# CHECK-NEXT: Index 0123456789 0123456612 613# CHECK: [0,0] DeeeeER . . . .. mul v0.4s, v0.4s, v0.4s614# CHECK-NEXT: [0,1] D====eeeeER . . .. sqrdmlah v0.8h, v1.8h, v2.8h615# CHECK-NEXT: [0,2] D======eeeeER . . .. sqrdmlah v0.8h, v1.8h, v2.8h616# CHECK-NEXT: [0,3] D========eeeeER. . .. sqrdmlah v0.8h, v1.8h, v2.8h617# CHECK-NEXT: [1,0] D============eeeeER . .. mul v0.4s, v0.4s, v0.4s618# CHECK-NEXT: [1,1] .D===============eeeeER .. sqrdmlah v0.8h, v1.8h, v2.8h619# CHECK-NEXT: [1,2] .D=================eeeeER.. sqrdmlah v0.8h, v1.8h, v2.8h620# CHECK-NEXT: [1,3] .D===================eeeeER sqrdmlah v0.8h, v1.8h, v2.8h621 622# CHECK: Average Wait times (based on the timeline view):623# CHECK-NEXT: [0]: Executions624# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue625# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready626# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage627 628# CHECK: [0] [1] [2] [3]629# CHECK-NEXT: 0. 2 7.0 0.5 0.0 mul v0.4s, v0.4s, v0.4s630# CHECK-NEXT: 1. 2 10.5 0.0 0.0 sqrdmlah v0.8h, v1.8h, v2.8h631# CHECK-NEXT: 2. 2 12.5 0.0 0.0 sqrdmlah v0.8h, v1.8h, v2.8h632# CHECK-NEXT: 3. 2 14.5 0.0 0.0 sqrdmlah v0.8h, v1.8h, v2.8h633# CHECK-NEXT: 2 11.1 0.1 0.0 <total>634 635# CHECK: [8] Code Region - smlal2636 637# CHECK: Iterations: 100638# CHECK-NEXT: Instructions: 400639# CHECK-NEXT: Total Cycles: 1303640# CHECK-NEXT: Total uOps: 400641 642# CHECK: Dispatch Width: 5643# CHECK-NEXT: uOps Per Cycle: 0.31644# CHECK-NEXT: IPC: 0.31645# CHECK-NEXT: Block RThroughput: 4.0646 647# CHECK: Timeline view:648# CHECK-NEXT: 0123456789649# CHECK-NEXT: Index 0123456789 012345678650 651# CHECK: [0,0] DeeeeER . . . . . mul v0.4s, v0.4s, v0.4s652# CHECK-NEXT: [0,1] D====eeeeER . . . . smlal2 v0.4s, v1.8h, v2.8h653# CHECK-NEXT: [0,2] D=====eeeeER . . . . smlal2 v0.4s, v1.8h, v2.8h654# CHECK-NEXT: [0,3] D=========eeeeER . . . smlal2 v0.4s, v0.8h, v1.8h655# CHECK-NEXT: [1,0] D=============eeeeER. . . mul v0.4s, v0.4s, v0.4s656# CHECK-NEXT: [1,1] .D================eeeeER . . smlal2 v0.4s, v1.8h, v2.8h657# CHECK-NEXT: [1,2] .D=================eeeeER. . smlal2 v0.4s, v1.8h, v2.8h658# CHECK-NEXT: [1,3] .D=====================eeeeER smlal2 v0.4s, v0.8h, v1.8h659 660# CHECK: Average Wait times (based on the timeline view):661# CHECK-NEXT: [0]: Executions662# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue663# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready664# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage665 666# CHECK: [0] [1] [2] [3]667# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s668# CHECK-NEXT: 1. 2 11.0 0.0 0.0 smlal2 v0.4s, v1.8h, v2.8h669# CHECK-NEXT: 2. 2 12.0 0.0 0.0 smlal2 v0.4s, v1.8h, v2.8h670# CHECK-NEXT: 3. 2 16.0 0.0 0.0 smlal2 v0.4s, v0.8h, v1.8h671# CHECK-NEXT: 2 11.6 0.1 0.0 <total>672 673# CHECK: [9] Code Region - sqdmlal2674 675# CHECK: Iterations: 100676# CHECK-NEXT: Instructions: 400677# CHECK-NEXT: Total Cycles: 1203678# CHECK-NEXT: Total uOps: 400679 680# CHECK: Dispatch Width: 5681# CHECK-NEXT: uOps Per Cycle: 0.33682# CHECK-NEXT: IPC: 0.33683# CHECK-NEXT: Block RThroughput: 4.0684 685# CHECK: Timeline view:686# CHECK-NEXT: 0123456789687# CHECK-NEXT: Index 0123456789 0123456688 689# CHECK: [0,0] DeeeeER . . . .. mul v0.4s, v0.4s, v0.4s690# CHECK-NEXT: [0,1] D====eeeeER . . .. sqdmlal2 v0.4s, v1.8h, v2.8h691# CHECK-NEXT: [0,2] D======eeeeER . . .. sqdmlal2 v0.4s, v1.8h, v2.8h692# CHECK-NEXT: [0,3] D========eeeeER. . .. sqdmlal2 v0.4s, v1.8h, v2.8h693# CHECK-NEXT: [1,0] D============eeeeER . .. mul v0.4s, v0.4s, v0.4s694# CHECK-NEXT: [1,1] .D===============eeeeER .. sqdmlal2 v0.4s, v1.8h, v2.8h695# CHECK-NEXT: [1,2] .D=================eeeeER.. sqdmlal2 v0.4s, v1.8h, v2.8h696# CHECK-NEXT: [1,3] .D===================eeeeER sqdmlal2 v0.4s, v1.8h, v2.8h697 698# CHECK: Average Wait times (based on the timeline view):699# CHECK-NEXT: [0]: Executions700# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue701# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready702# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage703 704# CHECK: [0] [1] [2] [3]705# CHECK-NEXT: 0. 2 7.0 0.5 0.0 mul v0.4s, v0.4s, v0.4s706# CHECK-NEXT: 1. 2 10.5 0.0 0.0 sqdmlal2 v0.4s, v1.8h, v2.8h707# CHECK-NEXT: 2. 2 12.5 0.0 0.0 sqdmlal2 v0.4s, v1.8h, v2.8h708# CHECK-NEXT: 3. 2 14.5 0.0 0.0 sqdmlal2 v0.4s, v1.8h, v2.8h709# CHECK-NEXT: 2 11.1 0.1 0.0 <total>710 711# CHECK: [10] Code Region - sadalp712 713# CHECK: Iterations: 100714# CHECK-NEXT: Instructions: 400715# CHECK-NEXT: Total Cycles: 1303716# CHECK-NEXT: Total uOps: 400717 718# CHECK: Dispatch Width: 5719# CHECK-NEXT: uOps Per Cycle: 0.31720# CHECK-NEXT: IPC: 0.31721# CHECK-NEXT: Block RThroughput: 3.0722 723# CHECK: Timeline view:724# CHECK-NEXT: 0123456789725# CHECK-NEXT: Index 0123456789 012345678726 727# CHECK: [0,0] DeeeeER . . . . . mul v0.4s, v0.4s, v0.4s728# CHECK-NEXT: [0,1] D====eeeeER . . . . sadalp v0.2d, v1.4s729# CHECK-NEXT: [0,2] D=====eeeeER . . . . sadalp v0.2d, v1.4s730# CHECK-NEXT: [0,3] D=========eeeeER . . . sadalp v0.2d, v0.4s731# CHECK-NEXT: [1,0] D=============eeeeER. . . mul v0.4s, v0.4s, v0.4s732# CHECK-NEXT: [1,1] .D================eeeeER . . sadalp v0.2d, v1.4s733# CHECK-NEXT: [1,2] .D=================eeeeER. . sadalp v0.2d, v1.4s734# CHECK-NEXT: [1,3] .D=====================eeeeER sadalp v0.2d, v0.4s735 736# CHECK: Average Wait times (based on the timeline view):737# CHECK-NEXT: [0]: Executions738# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue739# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready740# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage741 742# CHECK: [0] [1] [2] [3]743# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s744# CHECK-NEXT: 1. 2 11.0 0.0 0.0 sadalp v0.2d, v1.4s745# CHECK-NEXT: 2. 2 12.0 0.0 0.0 sadalp v0.2d, v1.4s746# CHECK-NEXT: 3. 2 16.0 0.0 0.0 sadalp v0.2d, v0.4s747# CHECK-NEXT: 2 11.6 0.1 0.0 <total>748 749# CHECK: [11] Code Region - fcmla750 751# CHECK: Iterations: 100752# CHECK-NEXT: Instructions: 400753# CHECK-NEXT: Total Cycles: 1303754# CHECK-NEXT: Total uOps: 400755 756# CHECK: Dispatch Width: 5757# CHECK-NEXT: uOps Per Cycle: 0.31758# CHECK-NEXT: IPC: 0.31759# CHECK-NEXT: Block RThroughput: 2.0760 761# CHECK: Timeline view:762# CHECK-NEXT: 0123456789763# CHECK-NEXT: Index 0123456789 012345678764 765# CHECK: [0,0] DeeeER . . . . . fmul v0.4s, v0.4s, v0.4s766# CHECK-NEXT: [0,1] D===eeeeER. . . . . fcmla v0.2d, v1.2d, v2.2d, #90767# CHECK-NEXT: [0,2] D=====eeeeER . . . . fcmla v0.2d, v1.2d, v2.2d, #90768# CHECK-NEXT: [0,3] D=========eeeeER . . . fcmla v0.2d, v0.2d, v1.2d, #90769# CHECK-NEXT: [1,0] D=============eeeER . . . fmul v0.4s, v0.4s, v0.4s770# CHECK-NEXT: [1,1] .D===============eeeeER . . fcmla v0.2d, v1.2d, v2.2d, #90771# CHECK-NEXT: [1,2] .D=================eeeeER. . fcmla v0.2d, v1.2d, v2.2d, #90772# CHECK-NEXT: [1,3] .D=====================eeeeER fcmla v0.2d, v0.2d, v1.2d, #90773 774# CHECK: Average Wait times (based on the timeline view):775# CHECK-NEXT: [0]: Executions776# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue777# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready778# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage779 780# CHECK: [0] [1] [2] [3]781# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul v0.4s, v0.4s, v0.4s782# CHECK-NEXT: 1. 2 10.0 0.0 0.0 fcmla v0.2d, v1.2d, v2.2d, #90783# CHECK-NEXT: 2. 2 12.0 0.0 0.0 fcmla v0.2d, v1.2d, v2.2d, #90784# CHECK-NEXT: 3. 2 16.0 0.0 0.0 fcmla v0.2d, v0.2d, v1.2d, #90785# CHECK-NEXT: 2 11.4 0.1 0.0 <total>786 787# CHECK: [12] Code Region - fmla788 789# CHECK: Iterations: 100790# CHECK-NEXT: Instructions: 600791# CHECK-NEXT: Total Cycles: 1703792# CHECK-NEXT: Total uOps: 600793 794# CHECK: Dispatch Width: 5795# CHECK-NEXT: uOps Per Cycle: 0.35796# CHECK-NEXT: IPC: 0.35797# CHECK-NEXT: Block RThroughput: 3.0798 799# CHECK: Timeline view:800# CHECK-NEXT: 0123456789 0123456801# CHECK-NEXT: Index 0123456789 0123456789802 803# CHECK: [0,0] DeeeER . . . . . .. fmul v0.2d, v0.2d, v0.2d804# CHECK-NEXT: [0,1] D=eeeeER . . . . . .. fmla v0.2d, v1.2d, v2.2d805# CHECK-NEXT: [0,2] D=====eeER. . . . . .. fadd v0.2d, v0.2d, v0.2d806# CHECK-NEXT: [0,3] D=======eeeeER . . . . .. fmla v0.2d, v1.2d, v2.2d807# CHECK-NEXT: [0,4] D=========eeeeER . . . .. fmla v0.2d, v1.2d, v2.2d808# CHECK-NEXT: [0,5] .D============eeeeER. . . .. fmla v0.2d, v0.2d, v1.2d809# CHECK-NEXT: [1,0] .D================eeeER . . .. fmul v0.2d, v0.2d, v0.2d810# CHECK-NEXT: [1,1] .D=================eeeeER. . .. fmla v0.2d, v1.2d, v2.2d811# CHECK-NEXT: [1,2] .D=====================eeER . .. fadd v0.2d, v0.2d, v0.2d812# CHECK-NEXT: [1,3] .D=======================eeeeER .. fmla v0.2d, v1.2d, v2.2d813# CHECK-NEXT: [1,4] . D========================eeeeER .. fmla v0.2d, v1.2d, v2.2d814# CHECK-NEXT: [1,5] . D============================eeeeER fmla v0.2d, v0.2d, v1.2d815 816# CHECK: Average Wait times (based on the timeline view):817# CHECK-NEXT: [0]: Executions818# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue819# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready820# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage821 822# CHECK: [0] [1] [2] [3]823# CHECK-NEXT: 0. 2 9.0 0.5 0.0 fmul v0.2d, v0.2d, v0.2d824# CHECK-NEXT: 1. 2 10.0 0.0 0.0 fmla v0.2d, v1.2d, v2.2d825# CHECK-NEXT: 2. 2 14.0 0.0 0.0 fadd v0.2d, v0.2d, v0.2d826# CHECK-NEXT: 3. 2 16.0 0.0 0.0 fmla v0.2d, v1.2d, v2.2d827# CHECK-NEXT: 4. 2 17.5 0.0 0.0 fmla v0.2d, v1.2d, v2.2d828# CHECK-NEXT: 5. 2 21.0 0.0 0.0 fmla v0.2d, v0.2d, v1.2d829# CHECK-NEXT: 2 14.6 0.1 0.0 <total>830 831# CHECK: [13] Code Region - fmlal832 833# CHECK: Iterations: 100834# CHECK-NEXT: Instructions: 600835# CHECK-NEXT: Total Cycles: 1903836# CHECK-NEXT: Total uOps: 600837 838# CHECK: Dispatch Width: 5839# CHECK-NEXT: uOps Per Cycle: 0.32840# CHECK-NEXT: IPC: 0.32841# CHECK-NEXT: Block RThroughput: 3.0842 843# CHECK: Timeline view:844# CHECK-NEXT: 0123456789 0123456789845# CHECK-NEXT: Index 0123456789 0123456789 0846 847# CHECK: [0,0] DeeeER . . . . . . . fmul v0.2d, v0.2d, v0.2d848# CHECK-NEXT: [0,1] D===eeeeER. . . . . . . fmlal v0.4s, v1.4h, v2.4h849# CHECK-NEXT: [0,2] D=======eeER . . . . . . fadd v0.2d, v0.2d, v0.2d850# CHECK-NEXT: [0,3] D=========eeeeER . . . . . fmlal v0.4s, v1.4h, v2.4h851# CHECK-NEXT: [0,4] D===========eeeeER . . . . . fmlal v0.4s, v1.4h, v2.4h852# CHECK-NEXT: [0,5] .D==============eeeeER . . . . fmlal v0.4s, v0.4h, v1.4h853# CHECK-NEXT: [1,0] .D==================eeeER. . . . fmul v0.2d, v0.2d, v0.2d854# CHECK-NEXT: [1,1] .D=====================eeeeER . . . fmlal v0.4s, v1.4h, v2.4h855# CHECK-NEXT: [1,2] .D=========================eeER . . fadd v0.2d, v0.2d, v0.2d856# CHECK-NEXT: [1,3] .D===========================eeeeER. . fmlal v0.4s, v1.4h, v2.4h857# CHECK-NEXT: [1,4] . D============================eeeeER . fmlal v0.4s, v1.4h, v2.4h858# CHECK-NEXT: [1,5] . D================================eeeeER fmlal v0.4s, v0.4h, v1.4h859 860# CHECK: Average Wait times (based on the timeline view):861# CHECK-NEXT: [0]: Executions862# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue863# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready864# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage865 866# CHECK: [0] [1] [2] [3]867# CHECK-NEXT: 0. 2 10.0 0.5 0.0 fmul v0.2d, v0.2d, v0.2d868# CHECK-NEXT: 1. 2 13.0 0.0 0.0 fmlal v0.4s, v1.4h, v2.4h869# CHECK-NEXT: 2. 2 17.0 0.0 0.0 fadd v0.2d, v0.2d, v0.2d870# CHECK-NEXT: 3. 2 19.0 0.0 0.0 fmlal v0.4s, v1.4h, v2.4h871# CHECK-NEXT: 4. 2 20.5 0.0 0.0 fmlal v0.4s, v1.4h, v2.4h872# CHECK-NEXT: 5. 2 24.0 0.0 0.0 fmlal v0.4s, v0.4h, v1.4h873# CHECK-NEXT: 2 17.3 0.1 0.0 <total>874 875# CHECK: [14] Code Region - bfdot876 877# CHECK: Iterations: 100878# CHECK-NEXT: Instructions: 400879# CHECK-NEXT: Total Cycles: 1303880# CHECK-NEXT: Total uOps: 400881 882# CHECK: Dispatch Width: 5883# CHECK-NEXT: uOps Per Cycle: 0.31884# CHECK-NEXT: IPC: 0.31885# CHECK-NEXT: Block RThroughput: 2.0886 887# CHECK: Timeline view:888# CHECK-NEXT: 0123456789889# CHECK-NEXT: Index 0123456789 012345678890 891# CHECK: [0,0] DeeeER . . . . . fmul v0.2d, v0.2d, v0.2d892# CHECK-NEXT: [0,1] D===eeeeER. . . . . bfdot v0.4s, v1.8h, v2.8h893# CHECK-NEXT: [0,2] D=====eeeeER . . . . bfdot v0.4s, v1.8h, v2.8h894# CHECK-NEXT: [0,3] D=========eeeeER . . . bfdot v0.4s, v0.8h, v1.8h895# CHECK-NEXT: [1,0] D=============eeeER . . . fmul v0.2d, v0.2d, v0.2d896# CHECK-NEXT: [1,1] .D===============eeeeER . . bfdot v0.4s, v1.8h, v2.8h897# CHECK-NEXT: [1,2] .D=================eeeeER. . bfdot v0.4s, v1.8h, v2.8h898# CHECK-NEXT: [1,3] .D=====================eeeeER bfdot v0.4s, v0.8h, v1.8h899 900# CHECK: Average Wait times (based on the timeline view):901# CHECK-NEXT: [0]: Executions902# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue903# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready904# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage905 906# CHECK: [0] [1] [2] [3]907# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul v0.2d, v0.2d, v0.2d908# CHECK-NEXT: 1. 2 10.0 0.0 0.0 bfdot v0.4s, v1.8h, v2.8h909# CHECK-NEXT: 2. 2 12.0 0.0 0.0 bfdot v0.4s, v1.8h, v2.8h910# CHECK-NEXT: 3. 2 16.0 0.0 0.0 bfdot v0.4s, v0.8h, v1.8h911# CHECK-NEXT: 2 11.4 0.1 0.0 <total>912 913# CHECK: [15] Code Region - bfmmla914 915# CHECK: Iterations: 100916# CHECK-NEXT: Instructions: 400917# CHECK-NEXT: Total Cycles: 1603918# CHECK-NEXT: Total uOps: 400919 920# CHECK: Dispatch Width: 5921# CHECK-NEXT: uOps Per Cycle: 0.25922# CHECK-NEXT: IPC: 0.25923# CHECK-NEXT: Block RThroughput: 2.0924 925# CHECK: Timeline view:926# CHECK-NEXT: 0123456789 01234927# CHECK-NEXT: Index 0123456789 0123456789928 929# CHECK: [0,0] DeeeER . . . . . . fmul v0.2d, v0.2d, v0.2d930# CHECK-NEXT: [0,1] D===eeeeeER . . . . . bfmmla v0.4s, v1.8h, v2.8h931# CHECK-NEXT: [0,2] D======eeeeeER . . . . . bfmmla v0.4s, v1.8h, v2.8h932# CHECK-NEXT: [0,3] D===========eeeeeER . . . . bfmmla v0.4s, v0.8h, v1.8h933# CHECK-NEXT: [1,0] D================eeeER . . . fmul v0.2d, v0.2d, v0.2d934# CHECK-NEXT: [1,1] .D==================eeeeeER . . bfmmla v0.4s, v1.8h, v2.8h935# CHECK-NEXT: [1,2] .D=====================eeeeeER. . bfmmla v0.4s, v1.8h, v2.8h936# CHECK-NEXT: [1,3] .D==========================eeeeeER bfmmla v0.4s, v0.8h, v1.8h937 938# CHECK: Average Wait times (based on the timeline view):939# CHECK-NEXT: [0]: Executions940# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue941# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready942# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage943 944# CHECK: [0] [1] [2] [3]945# CHECK-NEXT: 0. 2 9.0 0.5 0.0 fmul v0.2d, v0.2d, v0.2d946# CHECK-NEXT: 1. 2 11.5 0.0 0.0 bfmmla v0.4s, v1.8h, v2.8h947# CHECK-NEXT: 2. 2 14.5 0.0 0.0 bfmmla v0.4s, v1.8h, v2.8h948# CHECK-NEXT: 3. 2 19.5 0.0 0.0 bfmmla v0.4s, v0.8h, v1.8h949# CHECK-NEXT: 2 13.6 0.1 0.0 <total>950 951# CHECK: [16] Code Region - bfmlalb952 953# CHECK: Iterations: 100954# CHECK-NEXT: Instructions: 400955# CHECK-NEXT: Total Cycles: 1303956# CHECK-NEXT: Total uOps: 400957 958# CHECK: Dispatch Width: 5959# CHECK-NEXT: uOps Per Cycle: 0.31960# CHECK-NEXT: IPC: 0.31961# CHECK-NEXT: Block RThroughput: 2.0962 963# CHECK: Timeline view:964# CHECK-NEXT: 0123456789965# CHECK-NEXT: Index 0123456789 012345678966 967# CHECK: [0,0] DeeeER . . . . . fmul v0.2d, v0.2d, v0.2d968# CHECK-NEXT: [0,1] D===eeeeER. . . . . bfmlalb v0.4s, v1.8h, v2.8h969# CHECK-NEXT: [0,2] D=====eeeeER . . . . bfmlalb v0.4s, v1.8h, v2.8h970# CHECK-NEXT: [0,3] D=========eeeeER . . . bfmlalb v0.4s, v0.8h, v1.8h971# CHECK-NEXT: [1,0] D=============eeeER . . . fmul v0.2d, v0.2d, v0.2d972# CHECK-NEXT: [1,1] .D===============eeeeER . . bfmlalb v0.4s, v1.8h, v2.8h973# CHECK-NEXT: [1,2] .D=================eeeeER. . bfmlalb v0.4s, v1.8h, v2.8h974# CHECK-NEXT: [1,3] .D=====================eeeeER bfmlalb v0.4s, v0.8h, v1.8h975 976# CHECK: Average Wait times (based on the timeline view):977# CHECK-NEXT: [0]: Executions978# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue979# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready980# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage981 982# CHECK: [0] [1] [2] [3]983# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul v0.2d, v0.2d, v0.2d984# CHECK-NEXT: 1. 2 10.0 0.0 0.0 bfmlalb v0.4s, v1.8h, v2.8h985# CHECK-NEXT: 2. 2 12.0 0.0 0.0 bfmlalb v0.4s, v1.8h, v2.8h986# CHECK-NEXT: 3. 2 16.0 0.0 0.0 bfmlalb v0.4s, v0.8h, v1.8h987# CHECK-NEXT: 2 11.4 0.1 0.0 <total>988 989# CHECK: [17] Code Region - crc32990 991# CHECK: Iterations: 100992# CHECK-NEXT: Instructions: 1100993# CHECK-NEXT: Total Cycles: 1403994# CHECK-NEXT: Total uOps: 1100995 996# CHECK: Dispatch Width: 5997# CHECK-NEXT: uOps Per Cycle: 0.78998# CHECK-NEXT: IPC: 0.78999# CHECK-NEXT: Block RThroughput: 10.01000 1001# CHECK: Timeline view:1002# CHECK-NEXT: 0123456789 01003# CHECK-NEXT: Index 0123456789 01234567891004 1005# CHECK: [0,0] DeeER. . . . . . mul w0, w0, w01006# CHECK-NEXT: [0,1] D==eeER . . . . . crc32cb w0, w0, w11007# CHECK-NEXT: [0,2] D===eeER . . . . . crc32cb w0, w0, w11008# CHECK-NEXT: [0,3] D=====eeER. . . . . crc32cb w0, w0, w01009# CHECK-NEXT: [0,4] D======eeER . . . . crc32b w0, w0, w151010# CHECK-NEXT: [0,5] .D======eeER . . . . crc32h w0, w0, w211011# CHECK-NEXT: [0,6] .D=======eeER . . . . crc32w w0, w0, w241012# CHECK-NEXT: [0,7] .D========eeER . . . . crc32x w0, w0, x251013# CHECK-NEXT: [0,8] .D=========eeER. . . . crc32ch w0, w0, w161014# CHECK-NEXT: [0,9] .D==========eeER . . . crc32cw w0, w0, w231015# CHECK-NEXT: [0,10] . D==========eeER . . . crc32cx w0, w0, x51016# CHECK-NEXT: [1,0] . D============eeER . . . mul w0, w0, w01017# CHECK-NEXT: [1,1] . D==============eeER . . crc32cb w0, w0, w11018# CHECK-NEXT: [1,2] . D===============eeER . . crc32cb w0, w0, w11019# CHECK-NEXT: [1,3] . D=================eeER . . crc32cb w0, w0, w01020# CHECK-NEXT: [1,4] . D=================eeER. . crc32b w0, w0, w151021# CHECK-NEXT: [1,5] . D==================eeER . crc32h w0, w0, w211022# CHECK-NEXT: [1,6] . D===================eeER . crc32w w0, w0, w241023# CHECK-NEXT: [1,7] . D====================eeER . crc32x w0, w0, x251024# CHECK-NEXT: [1,8] . D=====================eeER . crc32ch w0, w0, w161025# CHECK-NEXT: [1,9] . D=====================eeER. crc32cw w0, w0, w231026# CHECK-NEXT: [1,10] . D======================eeER crc32cx w0, w0, x51027 1028# CHECK: Average Wait times (based on the timeline view):1029# CHECK-NEXT: [0]: Executions1030# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1031# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1032# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1033 1034# CHECK: [0] [1] [2] [3]1035# CHECK-NEXT: 0. 2 7.0 0.5 0.0 mul w0, w0, w01036# CHECK-NEXT: 1. 2 9.0 0.0 0.0 crc32cb w0, w0, w11037# CHECK-NEXT: 2. 2 10.0 0.0 0.0 crc32cb w0, w0, w11038# CHECK-NEXT: 3. 2 12.0 0.0 0.0 crc32cb w0, w0, w01039# CHECK-NEXT: 4. 2 12.5 0.0 0.0 crc32b w0, w0, w151040# CHECK-NEXT: 5. 2 13.0 0.0 0.0 crc32h w0, w0, w211041# CHECK-NEXT: 6. 2 14.0 0.0 0.0 crc32w w0, w0, w241042# CHECK-NEXT: 7. 2 15.0 0.0 0.0 crc32x w0, w0, x251043# CHECK-NEXT: 8. 2 16.0 0.0 0.0 crc32ch w0, w0, w161044# CHECK-NEXT: 9. 2 16.5 0.0 0.0 crc32cw w0, w0, w231045# CHECK-NEXT: 10. 2 17.0 0.0 0.0 crc32cx w0, w0, x51046# CHECK-NEXT: 2 12.9 0.0 0.0 <total>1047 1048# CHECK: [18] Code Region - Z saba1049 1050# CHECK: Iterations: 1001051# CHECK-NEXT: Instructions: 4001052# CHECK-NEXT: Total Cycles: 14031053# CHECK-NEXT: Total uOps: 5001054 1055# CHECK: Dispatch Width: 51056# CHECK-NEXT: uOps Per Cycle: 0.361057# CHECK-NEXT: IPC: 0.291058# CHECK-NEXT: Block RThroughput: 3.01059 1060# CHECK: Timeline view:1061# CHECK-NEXT: 0123456789 01062# CHECK-NEXT: Index 0123456789 01234567891063 1064# CHECK: [0,0] DeeeeeER . . . . . mul z0.d, z0.d, z0.d1065# CHECK-NEXT: [0,1] D=====eeeeER . . . . saba z0.d, z1.d, z2.d1066# CHECK-NEXT: [0,2] D======eeeeER . . . . saba z0.d, z1.d, z2.d1067# CHECK-NEXT: [0,3] D==========eeeeER . . . saba z0.d, z0.d, z1.d1068# CHECK-NEXT: [1,0] .D=============eeeeeER . . mul z0.d, z0.d, z0.d1069# CHECK-NEXT: [1,1] .D==================eeeeER . saba z0.d, z1.d, z2.d1070# CHECK-NEXT: [1,2] .D===================eeeeER . saba z0.d, z1.d, z2.d1071# CHECK-NEXT: [1,3] .D=======================eeeeER saba z0.d, z0.d, z1.d1072 1073# CHECK: Average Wait times (based on the timeline view):1074# CHECK-NEXT: [0]: Executions1075# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1076# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1077# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1078 1079# CHECK: [0] [1] [2] [3]1080# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul z0.d, z0.d, z0.d1081# CHECK-NEXT: 1. 2 12.5 0.0 0.0 saba z0.d, z1.d, z2.d1082# CHECK-NEXT: 2. 2 13.5 0.0 0.0 saba z0.d, z1.d, z2.d1083# CHECK-NEXT: 3. 2 17.5 0.0 0.0 saba z0.d, z0.d, z1.d1084# CHECK-NEXT: 2 12.8 0.1 0.0 <total>1085 1086# CHECK: [19] Code Region - Z sabalt1087 1088# CHECK: Iterations: 1001089# CHECK-NEXT: Instructions: 4001090# CHECK-NEXT: Total Cycles: 13031091# CHECK-NEXT: Total uOps: 4001092 1093# CHECK: Dispatch Width: 51094# CHECK-NEXT: uOps Per Cycle: 0.311095# CHECK-NEXT: IPC: 0.311096# CHECK-NEXT: Block RThroughput: 3.01097 1098# CHECK: Timeline view:1099# CHECK-NEXT: 01234567891100# CHECK-NEXT: Index 0123456789 0123456781101 1102# CHECK: [0,0] DeeeeER . . . . . mul z0.h, z0.h, z0.h1103# CHECK-NEXT: [0,1] D====eeeeER . . . . sabalt z0.h, z1.b, z2.b1104# CHECK-NEXT: [0,2] D=====eeeeER . . . . sabalt z0.h, z1.b, z2.b1105# CHECK-NEXT: [0,3] D=========eeeeER . . . sabalt z0.h, z0.b, z1.b1106# CHECK-NEXT: [1,0] D=============eeeeER. . . mul z0.h, z0.h, z0.h1107# CHECK-NEXT: [1,1] .D================eeeeER . . sabalt z0.h, z1.b, z2.b1108# CHECK-NEXT: [1,2] .D=================eeeeER. . sabalt z0.h, z1.b, z2.b1109# CHECK-NEXT: [1,3] .D=====================eeeeER sabalt z0.h, z0.b, z1.b1110 1111# CHECK: Average Wait times (based on the timeline view):1112# CHECK-NEXT: [0]: Executions1113# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1114# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1115# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1116 1117# CHECK: [0] [1] [2] [3]1118# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul z0.h, z0.h, z0.h1119# CHECK-NEXT: 1. 2 11.0 0.0 0.0 sabalt z0.h, z1.b, z2.b1120# CHECK-NEXT: 2. 2 12.0 0.0 0.0 sabalt z0.h, z1.b, z2.b1121# CHECK-NEXT: 3. 2 16.0 0.0 0.0 sabalt z0.h, z0.b, z1.b1122# CHECK-NEXT: 2 11.6 0.1 0.0 <total>1123 1124# CHECK: [20] Code Region - Z sadalp1125 1126# CHECK: Iterations: 1001127# CHECK-NEXT: Instructions: 4001128# CHECK-NEXT: Total Cycles: 14031129# CHECK-NEXT: Total uOps: 5001130 1131# CHECK: Dispatch Width: 51132# CHECK-NEXT: uOps Per Cycle: 0.361133# CHECK-NEXT: IPC: 0.291134# CHECK-NEXT: Block RThroughput: 3.01135 1136# CHECK: Timeline view:1137# CHECK-NEXT: 0123456789 01138# CHECK-NEXT: Index 0123456789 01234567891139 1140# CHECK: [0,0] DeeeeeER . . . . . mul z0.d, z0.d, z0.d1141# CHECK-NEXT: [0,1] D=====eeeeER . . . . sadalp z0.d, p0/m, z1.s1142# CHECK-NEXT: [0,2] D======eeeeER . . . . sadalp z0.d, p0/m, z1.s1143# CHECK-NEXT: [0,3] D==========eeeeER . . . sadalp z0.d, p0/m, z0.s1144# CHECK-NEXT: [1,0] .D=============eeeeeER . . mul z0.d, z0.d, z0.d1145# CHECK-NEXT: [1,1] .D==================eeeeER . sadalp z0.d, p0/m, z1.s1146# CHECK-NEXT: [1,2] .D===================eeeeER . sadalp z0.d, p0/m, z1.s1147# CHECK-NEXT: [1,3] .D=======================eeeeER sadalp z0.d, p0/m, z0.s1148 1149# CHECK: Average Wait times (based on the timeline view):1150# CHECK-NEXT: [0]: Executions1151# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1152# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1153# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1154 1155# CHECK: [0] [1] [2] [3]1156# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul z0.d, z0.d, z0.d1157# CHECK-NEXT: 1. 2 12.5 0.0 0.0 sadalp z0.d, p0/m, z1.s1158# CHECK-NEXT: 2. 2 13.5 0.0 0.0 sadalp z0.d, p0/m, z1.s1159# CHECK-NEXT: 3. 2 17.5 0.0 0.0 sadalp z0.d, p0/m, z0.s1160# CHECK-NEXT: 2 12.8 0.1 0.0 <total>1161 1162# CHECK: [21] Code Region - Z ssra1163 1164# CHECK: Iterations: 1001165# CHECK-NEXT: Instructions: 4001166# CHECK-NEXT: Total Cycles: 14031167# CHECK-NEXT: Total uOps: 5001168 1169# CHECK: Dispatch Width: 51170# CHECK-NEXT: uOps Per Cycle: 0.361171# CHECK-NEXT: IPC: 0.291172# CHECK-NEXT: Block RThroughput: 3.01173 1174# CHECK: Timeline view:1175# CHECK-NEXT: 0123456789 01176# CHECK-NEXT: Index 0123456789 01234567891177 1178# CHECK: [0,0] DeeeeeER . . . . . mul z0.d, z0.d, z0.d1179# CHECK-NEXT: [0,1] D=====eeeeER . . . . ssra z0.d, z1.d, #11180# CHECK-NEXT: [0,2] D======eeeeER . . . . ssra z0.d, z1.d, #11181# CHECK-NEXT: [0,3] D==========eeeeER . . . ssra z0.d, z0.d, #11182# CHECK-NEXT: [1,0] .D=============eeeeeER . . mul z0.d, z0.d, z0.d1183# CHECK-NEXT: [1,1] .D==================eeeeER . ssra z0.d, z1.d, #11184# CHECK-NEXT: [1,2] .D===================eeeeER . ssra z0.d, z1.d, #11185# CHECK-NEXT: [1,3] .D=======================eeeeER ssra z0.d, z0.d, #11186 1187# CHECK: Average Wait times (based on the timeline view):1188# CHECK-NEXT: [0]: Executions1189# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1190# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1191# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1192 1193# CHECK: [0] [1] [2] [3]1194# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul z0.d, z0.d, z0.d1195# CHECK-NEXT: 1. 2 12.5 0.0 0.0 ssra z0.d, z1.d, #11196# CHECK-NEXT: 2. 2 13.5 0.0 0.0 ssra z0.d, z1.d, #11197# CHECK-NEXT: 3. 2 17.5 0.0 0.0 ssra z0.d, z0.d, #11198# CHECK-NEXT: 2 12.8 0.1 0.0 <total>1199 1200# CHECK: [22] Code Region - Z cdot.s1201 1202# CHECK: Iterations: 1001203# CHECK-NEXT: Instructions: 4001204# CHECK-NEXT: Total Cycles: 12031205# CHECK-NEXT: Total uOps: 5001206 1207# CHECK: Dispatch Width: 51208# CHECK-NEXT: uOps Per Cycle: 0.421209# CHECK-NEXT: IPC: 0.331210# CHECK-NEXT: Block RThroughput: 2.01211 1212# CHECK: Timeline view:1213# CHECK-NEXT: 01234567891214# CHECK-NEXT: Index 0123456789 01234561215 1216# CHECK: [0,0] DeeeeeER . . . .. mul z0.d, z0.d, z0.d1217# CHECK-NEXT: [0,1] D=====eeeER . . .. cdot z0.s, z1.b, z2.b, #901218# CHECK-NEXT: [0,2] D======eeeER . . .. cdot z0.s, z1.b, z2.b, #901219# CHECK-NEXT: [0,3] D=========eeeER. . .. cdot z0.s, z0.b, z1.b, #901220# CHECK-NEXT: [1,0] .D===========eeeeeER. .. mul z0.d, z0.d, z0.d1221# CHECK-NEXT: [1,1] .D================eeeER .. cdot z0.s, z1.b, z2.b, #901222# CHECK-NEXT: [1,2] .D=================eeeER .. cdot z0.s, z1.b, z2.b, #901223# CHECK-NEXT: [1,3] .D====================eeeER cdot z0.s, z0.b, z1.b, #901224 1225# CHECK: Average Wait times (based on the timeline view):1226# CHECK-NEXT: [0]: Executions1227# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1228# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1229# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1230 1231# CHECK: [0] [1] [2] [3]1232# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul z0.d, z0.d, z0.d1233# CHECK-NEXT: 1. 2 11.5 0.0 0.0 cdot z0.s, z1.b, z2.b, #901234# CHECK-NEXT: 2. 2 12.5 0.0 0.0 cdot z0.s, z1.b, z2.b, #901235# CHECK-NEXT: 3. 2 15.5 0.0 0.0 cdot z0.s, z0.b, z1.b, #901236# CHECK-NEXT: 2 11.5 0.1 0.0 <total>1237 1238# CHECK: [23] Code Region - Z cdot.d1239 1240# CHECK: Iterations: 1001241# CHECK-NEXT: Instructions: 4001242# CHECK-NEXT: Total Cycles: 14031243# CHECK-NEXT: Total uOps: 5001244 1245# CHECK: Dispatch Width: 51246# CHECK-NEXT: uOps Per Cycle: 0.361247# CHECK-NEXT: IPC: 0.291248# CHECK-NEXT: Block RThroughput: 5.01249 1250# CHECK: Timeline view:1251# CHECK-NEXT: 0123456789 01252# CHECK-NEXT: Index 0123456789 01234567891253 1254# CHECK: [0,0] DeeeeeER . . . . . mul z0.d, z0.d, z0.d1255# CHECK-NEXT: [0,1] D=====eeeeER . . . . cdot z0.d, z1.h, z2.h, #901256# CHECK-NEXT: [0,2] D======eeeeER . . . . cdot z0.d, z1.h, z2.h, #901257# CHECK-NEXT: [0,3] D==========eeeeER . . . cdot z0.d, z0.h, z1.h, #901258# CHECK-NEXT: [1,0] .D=============eeeeeER . . mul z0.d, z0.d, z0.d1259# CHECK-NEXT: [1,1] .D==================eeeeER . cdot z0.d, z1.h, z2.h, #901260# CHECK-NEXT: [1,2] .D===================eeeeER . cdot z0.d, z1.h, z2.h, #901261# CHECK-NEXT: [1,3] .D=======================eeeeER cdot z0.d, z0.h, z1.h, #901262 1263# CHECK: Average Wait times (based on the timeline view):1264# CHECK-NEXT: [0]: Executions1265# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1266# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1267# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1268 1269# CHECK: [0] [1] [2] [3]1270# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul z0.d, z0.d, z0.d1271# CHECK-NEXT: 1. 2 12.5 0.0 0.0 cdot z0.d, z1.h, z2.h, #901272# CHECK-NEXT: 2. 2 13.5 0.0 0.0 cdot z0.d, z1.h, z2.h, #901273# CHECK-NEXT: 3. 2 17.5 0.0 0.0 cdot z0.d, z0.h, z1.h, #901274# CHECK-NEXT: 2 12.8 0.1 0.0 <total>1275 1276# CHECK: [24] Code Region - Z cmla.b1277 1278# CHECK: Iterations: 1001279# CHECK-NEXT: Instructions: 4001280# CHECK-NEXT: Total Cycles: 14031281# CHECK-NEXT: Total uOps: 5001282 1283# CHECK: Dispatch Width: 51284# CHECK-NEXT: uOps Per Cycle: 0.361285# CHECK-NEXT: IPC: 0.291286# CHECK-NEXT: Block RThroughput: 5.01287 1288# CHECK: Timeline view:1289# CHECK-NEXT: 0123456789 01290# CHECK-NEXT: Index 0123456789 01234567891291 1292# CHECK: [0,0] DeeeeeER . . . . . mul z0.d, z0.d, z0.d1293# CHECK-NEXT: [0,1] D=====eeeeER . . . . cmla z0.b, z1.b, z2.b, #901294# CHECK-NEXT: [0,2] D======eeeeER . . . . cmla z0.b, z1.b, z2.b, #901295# CHECK-NEXT: [0,3] D==========eeeeER . . . cmla z0.b, z0.b, z1.b, #901296# CHECK-NEXT: [1,0] .D=============eeeeeER . . mul z0.d, z0.d, z0.d1297# CHECK-NEXT: [1,1] .D==================eeeeER . cmla z0.b, z1.b, z2.b, #901298# CHECK-NEXT: [1,2] .D===================eeeeER . cmla z0.b, z1.b, z2.b, #901299# CHECK-NEXT: [1,3] .D=======================eeeeER cmla z0.b, z0.b, z1.b, #901300 1301# CHECK: Average Wait times (based on the timeline view):1302# CHECK-NEXT: [0]: Executions1303# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1304# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1305# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1306 1307# CHECK: [0] [1] [2] [3]1308# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul z0.d, z0.d, z0.d1309# CHECK-NEXT: 1. 2 12.5 0.0 0.0 cmla z0.b, z1.b, z2.b, #901310# CHECK-NEXT: 2. 2 13.5 0.0 0.0 cmla z0.b, z1.b, z2.b, #901311# CHECK-NEXT: 3. 2 17.5 0.0 0.0 cmla z0.b, z0.b, z1.b, #901312# CHECK-NEXT: 2 12.8 0.1 0.0 <total>1313 1314# CHECK: [25] Code Region - Z cmla.d1315 1316# CHECK: Iterations: 1001317# CHECK-NEXT: Instructions: 4001318# CHECK-NEXT: Total Cycles: 18031319# CHECK-NEXT: Total uOps: 5001320 1321# CHECK: Dispatch Width: 51322# CHECK-NEXT: uOps Per Cycle: 0.281323# CHECK-NEXT: IPC: 0.221324# CHECK-NEXT: Block RThroughput: 8.01325 1326# CHECK: Timeline view:1327# CHECK-NEXT: 0123456789 0123456781328# CHECK-NEXT: Index 0123456789 01234567891329 1330# CHECK: [0,0] DeeeeeER . . . . . . . mul z0.d, z0.d, z0.d1331# CHECK-NEXT: [0,1] D=====eeeeeER . . . . . . cmla z0.d, z1.d, z2.d, #901332# CHECK-NEXT: [0,2] D========eeeeeER . . . . . cmla z0.d, z1.d, z2.d, #901333# CHECK-NEXT: [0,3] D=============eeeeeER . . . . cmla z0.d, z0.d, z1.d, #901334# CHECK-NEXT: [1,0] .D=================eeeeeER . . . mul z0.d, z0.d, z0.d1335# CHECK-NEXT: [1,1] .D======================eeeeeER . . cmla z0.d, z1.d, z2.d, #901336# CHECK-NEXT: [1,2] .D=========================eeeeeER . . cmla z0.d, z1.d, z2.d, #901337# CHECK-NEXT: [1,3] .D==============================eeeeeER cmla z0.d, z0.d, z1.d, #901338 1339# CHECK: Average Wait times (based on the timeline view):1340# CHECK-NEXT: [0]: Executions1341# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1342# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1343# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1344 1345# CHECK: [0] [1] [2] [3]1346# CHECK-NEXT: 0. 2 9.5 0.5 0.0 mul z0.d, z0.d, z0.d1347# CHECK-NEXT: 1. 2 14.5 0.0 0.0 cmla z0.d, z1.d, z2.d, #901348# CHECK-NEXT: 2. 2 17.5 0.0 0.0 cmla z0.d, z1.d, z2.d, #901349# CHECK-NEXT: 3. 2 22.5 0.0 0.0 cmla z0.d, z0.d, z1.d, #901350# CHECK-NEXT: 2 16.0 0.1 0.0 <total>1351 1352# CHECK: [26] Code Region - Z sdot.s1353 1354# CHECK: Iterations: 1001355# CHECK-NEXT: Instructions: 4001356# CHECK-NEXT: Total Cycles: 12031357# CHECK-NEXT: Total uOps: 5001358 1359# CHECK: Dispatch Width: 51360# CHECK-NEXT: uOps Per Cycle: 0.421361# CHECK-NEXT: IPC: 0.331362# CHECK-NEXT: Block RThroughput: 2.01363 1364# CHECK: Timeline view:1365# CHECK-NEXT: 01234567891366# CHECK-NEXT: Index 0123456789 01234561367 1368# CHECK: [0,0] DeeeeeER . . . .. mul z0.d, p0/m, z0.d, z0.d1369# CHECK-NEXT: [0,1] D=====eeeER . . .. sdot z0.s, z1.b, z2.b1370# CHECK-NEXT: [0,2] D======eeeER . . .. sdot z0.s, z1.b, z2.b1371# CHECK-NEXT: [0,3] D=========eeeER. . .. sdot z0.s, z0.b, z1.b1372# CHECK-NEXT: [1,0] .D===========eeeeeER. .. mul z0.d, p0/m, z0.d, z0.d1373# CHECK-NEXT: [1,1] .D================eeeER .. sdot z0.s, z1.b, z2.b1374# CHECK-NEXT: [1,2] .D=================eeeER .. sdot z0.s, z1.b, z2.b1375# CHECK-NEXT: [1,3] .D====================eeeER sdot z0.s, z0.b, z1.b1376 1377# CHECK: Average Wait times (based on the timeline view):1378# CHECK-NEXT: [0]: Executions1379# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1380# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1381# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1382 1383# CHECK: [0] [1] [2] [3]1384# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul z0.d, p0/m, z0.d, z0.d1385# CHECK-NEXT: 1. 2 11.5 0.0 0.0 sdot z0.s, z1.b, z2.b1386# CHECK-NEXT: 2. 2 12.5 0.0 0.0 sdot z0.s, z1.b, z2.b1387# CHECK-NEXT: 3. 2 15.5 0.0 0.0 sdot z0.s, z0.b, z1.b1388# CHECK-NEXT: 2 11.5 0.1 0.0 <total>1389 1390# CHECK: [27] Code Region - Z sudot1391 1392# CHECK: Iterations: 1001393# CHECK-NEXT: Instructions: 4001394# CHECK-NEXT: Total Cycles: 12031395# CHECK-NEXT: Total uOps: 5001396 1397# CHECK: Dispatch Width: 51398# CHECK-NEXT: uOps Per Cycle: 0.421399# CHECK-NEXT: IPC: 0.331400# CHECK-NEXT: Block RThroughput: 2.01401 1402# CHECK: Timeline view:1403# CHECK-NEXT: 01234567891404# CHECK-NEXT: Index 0123456789 01234561405 1406# CHECK: [0,0] DeeeeeER . . . .. mul z0.d, p0/m, z0.d, z0.d1407# CHECK-NEXT: [0,1] D=====eeeER . . .. sdot z0.s, z1.b, z2.b[1]1408# CHECK-NEXT: [0,2] D======eeeER . . .. sdot z0.s, z1.b, z2.b[1]1409# CHECK-NEXT: [0,3] D=========eeeER. . .. sdot z0.s, z0.b, z1.b[1]1410# CHECK-NEXT: [1,0] .D===========eeeeeER. .. mul z0.d, p0/m, z0.d, z0.d1411# CHECK-NEXT: [1,1] .D================eeeER .. sdot z0.s, z1.b, z2.b[1]1412# CHECK-NEXT: [1,2] .D=================eeeER .. sdot z0.s, z1.b, z2.b[1]1413# CHECK-NEXT: [1,3] .D====================eeeER sdot z0.s, z0.b, z1.b[1]1414 1415# CHECK: Average Wait times (based on the timeline view):1416# CHECK-NEXT: [0]: Executions1417# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1418# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1419# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1420 1421# CHECK: [0] [1] [2] [3]1422# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul z0.d, p0/m, z0.d, z0.d1423# CHECK-NEXT: 1. 2 11.5 0.0 0.0 sdot z0.s, z1.b, z2.b[1]1424# CHECK-NEXT: 2. 2 12.5 0.0 0.0 sdot z0.s, z1.b, z2.b[1]1425# CHECK-NEXT: 3. 2 15.5 0.0 0.0 sdot z0.s, z0.b, z1.b[1]1426# CHECK-NEXT: 2 11.5 0.1 0.0 <total>1427 1428# CHECK: [28] Code Region - Z sdot.d1429 1430# CHECK: Iterations: 1001431# CHECK-NEXT: Instructions: 4001432# CHECK-NEXT: Total Cycles: 14031433# CHECK-NEXT: Total uOps: 5001434 1435# CHECK: Dispatch Width: 51436# CHECK-NEXT: uOps Per Cycle: 0.361437# CHECK-NEXT: IPC: 0.291438# CHECK-NEXT: Block RThroughput: 5.01439 1440# CHECK: Timeline view:1441# CHECK-NEXT: 0123456789 01442# CHECK-NEXT: Index 0123456789 01234567891443 1444# CHECK: [0,0] DeeeeeER . . . . . mul z0.d, z0.d, z0.d1445# CHECK-NEXT: [0,1] D=====eeeeER . . . . sdot z0.d, z1.h, z2.h1446# CHECK-NEXT: [0,2] D======eeeeER . . . . sdot z0.d, z1.h, z2.h1447# CHECK-NEXT: [0,3] D==========eeeeER . . . sdot z0.d, z0.h, z1.h1448# CHECK-NEXT: [1,0] .D=============eeeeeER . . mul z0.d, z0.d, z0.d1449# CHECK-NEXT: [1,1] .D==================eeeeER . sdot z0.d, z1.h, z2.h1450# CHECK-NEXT: [1,2] .D===================eeeeER . sdot z0.d, z1.h, z2.h1451# CHECK-NEXT: [1,3] .D=======================eeeeER sdot z0.d, z0.h, z1.h1452 1453# CHECK: Average Wait times (based on the timeline view):1454# CHECK-NEXT: [0]: Executions1455# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1456# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1457# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1458 1459# CHECK: [0] [1] [2] [3]1460# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul z0.d, z0.d, z0.d1461# CHECK-NEXT: 1. 2 12.5 0.0 0.0 sdot z0.d, z1.h, z2.h1462# CHECK-NEXT: 2. 2 13.5 0.0 0.0 sdot z0.d, z1.h, z2.h1463# CHECK-NEXT: 3. 2 17.5 0.0 0.0 sdot z0.d, z0.h, z1.h1464# CHECK-NEXT: 2 12.8 0.1 0.0 <total>1465 1466# CHECK: [29] Code Region - Z smmla1467 1468# CHECK: Iterations: 1001469# CHECK-NEXT: Instructions: 4001470# CHECK-NEXT: Total Cycles: 11031471# CHECK-NEXT: Total uOps: 4001472 1473# CHECK: Dispatch Width: 51474# CHECK-NEXT: uOps Per Cycle: 0.361475# CHECK-NEXT: IPC: 0.361476# CHECK-NEXT: Block RThroughput: 1.51477 1478# CHECK: Timeline view:1479# CHECK-NEXT: 01234567891480# CHECK-NEXT: Index 0123456789 012341481 1482# CHECK: [0,0] DeeeeER . . . . mul z0.s, z0.s, z0.s1483# CHECK-NEXT: [0,1] D====eeeER. . . . smmla z0.s, z1.b, z2.b1484# CHECK-NEXT: [0,2] D=====eeeER . . . smmla z0.s, z1.b, z2.b1485# CHECK-NEXT: [0,3] D========eeeER . . . smmla z0.s, z0.b, z1.b1486# CHECK-NEXT: [1,0] D===========eeeeER . . mul z0.s, z0.s, z0.s1487# CHECK-NEXT: [1,1] .D==============eeeER . smmla z0.s, z1.b, z2.b1488# CHECK-NEXT: [1,2] .D===============eeeER . smmla z0.s, z1.b, z2.b1489# CHECK-NEXT: [1,3] .D==================eeeER smmla z0.s, z0.b, z1.b1490 1491# CHECK: Average Wait times (based on the timeline view):1492# CHECK-NEXT: [0]: Executions1493# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1494# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1495# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1496 1497# CHECK: [0] [1] [2] [3]1498# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul z0.s, z0.s, z0.s1499# CHECK-NEXT: 1. 2 10.0 0.0 0.0 smmla z0.s, z1.b, z2.b1500# CHECK-NEXT: 2. 2 11.0 0.0 0.0 smmla z0.s, z1.b, z2.b1501# CHECK-NEXT: 3. 2 14.0 0.0 0.0 smmla z0.s, z0.b, z1.b1502# CHECK-NEXT: 2 10.4 0.1 0.0 <total>1503 1504# CHECK: [30] Code Region - Z mla.b1505 1506# CHECK: Iterations: 1001507# CHECK-NEXT: Instructions: 4001508# CHECK-NEXT: Total Cycles: 14031509# CHECK-NEXT: Total uOps: 5001510 1511# CHECK: Dispatch Width: 51512# CHECK-NEXT: uOps Per Cycle: 0.361513# CHECK-NEXT: IPC: 0.291514# CHECK-NEXT: Block RThroughput: 5.01515 1516# CHECK: Timeline view:1517# CHECK-NEXT: 0123456789 01518# CHECK-NEXT: Index 0123456789 01234567891519 1520# CHECK: [0,0] DeeeeeER . . . . . mul z0.d, z0.d, z0.d1521# CHECK-NEXT: [0,1] D=====eeeeER . . . . mla z0.b, p0/m, z1.b, z2.b1522# CHECK-NEXT: [0,2] D======eeeeER . . . . mla z0.b, p0/m, z1.b, z2.b1523# CHECK-NEXT: [0,3] D==========eeeeER . . . mla z0.b, p0/m, z0.b, z1.b1524# CHECK-NEXT: [1,0] .D=============eeeeeER . . mul z0.d, z0.d, z0.d1525# CHECK-NEXT: [1,1] .D==================eeeeER . mla z0.b, p0/m, z1.b, z2.b1526# CHECK-NEXT: [1,2] .D===================eeeeER . mla z0.b, p0/m, z1.b, z2.b1527# CHECK-NEXT: [1,3] .D=======================eeeeER mla z0.b, p0/m, z0.b, z1.b1528 1529# CHECK: Average Wait times (based on the timeline view):1530# CHECK-NEXT: [0]: Executions1531# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1532# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1533# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1534 1535# CHECK: [0] [1] [2] [3]1536# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul z0.d, z0.d, z0.d1537# CHECK-NEXT: 1. 2 12.5 0.0 0.0 mla z0.b, p0/m, z1.b, z2.b1538# CHECK-NEXT: 2. 2 13.5 0.0 0.0 mla z0.b, p0/m, z1.b, z2.b1539# CHECK-NEXT: 3. 2 17.5 0.0 0.0 mla z0.b, p0/m, z0.b, z1.b1540# CHECK-NEXT: 2 12.8 0.1 0.0 <total>1541 1542# CHECK: [31] Code Region - Z mla.d1543 1544# CHECK: Iterations: 1001545# CHECK-NEXT: Instructions: 4001546# CHECK-NEXT: Total Cycles: 18031547# CHECK-NEXT: Total uOps: 5001548 1549# CHECK: Dispatch Width: 51550# CHECK-NEXT: uOps Per Cycle: 0.281551# CHECK-NEXT: IPC: 0.221552# CHECK-NEXT: Block RThroughput: 8.01553 1554# CHECK: Timeline view:1555# CHECK-NEXT: 0123456789 0123456781556# CHECK-NEXT: Index 0123456789 01234567891557 1558# CHECK: [0,0] DeeeeeER . . . . . . . mul z0.d, z0.d, z0.d1559# CHECK-NEXT: [0,1] D=====eeeeeER . . . . . . mla z0.d, p0/m, z1.d, z2.d1560# CHECK-NEXT: [0,2] D========eeeeeER . . . . . mla z0.d, p0/m, z1.d, z2.d1561# CHECK-NEXT: [0,3] D=============eeeeeER . . . . mla z0.d, p0/m, z0.d, z1.d1562# CHECK-NEXT: [1,0] .D=================eeeeeER . . . mul z0.d, z0.d, z0.d1563# CHECK-NEXT: [1,1] .D======================eeeeeER . . mla z0.d, p0/m, z1.d, z2.d1564# CHECK-NEXT: [1,2] .D=========================eeeeeER . . mla z0.d, p0/m, z1.d, z2.d1565# CHECK-NEXT: [1,3] .D==============================eeeeeER mla z0.d, p0/m, z0.d, z1.d1566 1567# CHECK: Average Wait times (based on the timeline view):1568# CHECK-NEXT: [0]: Executions1569# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1570# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1571# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1572 1573# CHECK: [0] [1] [2] [3]1574# CHECK-NEXT: 0. 2 9.5 0.5 0.0 mul z0.d, z0.d, z0.d1575# CHECK-NEXT: 1. 2 14.5 0.0 0.0 mla z0.d, p0/m, z1.d, z2.d1576# CHECK-NEXT: 2. 2 17.5 0.0 0.0 mla z0.d, p0/m, z1.d, z2.d1577# CHECK-NEXT: 3. 2 22.5 0.0 0.0 mla z0.d, p0/m, z0.d, z1.d1578# CHECK-NEXT: 2 16.0 0.1 0.0 <total>1579 1580# CHECK: [32] Code Region - Z smlalb1581 1582# CHECK: Iterations: 1001583# CHECK-NEXT: Instructions: 4001584# CHECK-NEXT: Total Cycles: 14031585# CHECK-NEXT: Total uOps: 5001586 1587# CHECK: Dispatch Width: 51588# CHECK-NEXT: uOps Per Cycle: 0.361589# CHECK-NEXT: IPC: 0.291590# CHECK-NEXT: Block RThroughput: 5.01591 1592# CHECK: Timeline view:1593# CHECK-NEXT: 0123456789 01594# CHECK-NEXT: Index 0123456789 01234567891595 1596# CHECK: [0,0] DeeeeeER . . . . . mul z0.d, z0.d, z0.d1597# CHECK-NEXT: [0,1] D=====eeeeER . . . . smlalb z0.d, z1.s, z2.s1598# CHECK-NEXT: [0,2] D======eeeeER . . . . smlalb z0.d, z1.s, z2.s1599# CHECK-NEXT: [0,3] D==========eeeeER . . . smlalb z0.d, z0.s, z1.s1600# CHECK-NEXT: [1,0] .D=============eeeeeER . . mul z0.d, z0.d, z0.d1601# CHECK-NEXT: [1,1] .D==================eeeeER . smlalb z0.d, z1.s, z2.s1602# CHECK-NEXT: [1,2] .D===================eeeeER . smlalb z0.d, z1.s, z2.s1603# CHECK-NEXT: [1,3] .D=======================eeeeER smlalb z0.d, z0.s, z1.s1604 1605# CHECK: Average Wait times (based on the timeline view):1606# CHECK-NEXT: [0]: Executions1607# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1608# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1609# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1610 1611# CHECK: [0] [1] [2] [3]1612# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul z0.d, z0.d, z0.d1613# CHECK-NEXT: 1. 2 12.5 0.0 0.0 smlalb z0.d, z1.s, z2.s1614# CHECK-NEXT: 2. 2 13.5 0.0 0.0 smlalb z0.d, z1.s, z2.s1615# CHECK-NEXT: 3. 2 17.5 0.0 0.0 smlalb z0.d, z0.s, z1.s1616# CHECK-NEXT: 2 12.8 0.1 0.0 <total>1617 1618# CHECK: [33] Code Region - Z sqdmlalb1619 1620# CHECK: Iterations: 1001621# CHECK-NEXT: Instructions: 4001622# CHECK-NEXT: Total Cycles: 15031623# CHECK-NEXT: Total uOps: 5001624 1625# CHECK: Dispatch Width: 51626# CHECK-NEXT: uOps Per Cycle: 0.331627# CHECK-NEXT: IPC: 0.271628# CHECK-NEXT: Block RThroughput: 5.01629 1630# CHECK: Timeline view:1631# CHECK-NEXT: 0123456789 0121632# CHECK-NEXT: Index 0123456789 01234567891633 1634# CHECK: [0,0] DeeeeeER . . . . . . mul z0.d, z0.d, z0.d1635# CHECK-NEXT: [0,1] D=====eeeeER . . . . . sqdmlalb z0.d, z1.s, z2.s1636# CHECK-NEXT: [0,2] D=======eeeeER . . . . . sqdmlalb z0.d, z1.s, z2.s1637# CHECK-NEXT: [0,3] D===========eeeeER . . . . sqdmlalb z0.d, z0.s, z1.s1638# CHECK-NEXT: [1,0] .D==============eeeeeER . . . mul z0.d, z0.d, z0.d1639# CHECK-NEXT: [1,1] .D===================eeeeER . . sqdmlalb z0.d, z1.s, z2.s1640# CHECK-NEXT: [1,2] .D=====================eeeeER . . sqdmlalb z0.d, z1.s, z2.s1641# CHECK-NEXT: [1,3] .D=========================eeeeER sqdmlalb z0.d, z0.s, z1.s1642 1643# CHECK: Average Wait times (based on the timeline view):1644# CHECK-NEXT: [0]: Executions1645# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1646# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1647# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1648 1649# CHECK: [0] [1] [2] [3]1650# CHECK-NEXT: 0. 2 8.0 0.5 0.0 mul z0.d, z0.d, z0.d1651# CHECK-NEXT: 1. 2 13.0 0.0 0.0 sqdmlalb z0.d, z1.s, z2.s1652# CHECK-NEXT: 2. 2 15.0 0.0 0.0 sqdmlalb z0.d, z1.s, z2.s1653# CHECK-NEXT: 3. 2 19.0 0.0 0.0 sqdmlalb z0.d, z0.s, z1.s1654# CHECK-NEXT: 2 13.8 0.1 0.0 <total>1655 1656# CHECK: [34] Code Region - Z sqrdmlah.b1657 1658# CHECK: Iterations: 1001659# CHECK-NEXT: Instructions: 4001660# CHECK-NEXT: Total Cycles: 15031661# CHECK-NEXT: Total uOps: 5001662 1663# CHECK: Dispatch Width: 51664# CHECK-NEXT: uOps Per Cycle: 0.331665# CHECK-NEXT: IPC: 0.271666# CHECK-NEXT: Block RThroughput: 5.01667 1668# CHECK: Timeline view:1669# CHECK-NEXT: 0123456789 0121670# CHECK-NEXT: Index 0123456789 01234567891671 1672# CHECK: [0,0] DeeeeeER . . . . . . mul z0.d, z0.d, z0.d1673# CHECK-NEXT: [0,1] D=====eeeeER . . . . . sqrdmlah z0.b, z1.b, z2.b1674# CHECK-NEXT: [0,2] D=======eeeeER . . . . . sqrdmlah z0.b, z1.b, z2.b1675# CHECK-NEXT: [0,3] D===========eeeeER . . . . sqrdmlah z0.b, z0.b, z1.b1676# CHECK-NEXT: [1,0] .D==============eeeeeER . . . mul z0.d, z0.d, z0.d1677# CHECK-NEXT: [1,1] .D===================eeeeER . . sqrdmlah z0.b, z1.b, z2.b1678# CHECK-NEXT: [1,2] .D=====================eeeeER . . sqrdmlah z0.b, z1.b, z2.b1679# CHECK-NEXT: [1,3] .D=========================eeeeER sqrdmlah z0.b, z0.b, z1.b1680 1681# CHECK: Average Wait times (based on the timeline view):1682# CHECK-NEXT: [0]: Executions1683# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1684# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1685# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1686 1687# CHECK: [0] [1] [2] [3]1688# CHECK-NEXT: 0. 2 8.0 0.5 0.0 mul z0.d, z0.d, z0.d1689# CHECK-NEXT: 1. 2 13.0 0.0 0.0 sqrdmlah z0.b, z1.b, z2.b1690# CHECK-NEXT: 2. 2 15.0 0.0 0.0 sqrdmlah z0.b, z1.b, z2.b1691# CHECK-NEXT: 3. 2 19.0 0.0 0.0 sqrdmlah z0.b, z0.b, z1.b1692# CHECK-NEXT: 2 13.8 0.1 0.0 <total>1693 1694# CHECK: [35] Code Region - Z sqrdmlah.d1695 1696# CHECK: Iterations: 1001697# CHECK-NEXT: Instructions: 4001698# CHECK-NEXT: Total Cycles: 18031699# CHECK-NEXT: Total uOps: 5001700 1701# CHECK: Dispatch Width: 51702# CHECK-NEXT: uOps Per Cycle: 0.281703# CHECK-NEXT: IPC: 0.221704# CHECK-NEXT: Block RThroughput: 8.01705 1706# CHECK: Timeline view:1707# CHECK-NEXT: 0123456789 0123456781708# CHECK-NEXT: Index 0123456789 01234567891709 1710# CHECK: [0,0] DeeeeeER . . . . . . . mul z0.d, z0.d, z0.d1711# CHECK-NEXT: [0,1] D=====eeeeeER . . . . . . sqrdmlah z0.d, z1.d, z2.d1712# CHECK-NEXT: [0,2] D========eeeeeER . . . . . sqrdmlah z0.d, z1.d, z2.d1713# CHECK-NEXT: [0,3] D=============eeeeeER . . . . sqrdmlah z0.d, z0.d, z1.d1714# CHECK-NEXT: [1,0] .D=================eeeeeER . . . mul z0.d, z0.d, z0.d1715# CHECK-NEXT: [1,1] .D======================eeeeeER . . sqrdmlah z0.d, z1.d, z2.d1716# CHECK-NEXT: [1,2] .D=========================eeeeeER . . sqrdmlah z0.d, z1.d, z2.d1717# CHECK-NEXT: [1,3] .D==============================eeeeeER sqrdmlah z0.d, z0.d, z1.d1718 1719# CHECK: Average Wait times (based on the timeline view):1720# CHECK-NEXT: [0]: Executions1721# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1722# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1723# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1724 1725# CHECK: [0] [1] [2] [3]1726# CHECK-NEXT: 0. 2 9.5 0.5 0.0 mul z0.d, z0.d, z0.d1727# CHECK-NEXT: 1. 2 14.5 0.0 0.0 sqrdmlah z0.d, z1.d, z2.d1728# CHECK-NEXT: 2. 2 17.5 0.0 0.0 sqrdmlah z0.d, z1.d, z2.d1729# CHECK-NEXT: 3. 2 22.5 0.0 0.0 sqrdmlah z0.d, z0.d, z1.d1730# CHECK-NEXT: 2 16.0 0.1 0.0 <total>1731 1732# CHECK: [36] Code Region - Z fcmla ZPmZZ1733 1734# CHECK: Iterations: 1001735# CHECK-NEXT: Instructions: 4001736# CHECK-NEXT: Total Cycles: 13031737# CHECK-NEXT: Total uOps: 4001738 1739# CHECK: Dispatch Width: 51740# CHECK-NEXT: uOps Per Cycle: 0.311741# CHECK-NEXT: IPC: 0.311742# CHECK-NEXT: Block RThroughput: 2.01743 1744# CHECK: Timeline view:1745# CHECK-NEXT: 01234567891746# CHECK-NEXT: Index 0123456789 0123456781747 1748# CHECK: [0,0] DeeeER . . . . . fmul z0.d, z0.d, z0.d1749# CHECK-NEXT: [0,1] D===eeeeER. . . . . fcmla z0.d, p0/m, z1.d, z2.d, #901750# CHECK-NEXT: [0,2] D=====eeeeER . . . . fcmla z0.d, p0/m, z1.d, z2.d, #901751# CHECK-NEXT: [0,3] D=========eeeeER . . . fcmla z0.d, p0/m, z0.d, z1.d, #901752# CHECK-NEXT: [1,0] D=============eeeER . . . fmul z0.d, z0.d, z0.d1753# CHECK-NEXT: [1,1] .D===============eeeeER . . fcmla z0.d, p0/m, z1.d, z2.d, #901754# CHECK-NEXT: [1,2] .D=================eeeeER. . fcmla z0.d, p0/m, z1.d, z2.d, #901755# CHECK-NEXT: [1,3] .D=====================eeeeER fcmla z0.d, p0/m, z0.d, z1.d, #901756 1757# CHECK: Average Wait times (based on the timeline view):1758# CHECK-NEXT: [0]: Executions1759# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1760# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1761# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1762 1763# CHECK: [0] [1] [2] [3]1764# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul z0.d, z0.d, z0.d1765# CHECK-NEXT: 1. 2 10.0 0.0 0.0 fcmla z0.d, p0/m, z1.d, z2.d, #901766# CHECK-NEXT: 2. 2 12.0 0.0 0.0 fcmla z0.d, p0/m, z1.d, z2.d, #901767# CHECK-NEXT: 3. 2 16.0 0.0 0.0 fcmla z0.d, p0/m, z0.d, z1.d, #901768# CHECK-NEXT: 2 11.4 0.1 0.0 <total>1769 1770# CHECK: [37] Code Region - Z fcmla ZZZI1771 1772# CHECK: Iterations: 1001773# CHECK-NEXT: Instructions: 4001774# CHECK-NEXT: Total Cycles: 13031775# CHECK-NEXT: Total uOps: 4001776 1777# CHECK: Dispatch Width: 51778# CHECK-NEXT: uOps Per Cycle: 0.311779# CHECK-NEXT: IPC: 0.311780# CHECK-NEXT: Block RThroughput: 2.01781 1782# CHECK: Timeline view:1783# CHECK-NEXT: 01234567891784# CHECK-NEXT: Index 0123456789 0123456781785 1786# CHECK: [0,0] DeeeER . . . . . fmul z0.d, z0.d, z0.d1787# CHECK-NEXT: [0,1] D===eeeeER. . . . . fcmla z0.s, z1.s, z2.s[1], #901788# CHECK-NEXT: [0,2] D=====eeeeER . . . . fcmla z0.s, z1.s, z2.s[1], #901789# CHECK-NEXT: [0,3] D=========eeeeER . . . fcmla z0.s, z0.s, z1.s[1], #901790# CHECK-NEXT: [1,0] D=============eeeER . . . fmul z0.d, z0.d, z0.d1791# CHECK-NEXT: [1,1] .D===============eeeeER . . fcmla z0.s, z1.s, z2.s[1], #901792# CHECK-NEXT: [1,2] .D=================eeeeER. . fcmla z0.s, z1.s, z2.s[1], #901793# CHECK-NEXT: [1,3] .D=====================eeeeER fcmla z0.s, z0.s, z1.s[1], #901794 1795# CHECK: Average Wait times (based on the timeline view):1796# CHECK-NEXT: [0]: Executions1797# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1798# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1799# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1800 1801# CHECK: [0] [1] [2] [3]1802# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul z0.d, z0.d, z0.d1803# CHECK-NEXT: 1. 2 10.0 0.0 0.0 fcmla z0.s, z1.s, z2.s[1], #901804# CHECK-NEXT: 2. 2 12.0 0.0 0.0 fcmla z0.s, z1.s, z2.s[1], #901805# CHECK-NEXT: 3. 2 16.0 0.0 0.0 fcmla z0.s, z0.s, z1.s[1], #901806# CHECK-NEXT: 2 11.4 0.1 0.0 <total>1807 1808# CHECK: [38] Code Region - Z fmla ZPmZZ1809 1810# CHECK: Iterations: 1001811# CHECK-NEXT: Instructions: 4001812# CHECK-NEXT: Total Cycles: 13031813# CHECK-NEXT: Total uOps: 4001814 1815# CHECK: Dispatch Width: 51816# CHECK-NEXT: uOps Per Cycle: 0.311817# CHECK-NEXT: IPC: 0.311818# CHECK-NEXT: Block RThroughput: 2.01819 1820# CHECK: Timeline view:1821# CHECK-NEXT: 01234567891822# CHECK-NEXT: Index 0123456789 0123456781823 1824# CHECK: [0,0] DeeeER . . . . . fmul z0.d, z0.d, z0.d1825# CHECK-NEXT: [0,1] D===eeeeER. . . . . fmla z0.d, p0/m, z1.d, z2.d1826# CHECK-NEXT: [0,2] D=====eeeeER . . . . fmla z0.d, p0/m, z1.d, z2.d1827# CHECK-NEXT: [0,3] D=========eeeeER . . . fmla z0.d, p0/m, z0.d, z1.d1828# CHECK-NEXT: [1,0] D=============eeeER . . . fmul z0.d, z0.d, z0.d1829# CHECK-NEXT: [1,1] .D===============eeeeER . . fmla z0.d, p0/m, z1.d, z2.d1830# CHECK-NEXT: [1,2] .D=================eeeeER. . fmla z0.d, p0/m, z1.d, z2.d1831# CHECK-NEXT: [1,3] .D=====================eeeeER fmla z0.d, p0/m, z0.d, z1.d1832 1833# CHECK: Average Wait times (based on the timeline view):1834# CHECK-NEXT: [0]: Executions1835# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1836# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1837# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1838 1839# CHECK: [0] [1] [2] [3]1840# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul z0.d, z0.d, z0.d1841# CHECK-NEXT: 1. 2 10.0 0.0 0.0 fmla z0.d, p0/m, z1.d, z2.d1842# CHECK-NEXT: 2. 2 12.0 0.0 0.0 fmla z0.d, p0/m, z1.d, z2.d1843# CHECK-NEXT: 3. 2 16.0 0.0 0.0 fmla z0.d, p0/m, z0.d, z1.d1844# CHECK-NEXT: 2 11.4 0.1 0.0 <total>1845 1846# CHECK: [39] Code Region - Z fmla ZZZI1847 1848# CHECK: Iterations: 1001849# CHECK-NEXT: Instructions: 4001850# CHECK-NEXT: Total Cycles: 13031851# CHECK-NEXT: Total uOps: 4001852 1853# CHECK: Dispatch Width: 51854# CHECK-NEXT: uOps Per Cycle: 0.311855# CHECK-NEXT: IPC: 0.311856# CHECK-NEXT: Block RThroughput: 2.01857 1858# CHECK: Timeline view:1859# CHECK-NEXT: 01234567891860# CHECK-NEXT: Index 0123456789 0123456781861 1862# CHECK: [0,0] DeeeER . . . . . fmul z0.d, z0.d, z0.d1863# CHECK-NEXT: [0,1] D===eeeeER. . . . . fmla z0.d, z1.d, z2.d[1]1864# CHECK-NEXT: [0,2] D=====eeeeER . . . . fmla z0.d, z1.d, z2.d[1]1865# CHECK-NEXT: [0,3] D=========eeeeER . . . fmla z0.d, z0.d, z1.d[1]1866# CHECK-NEXT: [1,0] D=============eeeER . . . fmul z0.d, z0.d, z0.d1867# CHECK-NEXT: [1,1] .D===============eeeeER . . fmla z0.d, z1.d, z2.d[1]1868# CHECK-NEXT: [1,2] .D=================eeeeER. . fmla z0.d, z1.d, z2.d[1]1869# CHECK-NEXT: [1,3] .D=====================eeeeER fmla z0.d, z0.d, z1.d[1]1870 1871# CHECK: Average Wait times (based on the timeline view):1872# CHECK-NEXT: [0]: Executions1873# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1874# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1875# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1876 1877# CHECK: [0] [1] [2] [3]1878# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul z0.d, z0.d, z0.d1879# CHECK-NEXT: 1. 2 10.0 0.0 0.0 fmla z0.d, z1.d, z2.d[1]1880# CHECK-NEXT: 2. 2 12.0 0.0 0.0 fmla z0.d, z1.d, z2.d[1]1881# CHECK-NEXT: 3. 2 16.0 0.0 0.0 fmla z0.d, z0.d, z1.d[1]1882# CHECK-NEXT: 2 11.4 0.1 0.0 <total>1883 1884# CHECK: [40] Code Region - Z fmlalb ZZZ1885 1886# CHECK: Iterations: 1001887# CHECK-NEXT: Instructions: 4001888# CHECK-NEXT: Total Cycles: 13031889# CHECK-NEXT: Total uOps: 4001890 1891# CHECK: Dispatch Width: 51892# CHECK-NEXT: uOps Per Cycle: 0.311893# CHECK-NEXT: IPC: 0.311894# CHECK-NEXT: Block RThroughput: 2.01895 1896# CHECK: Timeline view:1897# CHECK-NEXT: 01234567891898# CHECK-NEXT: Index 0123456789 0123456781899 1900# CHECK: [0,0] DeeeER . . . . . fmul z0.d, z0.d, z0.d1901# CHECK-NEXT: [0,1] D===eeeeER. . . . . fmlalb z0.s, z1.h, z2.h1902# CHECK-NEXT: [0,2] D=====eeeeER . . . . fmlalb z0.s, z1.h, z2.h1903# CHECK-NEXT: [0,3] D=========eeeeER . . . fmlalb z0.s, z0.h, z1.h1904# CHECK-NEXT: [1,0] D=============eeeER . . . fmul z0.d, z0.d, z0.d1905# CHECK-NEXT: [1,1] .D===============eeeeER . . fmlalb z0.s, z1.h, z2.h1906# CHECK-NEXT: [1,2] .D=================eeeeER. . fmlalb z0.s, z1.h, z2.h1907# CHECK-NEXT: [1,3] .D=====================eeeeER fmlalb z0.s, z0.h, z1.h1908 1909# CHECK: Average Wait times (based on the timeline view):1910# CHECK-NEXT: [0]: Executions1911# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1912# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1913# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1914 1915# CHECK: [0] [1] [2] [3]1916# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul z0.d, z0.d, z0.d1917# CHECK-NEXT: 1. 2 10.0 0.0 0.0 fmlalb z0.s, z1.h, z2.h1918# CHECK-NEXT: 2. 2 12.0 0.0 0.0 fmlalb z0.s, z1.h, z2.h1919# CHECK-NEXT: 3. 2 16.0 0.0 0.0 fmlalb z0.s, z0.h, z1.h1920# CHECK-NEXT: 2 11.4 0.1 0.0 <total>1921 1922# CHECK: [41] Code Region - Z bfdot1923 1924# CHECK: Iterations: 1001925# CHECK-NEXT: Instructions: 4001926# CHECK-NEXT: Total Cycles: 13031927# CHECK-NEXT: Total uOps: 4001928 1929# CHECK: Dispatch Width: 51930# CHECK-NEXT: uOps Per Cycle: 0.311931# CHECK-NEXT: IPC: 0.311932# CHECK-NEXT: Block RThroughput: 2.01933 1934# CHECK: Timeline view:1935# CHECK-NEXT: 01234567891936# CHECK-NEXT: Index 0123456789 0123456781937 1938# CHECK: [0,0] DeeeER . . . . . fmul z0.d, z0.d, z0.d1939# CHECK-NEXT: [0,1] D===eeeeER. . . . . bfdot z0.s, z1.h, z2.h1940# CHECK-NEXT: [0,2] D=====eeeeER . . . . bfdot z0.s, z1.h, z2.h1941# CHECK-NEXT: [0,3] D=========eeeeER . . . bfdot z0.s, z0.h, z1.h1942# CHECK-NEXT: [1,0] D=============eeeER . . . fmul z0.d, z0.d, z0.d1943# CHECK-NEXT: [1,1] .D===============eeeeER . . bfdot z0.s, z1.h, z2.h1944# CHECK-NEXT: [1,2] .D=================eeeeER. . bfdot z0.s, z1.h, z2.h1945# CHECK-NEXT: [1,3] .D=====================eeeeER bfdot z0.s, z0.h, z1.h1946 1947# CHECK: Average Wait times (based on the timeline view):1948# CHECK-NEXT: [0]: Executions1949# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1950# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1951# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1952 1953# CHECK: [0] [1] [2] [3]1954# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul z0.d, z0.d, z0.d1955# CHECK-NEXT: 1. 2 10.0 0.0 0.0 bfdot z0.s, z1.h, z2.h1956# CHECK-NEXT: 2. 2 12.0 0.0 0.0 bfdot z0.s, z1.h, z2.h1957# CHECK-NEXT: 3. 2 16.0 0.0 0.0 bfdot z0.s, z0.h, z1.h1958# CHECK-NEXT: 2 11.4 0.1 0.0 <total>1959 1960# CHECK: [42] Code Region - Z bfmmla1961 1962# CHECK: Iterations: 1001963# CHECK-NEXT: Instructions: 4001964# CHECK-NEXT: Total Cycles: 16031965# CHECK-NEXT: Total uOps: 4001966 1967# CHECK: Dispatch Width: 51968# CHECK-NEXT: uOps Per Cycle: 0.251969# CHECK-NEXT: IPC: 0.251970# CHECK-NEXT: Block RThroughput: 2.01971 1972# CHECK: Timeline view:1973# CHECK-NEXT: 0123456789 012341974# CHECK-NEXT: Index 0123456789 01234567891975 1976# CHECK: [0,0] DeeeER . . . . . . fmul z0.d, z0.d, z0.d1977# CHECK-NEXT: [0,1] D===eeeeeER . . . . . bfmmla z0.s, z1.h, z2.h1978# CHECK-NEXT: [0,2] D======eeeeeER . . . . . bfmmla z0.s, z1.h, z2.h1979# CHECK-NEXT: [0,3] D===========eeeeeER . . . . bfmmla z0.s, z0.h, z1.h1980# CHECK-NEXT: [1,0] D================eeeER . . . fmul z0.d, z0.d, z0.d1981# CHECK-NEXT: [1,1] .D==================eeeeeER . . bfmmla z0.s, z1.h, z2.h1982# CHECK-NEXT: [1,2] .D=====================eeeeeER. . bfmmla z0.s, z1.h, z2.h1983# CHECK-NEXT: [1,3] .D==========================eeeeeER bfmmla z0.s, z0.h, z1.h1984 1985# CHECK: Average Wait times (based on the timeline view):1986# CHECK-NEXT: [0]: Executions1987# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1988# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1989# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1990 1991# CHECK: [0] [1] [2] [3]1992# CHECK-NEXT: 0. 2 9.0 0.5 0.0 fmul z0.d, z0.d, z0.d1993# CHECK-NEXT: 1. 2 11.5 0.0 0.0 bfmmla z0.s, z1.h, z2.h1994# CHECK-NEXT: 2. 2 14.5 0.0 0.0 bfmmla z0.s, z1.h, z2.h1995# CHECK-NEXT: 3. 2 19.5 0.0 0.0 bfmmla z0.s, z0.h, z1.h1996# CHECK-NEXT: 2 13.6 0.1 0.0 <total>1997 1998# CHECK: [43] Code Region - bfmlalb1999 2000# CHECK: Iterations: 1002001# CHECK-NEXT: Instructions: 4002002# CHECK-NEXT: Total Cycles: 13032003# CHECK-NEXT: Total uOps: 4002004 2005# CHECK: Dispatch Width: 52006# CHECK-NEXT: uOps Per Cycle: 0.312007# CHECK-NEXT: IPC: 0.312008# CHECK-NEXT: Block RThroughput: 2.02009 2010# CHECK: Timeline view:2011# CHECK-NEXT: 01234567892012# CHECK-NEXT: Index 0123456789 0123456782013 2014# CHECK: [0,0] DeeeER . . . . . fmul z0.d, z0.d, z0.d2015# CHECK-NEXT: [0,1] D===eeeeER. . . . . bfmlalb z0.s, z1.h, z2.h2016# CHECK-NEXT: [0,2] D=====eeeeER . . . . bfmlalb z0.s, z1.h, z2.h2017# CHECK-NEXT: [0,3] D=========eeeeER . . . bfmlalb z0.s, z0.h, z1.h2018# CHECK-NEXT: [1,0] D=============eeeER . . . fmul z0.d, z0.d, z0.d2019# CHECK-NEXT: [1,1] .D===============eeeeER . . bfmlalb z0.s, z1.h, z2.h2020# CHECK-NEXT: [1,2] .D=================eeeeER. . bfmlalb z0.s, z1.h, z2.h2021# CHECK-NEXT: [1,3] .D=====================eeeeER bfmlalb z0.s, z0.h, z1.h2022 2023# CHECK: Average Wait times (based on the timeline view):2024# CHECK-NEXT: [0]: Executions2025# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue2026# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready2027# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage2028 2029# CHECK: [0] [1] [2] [3]2030# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul z0.d, z0.d, z0.d2031# CHECK-NEXT: 1. 2 10.0 0.0 0.0 bfmlalb z0.s, z1.h, z2.h2032# CHECK-NEXT: 2. 2 12.0 0.0 0.0 bfmlalb z0.s, z1.h, z2.h2033# CHECK-NEXT: 3. 2 16.0 0.0 0.0 bfmlalb z0.s, z0.h, z1.h2034# CHECK-NEXT: 2 11.4 0.1 0.0 <total>2035