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1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py2# RUN: llvm-mca -mtriple=aarch64 -mcpu=neoverse-v1 -mattr=+sve --instruction-info=0 --resource-pressure=0 --timeline --timeline-max-iterations=2 < %s | FileCheck %s3 4# LLVM-MCA-BEGIN madd5mul x0, x0, x06madd x0, x1, x2, x07madd x0, x1, x2, x08madd x0, x0, x0, x09# LLVM-MCA-END10 11# LLVM-MCA-BEGIN smaddl12mul x0, x0, x013smaddl x0, w1, w2, x014smaddl x0, w1, w2, x015smaddl x0, w0, w0, x016# LLVM-MCA-END17 18# LLVM-MCA-BEGIN fmadd19fadd d0, d0, d020fmadd d0, d1, d2, d021fmul d0, d0, d022fmadd d0, d1, d2, d023fmadd d0, d1, d2, d024fmadd d0, d0, d1, d225# LLVM-MCA-END26 27# LLVM-MCA-BEGIN saba28mul v0.4s, v0.4s, v0.4s29saba v0.4s, v1.4s, v2.4s30saba v0.4s, v1.4s, v2.4s31saba v0.4s, v0.4s, v1.4s32# LLVM-MCA-END33 34# LLVM-MCA-BEGIN sadalp35mul v0.4s, v0.4s, v0.4s36sadalp v0.2d, v1.4s37sadalp v0.2d, v1.4s38sadalp v0.2d, v0.4s39# LLVM-MCA-END40 41# LLVM-MCA-BEGIN sdot42mul v0.4s, v0.4s, v0.4s43sdot v0.4s, v1.16b, v2.16b44sdot v0.4s, v1.16b, v2.16b45sdot v0.4s, v0.16b, v1.16b46# LLVM-MCA-END47 48# LLVM-MCA-BEGIN smmla49mul v0.4s, v0.4s, v0.4s50smmla v0.4s, v1.16b, v2.16b51smmla v0.4s, v1.16b, v2.16b52smmla v0.4s, v0.16b, v1.16b53# LLVM-MCA-END54 55# LLVM-MCA-BEGIN mla56mul v0.4s, v0.4s, v0.4s57mla v0.4s, v1.4s, v2.4s58mla v0.4s, v1.4s, v2.4s59mla v0.4s, v0.4s, v1.4s60# LLVM-MCA-END61 62# LLVM-MCA-BEGIN smlal263mul v0.4s, v0.4s, v0.4s64smlal2 v0.4s, v1.8h, v2.8h65smlal2 v0.4s, v1.8h, v2.8h66smlal2 v0.4s, v0.8h, v1.8h67# LLVM-MCA-END68 69# LLVM-MCA-BEGIN ssra70mul v0.4s, v0.4s, v0.4s71ssra v0.2d, v1.2d, #172ssra v0.2d, v1.2d, #173ssra v0.2d, v0.2d, #174# LLVM-MCA-END75 76# LLVM-MCA-BEGIN fcmla77fmul v0.4s, v0.4s, v0.4s78fcmla v0.2d, v1.2d, v2.2d, #9079fcmla v0.2d, v1.2d, v2.2d, #9080fcmla v0.2d, v0.2d, v1.2d, #9081# LLVM-MCA-END82 83# LLVM-MCA-BEGIN fmla84fmul v0.2d, v0.2d, v0.2d85fmla v0.2d, v1.2d, v2.2d86fadd v0.2d, v0.2d, v0.2d87fmla v0.2d, v1.2d, v2.2d88fmla v0.2d, v1.2d, v2.2d89fmla v0.2d, v0.2d, v1.2d90# LLVM-MCA-END91 92# LLVM-MCA-BEGIN fmlal93fmul v0.2d, v0.2d, v0.2d94fmlal v0.4s, v1.4h, v2.4h95fadd v0.2d, v0.2d, v0.2d96fmlal v0.4s, v1.4h, v2.4h97fmlal v0.4s, v1.4h, v2.4h98fmlal v0.4s, v0.4h, v1.4h99# LLVM-MCA-END100 101# LLVM-MCA-BEGIN bfdot102fmul v0.2d, v0.2d, v0.2d103bfdot v0.4s, v1.8h, v2.8h104bfdot v0.4s, v1.8h, v2.8h105bfdot v0.4s, v0.8h, v1.8h106# LLVM-MCA-END107 108# LLVM-MCA-BEGIN bfmmla109fmul v0.2d, v0.2d, v0.2d110bfmmla v0.4s, v1.8h, v2.8h111bfmmla v0.4s, v1.8h, v2.8h112bfmmla v0.4s, v0.8h, v1.8h113# LLVM-MCA-END114 115# LLVM-MCA-BEGIN bfmlalb116fmul v0.2d, v0.2d, v0.2d117bfmlalb v0.4s, v1.8h, v2.8h118bfmlalb v0.4s, v1.8h, v2.8h119bfmlalb v0.4s, v0.8h, v1.8h120# LLVM-MCA-END121 122# LLVM-MCA-BEGIN crc32123mul w0, w0, w0124crc32cb w0, w0, w1125crc32cb w0, w0, w1126crc32cb w0, w0, w0127crc32b w0, w0, w15128crc32h w0, w0, w21129crc32w w0, w0, w24130crc32x w0, w0, x25131crc32ch w0, w0, w16132crc32cw w0, w0, w23133crc32cx w0, w0, x5134# LLVM-MCA-END135 136# LLVM-MCA-BEGIN Z sdot.s137mul z0.d, p0/m, z0.d, z0.d138sdot z0.s, z1.b, z2.b139sdot z0.s, z1.b, z2.b140sdot z0.s, z0.b, z1.b141# LLVM-MCA-END142 143# LLVM-MCA-BEGIN Z sudot144mul z0.d, p0/m, z0.d, z0.d145sdot z0.s, z1.b, z2.b[1]146sdot z0.s, z1.b, z2.b[1]147sdot z0.s, z0.b, z1.b[1]148# LLVM-MCA-END149 150# LLVM-MCA-BEGIN Z sdot.d151mul z0.d, p0/m, z0.d, z0.d152sdot z0.d, z1.h, z2.h153sdot z0.d, z1.h, z2.h154sdot z0.d, z0.h, z1.h155# LLVM-MCA-END156 157# LLVM-MCA-BEGIN Z smmla158mul z0.d, p0/m, z0.d, z0.d159smmla z0.s, z1.b, z2.b160smmla z0.s, z1.b, z2.b161smmla z0.s, z0.b, z1.b162# LLVM-MCA-END163 164# LLVM-MCA-BEGIN Z mla.d165mul z0.d, p0/m, z0.d, z0.d166mla z0.d, p0/m, z1.d, z2.d167mla z0.d, p0/m, z1.d, z2.d168mla z0.d, p0/m, z0.d, z1.d169# LLVM-MCA-END170 171# LLVM-MCA-BEGIN Z mad.d172mul z0.d, p0/m, z0.d, z0.d173mad z0.d, p0/m, z1.d, z2.d174mad z0.d, p0/m, z1.d, z2.d175mad z0.d, p0/m, z0.d, z1.d176# LLVM-MCA-END177 178# LLVM-MCA-BEGIN Z msb.d179mul z0.d, p0/m, z0.d, z0.d180msb z0.d, p0/m, z1.d, z2.d181msb z0.d, p0/m, z1.d, z2.d182msb z0.d, p0/m, z0.d, z1.d183# LLVM-MCA-END184 185# LLVM-MCA-BEGIN Z fcmla ZPmZZ186fmul z0.d, z0.d, z0.d187fcmla z0.d, p0/m, z1.d, z2.d, 90188fcmla z0.d, p0/m, z1.d, z2.d, 90189fcmla z0.d, p0/m, z0.d, z1.d, 90190# LLVM-MCA-END191 192# LLVM-MCA-BEGIN Z fcmla ZZZI193fmul z0.d, z0.d, z0.d194fcmla z0.s, z1.s, z2.s[1], 90195fcmla z0.s, z1.s, z2.s[1], 90196fcmla z0.s, z0.s, z1.s[1], 90197# LLVM-MCA-END198 199# LLVM-MCA-BEGIN Z fmla ZPmZZ200fmul z0.d, z0.d, z0.d201fmla z0.d, p0/m, z1.d, z2.d202fmla z0.d, p0/m, z1.d, z2.d203fmla z0.d, p0/m, z0.d, z1.d204# LLVM-MCA-END205 206# LLVM-MCA-BEGIN Z fmla ZZZI207fmul z0.d, z0.d, z0.d208fmla z0.d, z1.d, z2.d[1]209fmla z0.d, z1.d, z2.d[1]210fmla z0.d, z0.d, z1.d[1]211# LLVM-MCA-END212 213# LLVM-MCA-BEGIN Z bfdot214fmul z0.d, z0.d, z0.d215bfdot z0.s, z1.h, z2.h216bfdot z0.s, z1.h, z2.h217bfdot z0.s, z0.h, z1.h218# LLVM-MCA-END219 220# LLVM-MCA-BEGIN Z bfmmla221fmul z0.d, z0.d, z0.d222bfmmla z0.s, z1.h, z2.h223bfmmla z0.s, z1.h, z2.h224bfmmla z0.s, z0.h, z1.h225# LLVM-MCA-END226 227# LLVM-MCA-BEGIN bfmlalb228fmul z0.d, z0.d, z0.d229bfmlalb z0.s, z1.h, z2.h230bfmlalb z0.s, z1.h, z2.h231bfmlalb z0.s, z0.h, z1.h232# LLVM-MCA-END233 234# CHECK: [0] Code Region - madd235 236# CHECK: Iterations: 100237# CHECK-NEXT: Instructions: 400238# CHECK-NEXT: Total Cycles: 703239# CHECK-NEXT: Total uOps: 400240 241# CHECK: Dispatch Width: 8242# CHECK-NEXT: uOps Per Cycle: 0.57243# CHECK-NEXT: IPC: 0.57244# CHECK-NEXT: Block RThroughput: 3.0245 246# CHECK: Timeline view:247# CHECK-NEXT: 0123456248# CHECK-NEXT: Index 0123456789249 250# CHECK: [0,0] DeeER. . .. mul x0, x0, x0251# CHECK-NEXT: [0,1] D==eeER . .. madd x0, x1, x2, x0252# CHECK-NEXT: [0,2] D===eeER . .. madd x0, x1, x2, x0253# CHECK-NEXT: [0,3] D=====eeER. .. madd x0, x0, x0, x0254# CHECK-NEXT: [1,0] D=======eeER .. mul x0, x0, x0255# CHECK-NEXT: [1,1] D=========eeER .. madd x0, x1, x2, x0256# CHECK-NEXT: [1,2] D==========eeER.. madd x0, x1, x2, x0257# CHECK-NEXT: [1,3] D============eeER madd x0, x0, x0, x0258 259# CHECK: Average Wait times (based on the timeline view):260# CHECK-NEXT: [0]: Executions261# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue262# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready263# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage264 265# CHECK: [0] [1] [2] [3]266# CHECK-NEXT: 0. 2 4.5 0.5 0.0 mul x0, x0, x0267# CHECK-NEXT: 1. 2 6.5 0.0 0.0 madd x0, x1, x2, x0268# CHECK-NEXT: 2. 2 7.5 0.0 0.0 madd x0, x1, x2, x0269# CHECK-NEXT: 3. 2 9.5 0.0 0.0 madd x0, x0, x0, x0270# CHECK-NEXT: 2 7.0 0.1 0.0 <total>271 272# CHECK: [1] Code Region - smaddl273 274# CHECK: Iterations: 100275# CHECK-NEXT: Instructions: 400276# CHECK-NEXT: Total Cycles: 703277# CHECK-NEXT: Total uOps: 400278 279# CHECK: Dispatch Width: 8280# CHECK-NEXT: uOps Per Cycle: 0.57281# CHECK-NEXT: IPC: 0.57282# CHECK-NEXT: Block RThroughput: 3.0283 284# CHECK: Timeline view:285# CHECK-NEXT: 0123456286# CHECK-NEXT: Index 0123456789287 288# CHECK: [0,0] DeeER. . .. mul x0, x0, x0289# CHECK-NEXT: [0,1] D==eeER . .. smaddl x0, w1, w2, x0290# CHECK-NEXT: [0,2] D===eeER . .. smaddl x0, w1, w2, x0291# CHECK-NEXT: [0,3] D=====eeER. .. smaddl x0, w0, w0, x0292# CHECK-NEXT: [1,0] D=======eeER .. mul x0, x0, x0293# CHECK-NEXT: [1,1] D=========eeER .. smaddl x0, w1, w2, x0294# CHECK-NEXT: [1,2] D==========eeER.. smaddl x0, w1, w2, x0295# CHECK-NEXT: [1,3] D============eeER smaddl x0, w0, w0, x0296 297# CHECK: Average Wait times (based on the timeline view):298# CHECK-NEXT: [0]: Executions299# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue300# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready301# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage302 303# CHECK: [0] [1] [2] [3]304# CHECK-NEXT: 0. 2 4.5 0.5 0.0 mul x0, x0, x0305# CHECK-NEXT: 1. 2 6.5 0.0 0.0 smaddl x0, w1, w2, x0306# CHECK-NEXT: 2. 2 7.5 0.0 0.0 smaddl x0, w1, w2, x0307# CHECK-NEXT: 3. 2 9.5 0.0 0.0 smaddl x0, w0, w0, x0308# CHECK-NEXT: 2 7.0 0.1 0.0 <total>309 310# CHECK: [2] Code Region - fmadd311 312# CHECK: Iterations: 100313# CHECK-NEXT: Instructions: 600314# CHECK-NEXT: Total Cycles: 1703315# CHECK-NEXT: Total uOps: 600316 317# CHECK: Dispatch Width: 8318# CHECK-NEXT: uOps Per Cycle: 0.35319# CHECK-NEXT: IPC: 0.35320# CHECK-NEXT: Block RThroughput: 1.5321 322# CHECK: Timeline view:323# CHECK-NEXT: 0123456789 0123456324# CHECK-NEXT: Index 0123456789 0123456789325 326# CHECK: [0,0] DeeER. . . . . . .. fadd d0, d0, d0327# CHECK-NEXT: [0,1] D==eeeeER . . . . . .. fmadd d0, d1, d2, d0328# CHECK-NEXT: [0,2] D======eeeER . . . . .. fmul d0, d0, d0329# CHECK-NEXT: [0,3] D=======eeeeER . . . . .. fmadd d0, d1, d2, d0330# CHECK-NEXT: [0,4] D=========eeeeER . . . .. fmadd d0, d1, d2, d0331# CHECK-NEXT: [0,5] D=============eeeeER. . . .. fmadd d0, d0, d1, d2332# CHECK-NEXT: [1,0] D=================eeER . . .. fadd d0, d0, d0333# CHECK-NEXT: [1,1] D===================eeeeER . .. fmadd d0, d1, d2, d0334# CHECK-NEXT: [1,2] .D======================eeeER . .. fmul d0, d0, d0335# CHECK-NEXT: [1,3] .D=======================eeeeER .. fmadd d0, d1, d2, d0336# CHECK-NEXT: [1,4] .D=========================eeeeER .. fmadd d0, d1, d2, d0337# CHECK-NEXT: [1,5] .D=============================eeeeER fmadd d0, d0, d1, d2338 339# CHECK: Average Wait times (based on the timeline view):340# CHECK-NEXT: [0]: Executions341# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue342# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready343# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage344 345# CHECK: [0] [1] [2] [3]346# CHECK-NEXT: 0. 2 9.5 0.5 0.0 fadd d0, d0, d0347# CHECK-NEXT: 1. 2 11.5 0.0 0.0 fmadd d0, d1, d2, d0348# CHECK-NEXT: 2. 2 15.0 0.0 0.0 fmul d0, d0, d0349# CHECK-NEXT: 3. 2 16.0 0.0 0.0 fmadd d0, d1, d2, d0350# CHECK-NEXT: 4. 2 18.0 0.0 0.0 fmadd d0, d1, d2, d0351# CHECK-NEXT: 5. 2 22.0 0.0 0.0 fmadd d0, d0, d1, d2352# CHECK-NEXT: 2 15.3 0.1 0.0 <total>353 354# CHECK: [3] Code Region - saba355 356# CHECK: Iterations: 100357# CHECK-NEXT: Instructions: 400358# CHECK-NEXT: Total Cycles: 1303359# CHECK-NEXT: Total uOps: 400360 361# CHECK: Dispatch Width: 8362# CHECK-NEXT: uOps Per Cycle: 0.31363# CHECK-NEXT: IPC: 0.31364# CHECK-NEXT: Block RThroughput: 1.5365 366# CHECK: Timeline view:367# CHECK-NEXT: 0123456789368# CHECK-NEXT: Index 0123456789 012345678369 370# CHECK: [0,0] DeeeeER . . . . . mul v0.4s, v0.4s, v0.4s371# CHECK-NEXT: [0,1] D====eeeeER . . . . saba v0.4s, v1.4s, v2.4s372# CHECK-NEXT: [0,2] D=====eeeeER . . . . saba v0.4s, v1.4s, v2.4s373# CHECK-NEXT: [0,3] D=========eeeeER . . . saba v0.4s, v0.4s, v1.4s374# CHECK-NEXT: [1,0] D=============eeeeER. . . mul v0.4s, v0.4s, v0.4s375# CHECK-NEXT: [1,1] D=================eeeeER . . saba v0.4s, v1.4s, v2.4s376# CHECK-NEXT: [1,2] D==================eeeeER. . saba v0.4s, v1.4s, v2.4s377# CHECK-NEXT: [1,3] D======================eeeeER saba v0.4s, v0.4s, v1.4s378 379# CHECK: Average Wait times (based on the timeline view):380# CHECK-NEXT: [0]: Executions381# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue382# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready383# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage384 385# CHECK: [0] [1] [2] [3]386# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s387# CHECK-NEXT: 1. 2 11.5 0.0 0.0 saba v0.4s, v1.4s, v2.4s388# CHECK-NEXT: 2. 2 12.5 0.0 0.0 saba v0.4s, v1.4s, v2.4s389# CHECK-NEXT: 3. 2 16.5 0.0 0.0 saba v0.4s, v0.4s, v1.4s390# CHECK-NEXT: 2 12.0 0.1 0.0 <total>391 392# CHECK: [4] Code Region - sadalp393 394# CHECK: Iterations: 100395# CHECK-NEXT: Instructions: 400396# CHECK-NEXT: Total Cycles: 1303397# CHECK-NEXT: Total uOps: 400398 399# CHECK: Dispatch Width: 8400# CHECK-NEXT: uOps Per Cycle: 0.31401# CHECK-NEXT: IPC: 0.31402# CHECK-NEXT: Block RThroughput: 1.5403 404# CHECK: Timeline view:405# CHECK-NEXT: 0123456789406# CHECK-NEXT: Index 0123456789 012345678407 408# CHECK: [0,0] DeeeeER . . . . . mul v0.4s, v0.4s, v0.4s409# CHECK-NEXT: [0,1] D====eeeeER . . . . sadalp v0.2d, v1.4s410# CHECK-NEXT: [0,2] D=====eeeeER . . . . sadalp v0.2d, v1.4s411# CHECK-NEXT: [0,3] D=========eeeeER . . . sadalp v0.2d, v0.4s412# CHECK-NEXT: [1,0] D=============eeeeER. . . mul v0.4s, v0.4s, v0.4s413# CHECK-NEXT: [1,1] D=================eeeeER . . sadalp v0.2d, v1.4s414# CHECK-NEXT: [1,2] D==================eeeeER. . sadalp v0.2d, v1.4s415# CHECK-NEXT: [1,3] D======================eeeeER sadalp v0.2d, v0.4s416 417# CHECK: Average Wait times (based on the timeline view):418# CHECK-NEXT: [0]: Executions419# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue420# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready421# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage422 423# CHECK: [0] [1] [2] [3]424# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s425# CHECK-NEXT: 1. 2 11.5 0.0 0.0 sadalp v0.2d, v1.4s426# CHECK-NEXT: 2. 2 12.5 0.0 0.0 sadalp v0.2d, v1.4s427# CHECK-NEXT: 3. 2 16.5 0.0 0.0 sadalp v0.2d, v0.4s428# CHECK-NEXT: 2 12.0 0.1 0.0 <total>429 430# CHECK: [5] Code Region - sdot431 432# CHECK: Iterations: 100433# CHECK-NEXT: Instructions: 400434# CHECK-NEXT: Total Cycles: 1103435# CHECK-NEXT: Total uOps: 400436 437# CHECK: Dispatch Width: 8438# CHECK-NEXT: uOps Per Cycle: 0.36439# CHECK-NEXT: IPC: 0.36440# CHECK-NEXT: Block RThroughput: 0.8441 442# CHECK: Timeline view:443# CHECK-NEXT: 0123456789444# CHECK-NEXT: Index 0123456789 01234445 446# CHECK: [0,0] DeeeeER . . . . mul v0.4s, v0.4s, v0.4s447# CHECK-NEXT: [0,1] D====eeeER. . . . sdot v0.4s, v1.16b, v2.16b448# CHECK-NEXT: [0,2] D=====eeeER . . . sdot v0.4s, v1.16b, v2.16b449# CHECK-NEXT: [0,3] D========eeeER . . . sdot v0.4s, v0.16b, v1.16b450# CHECK-NEXT: [1,0] D===========eeeeER . . mul v0.4s, v0.4s, v0.4s451# CHECK-NEXT: [1,1] D===============eeeER . sdot v0.4s, v1.16b, v2.16b452# CHECK-NEXT: [1,2] D================eeeER . sdot v0.4s, v1.16b, v2.16b453# CHECK-NEXT: [1,3] D===================eeeER sdot v0.4s, v0.16b, v1.16b454 455# CHECK: Average Wait times (based on the timeline view):456# CHECK-NEXT: [0]: Executions457# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue458# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready459# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage460 461# CHECK: [0] [1] [2] [3]462# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s463# CHECK-NEXT: 1. 2 10.5 0.0 0.0 sdot v0.4s, v1.16b, v2.16b464# CHECK-NEXT: 2. 2 11.5 0.0 0.0 sdot v0.4s, v1.16b, v2.16b465# CHECK-NEXT: 3. 2 14.5 0.0 0.0 sdot v0.4s, v0.16b, v1.16b466# CHECK-NEXT: 2 10.8 0.1 0.0 <total>467 468# CHECK: [6] Code Region - smmla469 470# CHECK: Iterations: 100471# CHECK-NEXT: Instructions: 400472# CHECK-NEXT: Total Cycles: 1103473# CHECK-NEXT: Total uOps: 400474 475# CHECK: Dispatch Width: 8476# CHECK-NEXT: uOps Per Cycle: 0.36477# CHECK-NEXT: IPC: 0.36478# CHECK-NEXT: Block RThroughput: 0.8479 480# CHECK: Timeline view:481# CHECK-NEXT: 0123456789482# CHECK-NEXT: Index 0123456789 01234483 484# CHECK: [0,0] DeeeeER . . . . mul v0.4s, v0.4s, v0.4s485# CHECK-NEXT: [0,1] D====eeeER. . . . smmla v0.4s, v1.16b, v2.16b486# CHECK-NEXT: [0,2] D=====eeeER . . . smmla v0.4s, v1.16b, v2.16b487# CHECK-NEXT: [0,3] D========eeeER . . . smmla v0.4s, v0.16b, v1.16b488# CHECK-NEXT: [1,0] D===========eeeeER . . mul v0.4s, v0.4s, v0.4s489# CHECK-NEXT: [1,1] D===============eeeER . smmla v0.4s, v1.16b, v2.16b490# CHECK-NEXT: [1,2] D================eeeER . smmla v0.4s, v1.16b, v2.16b491# CHECK-NEXT: [1,3] D===================eeeER smmla v0.4s, v0.16b, v1.16b492 493# CHECK: Average Wait times (based on the timeline view):494# CHECK-NEXT: [0]: Executions495# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue496# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready497# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage498 499# CHECK: [0] [1] [2] [3]500# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s501# CHECK-NEXT: 1. 2 10.5 0.0 0.0 smmla v0.4s, v1.16b, v2.16b502# CHECK-NEXT: 2. 2 11.5 0.0 0.0 smmla v0.4s, v1.16b, v2.16b503# CHECK-NEXT: 3. 2 14.5 0.0 0.0 smmla v0.4s, v0.16b, v1.16b504# CHECK-NEXT: 2 10.8 0.1 0.0 <total>505 506# CHECK: [7] Code Region - mla507 508# CHECK: Iterations: 100509# CHECK-NEXT: Instructions: 400510# CHECK-NEXT: Total Cycles: 1303511# CHECK-NEXT: Total uOps: 400512 513# CHECK: Dispatch Width: 8514# CHECK-NEXT: uOps Per Cycle: 0.31515# CHECK-NEXT: IPC: 0.31516# CHECK-NEXT: Block RThroughput: 2.0517 518# CHECK: Timeline view:519# CHECK-NEXT: 0123456789520# CHECK-NEXT: Index 0123456789 012345678521 522# CHECK: [0,0] DeeeeER . . . . . mul v0.4s, v0.4s, v0.4s523# CHECK-NEXT: [0,1] D====eeeeER . . . . mla v0.4s, v1.4s, v2.4s524# CHECK-NEXT: [0,2] D=====eeeeER . . . . mla v0.4s, v1.4s, v2.4s525# CHECK-NEXT: [0,3] D=========eeeeER . . . mla v0.4s, v0.4s, v1.4s526# CHECK-NEXT: [1,0] D=============eeeeER. . . mul v0.4s, v0.4s, v0.4s527# CHECK-NEXT: [1,1] D=================eeeeER . . mla v0.4s, v1.4s, v2.4s528# CHECK-NEXT: [1,2] D==================eeeeER. . mla v0.4s, v1.4s, v2.4s529# CHECK-NEXT: [1,3] D======================eeeeER mla v0.4s, v0.4s, v1.4s530 531# CHECK: Average Wait times (based on the timeline view):532# CHECK-NEXT: [0]: Executions533# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue534# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready535# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage536 537# CHECK: [0] [1] [2] [3]538# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s539# CHECK-NEXT: 1. 2 11.5 0.0 0.0 mla v0.4s, v1.4s, v2.4s540# CHECK-NEXT: 2. 2 12.5 0.0 0.0 mla v0.4s, v1.4s, v2.4s541# CHECK-NEXT: 3. 2 16.5 0.0 0.0 mla v0.4s, v0.4s, v1.4s542# CHECK-NEXT: 2 12.0 0.1 0.0 <total>543 544# CHECK: [8] Code Region - smlal2545 546# CHECK: Iterations: 100547# CHECK-NEXT: Instructions: 400548# CHECK-NEXT: Total Cycles: 1303549# CHECK-NEXT: Total uOps: 400550 551# CHECK: Dispatch Width: 8552# CHECK-NEXT: uOps Per Cycle: 0.31553# CHECK-NEXT: IPC: 0.31554# CHECK-NEXT: Block RThroughput: 2.0555 556# CHECK: Timeline view:557# CHECK-NEXT: 0123456789558# CHECK-NEXT: Index 0123456789 012345678559 560# CHECK: [0,0] DeeeeER . . . . . mul v0.4s, v0.4s, v0.4s561# CHECK-NEXT: [0,1] D====eeeeER . . . . smlal2 v0.4s, v1.8h, v2.8h562# CHECK-NEXT: [0,2] D=====eeeeER . . . . smlal2 v0.4s, v1.8h, v2.8h563# CHECK-NEXT: [0,3] D=========eeeeER . . . smlal2 v0.4s, v0.8h, v1.8h564# CHECK-NEXT: [1,0] D=============eeeeER. . . mul v0.4s, v0.4s, v0.4s565# CHECK-NEXT: [1,1] D=================eeeeER . . smlal2 v0.4s, v1.8h, v2.8h566# CHECK-NEXT: [1,2] D==================eeeeER. . smlal2 v0.4s, v1.8h, v2.8h567# CHECK-NEXT: [1,3] D======================eeeeER smlal2 v0.4s, v0.8h, v1.8h568 569# CHECK: Average Wait times (based on the timeline view):570# CHECK-NEXT: [0]: Executions571# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue572# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready573# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage574 575# CHECK: [0] [1] [2] [3]576# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s577# CHECK-NEXT: 1. 2 11.5 0.0 0.0 smlal2 v0.4s, v1.8h, v2.8h578# CHECK-NEXT: 2. 2 12.5 0.0 0.0 smlal2 v0.4s, v1.8h, v2.8h579# CHECK-NEXT: 3. 2 16.5 0.0 0.0 smlal2 v0.4s, v0.8h, v1.8h580# CHECK-NEXT: 2 12.0 0.1 0.0 <total>581 582# CHECK: [9] Code Region - ssra583 584# CHECK: Iterations: 100585# CHECK-NEXT: Instructions: 400586# CHECK-NEXT: Total Cycles: 1303587# CHECK-NEXT: Total uOps: 400588 589# CHECK: Dispatch Width: 8590# CHECK-NEXT: uOps Per Cycle: 0.31591# CHECK-NEXT: IPC: 0.31592# CHECK-NEXT: Block RThroughput: 1.5593 594# CHECK: Timeline view:595# CHECK-NEXT: 0123456789596# CHECK-NEXT: Index 0123456789 012345678597 598# CHECK: [0,0] DeeeeER . . . . . mul v0.4s, v0.4s, v0.4s599# CHECK-NEXT: [0,1] D====eeeeER . . . . ssra v0.2d, v1.2d, #1600# CHECK-NEXT: [0,2] D=====eeeeER . . . . ssra v0.2d, v1.2d, #1601# CHECK-NEXT: [0,3] D=========eeeeER . . . ssra v0.2d, v0.2d, #1602# CHECK-NEXT: [1,0] D=============eeeeER. . . mul v0.4s, v0.4s, v0.4s603# CHECK-NEXT: [1,1] D=================eeeeER . . ssra v0.2d, v1.2d, #1604# CHECK-NEXT: [1,2] D==================eeeeER. . ssra v0.2d, v1.2d, #1605# CHECK-NEXT: [1,3] D======================eeeeER ssra v0.2d, v0.2d, #1606 607# CHECK: Average Wait times (based on the timeline view):608# CHECK-NEXT: [0]: Executions609# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue610# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready611# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage612 613# CHECK: [0] [1] [2] [3]614# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s615# CHECK-NEXT: 1. 2 11.5 0.0 0.0 ssra v0.2d, v1.2d, #1616# CHECK-NEXT: 2. 2 12.5 0.0 0.0 ssra v0.2d, v1.2d, #1617# CHECK-NEXT: 3. 2 16.5 0.0 0.0 ssra v0.2d, v0.2d, #1618# CHECK-NEXT: 2 12.0 0.1 0.0 <total>619 620# CHECK: [10] Code Region - fcmla621 622# CHECK: Iterations: 100623# CHECK-NEXT: Instructions: 400624# CHECK-NEXT: Total Cycles: 1303625# CHECK-NEXT: Total uOps: 400626 627# CHECK: Dispatch Width: 8628# CHECK-NEXT: uOps Per Cycle: 0.31629# CHECK-NEXT: IPC: 0.31630# CHECK-NEXT: Block RThroughput: 1.0631 632# CHECK: Timeline view:633# CHECK-NEXT: 0123456789634# CHECK-NEXT: Index 0123456789 012345678635 636# CHECK: [0,0] DeeeER . . . . . fmul v0.4s, v0.4s, v0.4s637# CHECK-NEXT: [0,1] D===eeeeER. . . . . fcmla v0.2d, v1.2d, v2.2d, #90638# CHECK-NEXT: [0,2] D=====eeeeER . . . . fcmla v0.2d, v1.2d, v2.2d, #90639# CHECK-NEXT: [0,3] D=========eeeeER . . . fcmla v0.2d, v0.2d, v1.2d, #90640# CHECK-NEXT: [1,0] D=============eeeER . . . fmul v0.4s, v0.4s, v0.4s641# CHECK-NEXT: [1,1] D================eeeeER . . fcmla v0.2d, v1.2d, v2.2d, #90642# CHECK-NEXT: [1,2] D==================eeeeER. . fcmla v0.2d, v1.2d, v2.2d, #90643# CHECK-NEXT: [1,3] D======================eeeeER fcmla v0.2d, v0.2d, v1.2d, #90644 645# CHECK: Average Wait times (based on the timeline view):646# CHECK-NEXT: [0]: Executions647# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue648# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready649# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage650 651# CHECK: [0] [1] [2] [3]652# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul v0.4s, v0.4s, v0.4s653# CHECK-NEXT: 1. 2 10.5 0.0 0.0 fcmla v0.2d, v1.2d, v2.2d, #90654# CHECK-NEXT: 2. 2 12.5 0.0 0.0 fcmla v0.2d, v1.2d, v2.2d, #90655# CHECK-NEXT: 3. 2 16.5 0.0 0.0 fcmla v0.2d, v0.2d, v1.2d, #90656# CHECK-NEXT: 2 11.8 0.1 0.0 <total>657 658# CHECK: [11] Code Region - fmla659 660# CHECK: Iterations: 100661# CHECK-NEXT: Instructions: 600662# CHECK-NEXT: Total Cycles: 1703663# CHECK-NEXT: Total uOps: 600664 665# CHECK: Dispatch Width: 8666# CHECK-NEXT: uOps Per Cycle: 0.35667# CHECK-NEXT: IPC: 0.35668# CHECK-NEXT: Block RThroughput: 1.5669 670# CHECK: Timeline view:671# CHECK-NEXT: 0123456789 0123456672# CHECK-NEXT: Index 0123456789 0123456789673 674# CHECK: [0,0] DeeeER . . . . . .. fmul v0.2d, v0.2d, v0.2d675# CHECK-NEXT: [0,1] D=eeeeER . . . . . .. fmla v0.2d, v1.2d, v2.2d676# CHECK-NEXT: [0,2] D=====eeER. . . . . .. fadd v0.2d, v0.2d, v0.2d677# CHECK-NEXT: [0,3] D=======eeeeER . . . . .. fmla v0.2d, v1.2d, v2.2d678# CHECK-NEXT: [0,4] D=========eeeeER . . . .. fmla v0.2d, v1.2d, v2.2d679# CHECK-NEXT: [0,5] D=============eeeeER. . . .. fmla v0.2d, v0.2d, v1.2d680# CHECK-NEXT: [1,0] D=================eeeER . . .. fmul v0.2d, v0.2d, v0.2d681# CHECK-NEXT: [1,1] D==================eeeeER. . .. fmla v0.2d, v1.2d, v2.2d682# CHECK-NEXT: [1,2] .D=====================eeER . .. fadd v0.2d, v0.2d, v0.2d683# CHECK-NEXT: [1,3] .D=======================eeeeER .. fmla v0.2d, v1.2d, v2.2d684# CHECK-NEXT: [1,4] .D=========================eeeeER .. fmla v0.2d, v1.2d, v2.2d685# CHECK-NEXT: [1,5] .D=============================eeeeER fmla v0.2d, v0.2d, v1.2d686 687# CHECK: Average Wait times (based on the timeline view):688# CHECK-NEXT: [0]: Executions689# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue690# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready691# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage692 693# CHECK: [0] [1] [2] [3]694# CHECK-NEXT: 0. 2 9.5 0.5 0.0 fmul v0.2d, v0.2d, v0.2d695# CHECK-NEXT: 1. 2 10.5 0.0 0.0 fmla v0.2d, v1.2d, v2.2d696# CHECK-NEXT: 2. 2 14.0 0.0 0.0 fadd v0.2d, v0.2d, v0.2d697# CHECK-NEXT: 3. 2 16.0 0.0 0.0 fmla v0.2d, v1.2d, v2.2d698# CHECK-NEXT: 4. 2 18.0 0.0 0.0 fmla v0.2d, v1.2d, v2.2d699# CHECK-NEXT: 5. 2 22.0 0.0 0.0 fmla v0.2d, v0.2d, v1.2d700# CHECK-NEXT: 2 15.0 0.1 0.0 <total>701 702# CHECK: [12] Code Region - fmlal703 704# CHECK: Iterations: 100705# CHECK-NEXT: Instructions: 600706# CHECK-NEXT: Total Cycles: 2203707# CHECK-NEXT: Total uOps: 600708 709# CHECK: Dispatch Width: 8710# CHECK-NEXT: uOps Per Cycle: 0.27711# CHECK-NEXT: IPC: 0.27712# CHECK-NEXT: Block RThroughput: 1.5713 714# CHECK: Timeline view:715# CHECK-NEXT: 0123456789 0123456789716# CHECK-NEXT: Index 0123456789 0123456789 0123456717 718# CHECK: [0,0] DeeeER . . . . . . . .. fmul v0.2d, v0.2d, v0.2d719# CHECK-NEXT: [0,1] D===eeeeeER . . . . . . .. fmlal v0.4s, v1.4h, v2.4h720# CHECK-NEXT: [0,2] D========eeER . . . . . . .. fadd v0.2d, v0.2d, v0.2d721# CHECK-NEXT: [0,3] D==========eeeeeER . . . . . .. fmlal v0.4s, v1.4h, v2.4h722# CHECK-NEXT: [0,4] D============eeeeeER. . . . . .. fmlal v0.4s, v1.4h, v2.4h723# CHECK-NEXT: [0,5] D=================eeeeeER. . . . .. fmlal v0.4s, v0.4h, v1.4h724# CHECK-NEXT: [1,0] D======================eeeER . . . .. fmul v0.2d, v0.2d, v0.2d725# CHECK-NEXT: [1,1] D=========================eeeeeER . . .. fmlal v0.4s, v1.4h, v2.4h726# CHECK-NEXT: [1,2] .D=============================eeER. . .. fadd v0.2d, v0.2d, v0.2d727# CHECK-NEXT: [1,3] .D===============================eeeeeER. .. fmlal v0.4s, v1.4h, v2.4h728# CHECK-NEXT: [1,4] .D=================================eeeeeER .. fmlal v0.4s, v1.4h, v2.4h729# CHECK-NEXT: [1,5] .D======================================eeeeeER fmlal v0.4s, v0.4h, v1.4h730 731# CHECK: Average Wait times (based on the timeline view):732# CHECK-NEXT: [0]: Executions733# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue734# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready735# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage736 737# CHECK: [0] [1] [2] [3]738# CHECK-NEXT: 0. 2 12.0 0.5 0.0 fmul v0.2d, v0.2d, v0.2d739# CHECK-NEXT: 1. 2 15.0 0.0 0.0 fmlal v0.4s, v1.4h, v2.4h740# CHECK-NEXT: 2. 2 19.5 0.0 0.0 fadd v0.2d, v0.2d, v0.2d741# CHECK-NEXT: 3. 2 21.5 0.0 0.0 fmlal v0.4s, v1.4h, v2.4h742# CHECK-NEXT: 4. 2 23.5 0.0 0.0 fmlal v0.4s, v1.4h, v2.4h743# CHECK-NEXT: 5. 2 28.5 0.0 0.0 fmlal v0.4s, v0.4h, v1.4h744# CHECK-NEXT: 2 20.0 0.1 0.0 <total>745 746# CHECK: [13] Code Region - bfdot747 748# CHECK: Iterations: 100749# CHECK-NEXT: Instructions: 400750# CHECK-NEXT: Total Cycles: 1303751# CHECK-NEXT: Total uOps: 400752 753# CHECK: Dispatch Width: 8754# CHECK-NEXT: uOps Per Cycle: 0.31755# CHECK-NEXT: IPC: 0.31756# CHECK-NEXT: Block RThroughput: 1.0757 758# CHECK: Timeline view:759# CHECK-NEXT: 0123456789760# CHECK-NEXT: Index 0123456789 012345678761 762# CHECK: [0,0] DeeeER . . . . . fmul v0.2d, v0.2d, v0.2d763# CHECK-NEXT: [0,1] D===eeeeER. . . . . bfdot v0.4s, v1.8h, v2.8h764# CHECK-NEXT: [0,2] D=====eeeeER . . . . bfdot v0.4s, v1.8h, v2.8h765# CHECK-NEXT: [0,3] D=========eeeeER . . . bfdot v0.4s, v0.8h, v1.8h766# CHECK-NEXT: [1,0] D=============eeeER . . . fmul v0.2d, v0.2d, v0.2d767# CHECK-NEXT: [1,1] D================eeeeER . . bfdot v0.4s, v1.8h, v2.8h768# CHECK-NEXT: [1,2] D==================eeeeER. . bfdot v0.4s, v1.8h, v2.8h769# CHECK-NEXT: [1,3] D======================eeeeER bfdot v0.4s, v0.8h, v1.8h770 771# CHECK: Average Wait times (based on the timeline view):772# CHECK-NEXT: [0]: Executions773# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue774# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready775# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage776 777# CHECK: [0] [1] [2] [3]778# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul v0.2d, v0.2d, v0.2d779# CHECK-NEXT: 1. 2 10.5 0.0 0.0 bfdot v0.4s, v1.8h, v2.8h780# CHECK-NEXT: 2. 2 12.5 0.0 0.0 bfdot v0.4s, v1.8h, v2.8h781# CHECK-NEXT: 3. 2 16.5 0.0 0.0 bfdot v0.4s, v0.8h, v1.8h782# CHECK-NEXT: 2 11.8 0.1 0.0 <total>783 784# CHECK: [14] Code Region - bfmmla785 786# CHECK: Iterations: 100787# CHECK-NEXT: Instructions: 400788# CHECK-NEXT: Total Cycles: 1603789# CHECK-NEXT: Total uOps: 400790 791# CHECK: Dispatch Width: 8792# CHECK-NEXT: uOps Per Cycle: 0.25793# CHECK-NEXT: IPC: 0.25794# CHECK-NEXT: Block RThroughput: 1.0795 796# CHECK: Timeline view:797# CHECK-NEXT: 0123456789 01234798# CHECK-NEXT: Index 0123456789 0123456789799 800# CHECK: [0,0] DeeeER . . . . . . fmul v0.2d, v0.2d, v0.2d801# CHECK-NEXT: [0,1] D===eeeeeER . . . . . bfmmla v0.4s, v1.8h, v2.8h802# CHECK-NEXT: [0,2] D======eeeeeER . . . . . bfmmla v0.4s, v1.8h, v2.8h803# CHECK-NEXT: [0,3] D===========eeeeeER . . . . bfmmla v0.4s, v0.8h, v1.8h804# CHECK-NEXT: [1,0] D================eeeER . . . fmul v0.2d, v0.2d, v0.2d805# CHECK-NEXT: [1,1] D===================eeeeeER . . bfmmla v0.4s, v1.8h, v2.8h806# CHECK-NEXT: [1,2] D======================eeeeeER. . bfmmla v0.4s, v1.8h, v2.8h807# CHECK-NEXT: [1,3] D===========================eeeeeER bfmmla v0.4s, v0.8h, v1.8h808 809# CHECK: Average Wait times (based on the timeline view):810# CHECK-NEXT: [0]: Executions811# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue812# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready813# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage814 815# CHECK: [0] [1] [2] [3]816# CHECK-NEXT: 0. 2 9.0 0.5 0.0 fmul v0.2d, v0.2d, v0.2d817# CHECK-NEXT: 1. 2 12.0 0.0 0.0 bfmmla v0.4s, v1.8h, v2.8h818# CHECK-NEXT: 2. 2 15.0 0.0 0.0 bfmmla v0.4s, v1.8h, v2.8h819# CHECK-NEXT: 3. 2 20.0 0.0 0.0 bfmmla v0.4s, v0.8h, v1.8h820# CHECK-NEXT: 2 14.0 0.1 0.0 <total>821 822# CHECK: [15] Code Region - bfmlalb823 824# CHECK: Iterations: 100825# CHECK-NEXT: Instructions: 400826# CHECK-NEXT: Total Cycles: 1303827# CHECK-NEXT: Total uOps: 400828 829# CHECK: Dispatch Width: 8830# CHECK-NEXT: uOps Per Cycle: 0.31831# CHECK-NEXT: IPC: 0.31832# CHECK-NEXT: Block RThroughput: 1.0833 834# CHECK: Timeline view:835# CHECK-NEXT: 0123456789836# CHECK-NEXT: Index 0123456789 012345678837 838# CHECK: [0,0] DeeeER . . . . . fmul v0.2d, v0.2d, v0.2d839# CHECK-NEXT: [0,1] D===eeeeER. . . . . bfmlalb v0.4s, v1.8h, v2.8h840# CHECK-NEXT: [0,2] D=====eeeeER . . . . bfmlalb v0.4s, v1.8h, v2.8h841# CHECK-NEXT: [0,3] D=========eeeeER . . . bfmlalb v0.4s, v0.8h, v1.8h842# CHECK-NEXT: [1,0] D=============eeeER . . . fmul v0.2d, v0.2d, v0.2d843# CHECK-NEXT: [1,1] D================eeeeER . . bfmlalb v0.4s, v1.8h, v2.8h844# CHECK-NEXT: [1,2] D==================eeeeER. . bfmlalb v0.4s, v1.8h, v2.8h845# CHECK-NEXT: [1,3] D======================eeeeER bfmlalb v0.4s, v0.8h, v1.8h846 847# CHECK: Average Wait times (based on the timeline view):848# CHECK-NEXT: [0]: Executions849# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue850# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready851# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage852 853# CHECK: [0] [1] [2] [3]854# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul v0.2d, v0.2d, v0.2d855# CHECK-NEXT: 1. 2 10.5 0.0 0.0 bfmlalb v0.4s, v1.8h, v2.8h856# CHECK-NEXT: 2. 2 12.5 0.0 0.0 bfmlalb v0.4s, v1.8h, v2.8h857# CHECK-NEXT: 3. 2 16.5 0.0 0.0 bfmlalb v0.4s, v0.8h, v1.8h858# CHECK-NEXT: 2 11.8 0.1 0.0 <total>859 860# CHECK: [16] Code Region - crc32861 862# CHECK: Iterations: 100863# CHECK-NEXT: Instructions: 1100864# CHECK-NEXT: Total Cycles: 1403865# CHECK-NEXT: Total uOps: 1100866 867# CHECK: Dispatch Width: 8868# CHECK-NEXT: uOps Per Cycle: 0.78869# CHECK-NEXT: IPC: 0.78870# CHECK-NEXT: Block RThroughput: 10.0871 872# CHECK: Timeline view:873# CHECK-NEXT: 0123456789 0874# CHECK-NEXT: Index 0123456789 0123456789875 876# CHECK: [0,0] DeeER. . . . . . mul w0, w0, w0877# CHECK-NEXT: [0,1] D==eeER . . . . . crc32cb w0, w0, w1878# CHECK-NEXT: [0,2] D===eeER . . . . . crc32cb w0, w0, w1879# CHECK-NEXT: [0,3] D=====eeER. . . . . crc32cb w0, w0, w0880# CHECK-NEXT: [0,4] D======eeER . . . . crc32b w0, w0, w15881# CHECK-NEXT: [0,5] D=======eeER . . . . crc32h w0, w0, w21882# CHECK-NEXT: [0,6] D========eeER . . . . crc32w w0, w0, w24883# CHECK-NEXT: [0,7] D=========eeER . . . . crc32x w0, w0, x25884# CHECK-NEXT: [0,8] .D=========eeER. . . . crc32ch w0, w0, w16885# CHECK-NEXT: [0,9] .D==========eeER . . . crc32cw w0, w0, w23886# CHECK-NEXT: [0,10] .D===========eeER . . . crc32cx w0, w0, x5887# CHECK-NEXT: [1,0] .D=============eeER . . . mul w0, w0, w0888# CHECK-NEXT: [1,1] .D===============eeER . . crc32cb w0, w0, w1889# CHECK-NEXT: [1,2] .D================eeER . . crc32cb w0, w0, w1890# CHECK-NEXT: [1,3] .D==================eeER . . crc32cb w0, w0, w0891# CHECK-NEXT: [1,4] .D===================eeER. . crc32b w0, w0, w15892# CHECK-NEXT: [1,5] . D===================eeER . crc32h w0, w0, w21893# CHECK-NEXT: [1,6] . D====================eeER . crc32w w0, w0, w24894# CHECK-NEXT: [1,7] . D=====================eeER . crc32x w0, w0, x25895# CHECK-NEXT: [1,8] . D======================eeER . crc32ch w0, w0, w16896# CHECK-NEXT: [1,9] . D=======================eeER. crc32cw w0, w0, w23897# CHECK-NEXT: [1,10] . D========================eeER crc32cx w0, w0, x5898 899# CHECK: Average Wait times (based on the timeline view):900# CHECK-NEXT: [0]: Executions901# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue902# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready903# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage904 905# CHECK: [0] [1] [2] [3]906# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul w0, w0, w0907# CHECK-NEXT: 1. 2 9.5 0.0 0.0 crc32cb w0, w0, w1908# CHECK-NEXT: 2. 2 10.5 0.0 0.0 crc32cb w0, w0, w1909# CHECK-NEXT: 3. 2 12.5 0.0 0.0 crc32cb w0, w0, w0910# CHECK-NEXT: 4. 2 13.5 0.0 0.0 crc32b w0, w0, w15911# CHECK-NEXT: 5. 2 14.0 0.0 0.0 crc32h w0, w0, w21912# CHECK-NEXT: 6. 2 15.0 0.0 0.0 crc32w w0, w0, w24913# CHECK-NEXT: 7. 2 16.0 0.0 0.0 crc32x w0, w0, x25914# CHECK-NEXT: 8. 2 16.5 0.0 0.0 crc32ch w0, w0, w16915# CHECK-NEXT: 9. 2 17.5 0.0 0.0 crc32cw w0, w0, w23916# CHECK-NEXT: 10. 2 18.5 0.0 0.0 crc32cx w0, w0, x5917# CHECK-NEXT: 2 13.7 0.0 0.0 <total>918 919# CHECK: [17] Code Region - Z sdot.s920 921# CHECK: Iterations: 100922# CHECK-NEXT: Instructions: 400923# CHECK-NEXT: Total Cycles: 1203924# CHECK-NEXT: Total uOps: 500925 926# CHECK: Dispatch Width: 8927# CHECK-NEXT: uOps Per Cycle: 0.42928# CHECK-NEXT: IPC: 0.33929# CHECK-NEXT: Block RThroughput: 2.0930 931# CHECK: Timeline view:932# CHECK-NEXT: 0123456789933# CHECK-NEXT: Index 0123456789 0123456934 935# CHECK: [0,0] DeeeeeER . . . .. mul z0.d, p0/m, z0.d, z0.d936# CHECK-NEXT: [0,1] D=====eeeER . . .. sdot z0.s, z1.b, z2.b937# CHECK-NEXT: [0,2] D======eeeER . . .. sdot z0.s, z1.b, z2.b938# CHECK-NEXT: [0,3] D=========eeeER. . .. sdot z0.s, z0.b, z1.b939# CHECK-NEXT: [1,0] D============eeeeeER. .. mul z0.d, p0/m, z0.d, z0.d940# CHECK-NEXT: [1,1] D=================eeeER .. sdot z0.s, z1.b, z2.b941# CHECK-NEXT: [1,2] .D=================eeeER .. sdot z0.s, z1.b, z2.b942# CHECK-NEXT: [1,3] .D====================eeeER sdot z0.s, z0.b, z1.b943 944# CHECK: Average Wait times (based on the timeline view):945# CHECK-NEXT: [0]: Executions946# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue947# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready948# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage949 950# CHECK: [0] [1] [2] [3]951# CHECK-NEXT: 0. 2 7.0 0.5 0.0 mul z0.d, p0/m, z0.d, z0.d952# CHECK-NEXT: 1. 2 12.0 0.0 0.0 sdot z0.s, z1.b, z2.b953# CHECK-NEXT: 2. 2 12.5 0.0 0.0 sdot z0.s, z1.b, z2.b954# CHECK-NEXT: 3. 2 15.5 0.0 0.0 sdot z0.s, z0.b, z1.b955# CHECK-NEXT: 2 11.8 0.1 0.0 <total>956 957# CHECK: [18] Code Region - Z sudot958 959# CHECK: Iterations: 100960# CHECK-NEXT: Instructions: 400961# CHECK-NEXT: Total Cycles: 1203962# CHECK-NEXT: Total uOps: 500963 964# CHECK: Dispatch Width: 8965# CHECK-NEXT: uOps Per Cycle: 0.42966# CHECK-NEXT: IPC: 0.33967# CHECK-NEXT: Block RThroughput: 2.0968 969# CHECK: Timeline view:970# CHECK-NEXT: 0123456789971# CHECK-NEXT: Index 0123456789 0123456972 973# CHECK: [0,0] DeeeeeER . . . .. mul z0.d, p0/m, z0.d, z0.d974# CHECK-NEXT: [0,1] D=====eeeER . . .. sdot z0.s, z1.b, z2.b[1]975# CHECK-NEXT: [0,2] D======eeeER . . .. sdot z0.s, z1.b, z2.b[1]976# CHECK-NEXT: [0,3] D=========eeeER. . .. sdot z0.s, z0.b, z1.b[1]977# CHECK-NEXT: [1,0] D============eeeeeER. .. mul z0.d, p0/m, z0.d, z0.d978# CHECK-NEXT: [1,1] D=================eeeER .. sdot z0.s, z1.b, z2.b[1]979# CHECK-NEXT: [1,2] .D=================eeeER .. sdot z0.s, z1.b, z2.b[1]980# CHECK-NEXT: [1,3] .D====================eeeER sdot z0.s, z0.b, z1.b[1]981 982# CHECK: Average Wait times (based on the timeline view):983# CHECK-NEXT: [0]: Executions984# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue985# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready986# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage987 988# CHECK: [0] [1] [2] [3]989# CHECK-NEXT: 0. 2 7.0 0.5 0.0 mul z0.d, p0/m, z0.d, z0.d990# CHECK-NEXT: 1. 2 12.0 0.0 0.0 sdot z0.s, z1.b, z2.b[1]991# CHECK-NEXT: 2. 2 12.5 0.0 0.0 sdot z0.s, z1.b, z2.b[1]992# CHECK-NEXT: 3. 2 15.5 0.0 0.0 sdot z0.s, z0.b, z1.b[1]993# CHECK-NEXT: 2 11.8 0.1 0.0 <total>994 995# CHECK: [19] Code Region - Z sdot.d996 997# CHECK: Iterations: 100998# CHECK-NEXT: Instructions: 400999# CHECK-NEXT: Total Cycles: 14031000# CHECK-NEXT: Total uOps: 5001001 1002# CHECK: Dispatch Width: 81003# CHECK-NEXT: uOps Per Cycle: 0.361004# CHECK-NEXT: IPC: 0.291005# CHECK-NEXT: Block RThroughput: 5.01006 1007# CHECK: Timeline view:1008# CHECK-NEXT: 0123456789 01009# CHECK-NEXT: Index 0123456789 01234567891010 1011# CHECK: [0,0] DeeeeeER . . . . . mul z0.d, p0/m, z0.d, z0.d1012# CHECK-NEXT: [0,1] D=====eeeeER . . . . sdot z0.d, z1.h, z2.h1013# CHECK-NEXT: [0,2] D======eeeeER . . . . sdot z0.d, z1.h, z2.h1014# CHECK-NEXT: [0,3] D==========eeeeER . . . sdot z0.d, z0.h, z1.h1015# CHECK-NEXT: [1,0] D==============eeeeeER . . mul z0.d, p0/m, z0.d, z0.d1016# CHECK-NEXT: [1,1] D===================eeeeER . sdot z0.d, z1.h, z2.h1017# CHECK-NEXT: [1,2] .D===================eeeeER . sdot z0.d, z1.h, z2.h1018# CHECK-NEXT: [1,3] .D=======================eeeeER sdot z0.d, z0.h, z1.h1019 1020# CHECK: Average Wait times (based on the timeline view):1021# CHECK-NEXT: [0]: Executions1022# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1023# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1024# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1025 1026# CHECK: [0] [1] [2] [3]1027# CHECK-NEXT: 0. 2 8.0 0.5 0.0 mul z0.d, p0/m, z0.d, z0.d1028# CHECK-NEXT: 1. 2 13.0 0.0 0.0 sdot z0.d, z1.h, z2.h1029# CHECK-NEXT: 2. 2 13.5 0.0 0.0 sdot z0.d, z1.h, z2.h1030# CHECK-NEXT: 3. 2 17.5 0.0 0.0 sdot z0.d, z0.h, z1.h1031# CHECK-NEXT: 2 13.0 0.1 0.0 <total>1032 1033# CHECK: [20] Code Region - Z smmla1034 1035# CHECK: Iterations: 1001036# CHECK-NEXT: Instructions: 4001037# CHECK-NEXT: Total Cycles: 12031038# CHECK-NEXT: Total uOps: 5001039 1040# CHECK: Dispatch Width: 81041# CHECK-NEXT: uOps Per Cycle: 0.421042# CHECK-NEXT: IPC: 0.331043# CHECK-NEXT: Block RThroughput: 2.01044 1045# CHECK: Timeline view:1046# CHECK-NEXT: 01234567891047# CHECK-NEXT: Index 0123456789 01234561048 1049# CHECK: [0,0] DeeeeeER . . . .. mul z0.d, p0/m, z0.d, z0.d1050# CHECK-NEXT: [0,1] D=====eeeER . . .. smmla z0.s, z1.b, z2.b1051# CHECK-NEXT: [0,2] D======eeeER . . .. smmla z0.s, z1.b, z2.b1052# CHECK-NEXT: [0,3] D=========eeeER. . .. smmla z0.s, z0.b, z1.b1053# CHECK-NEXT: [1,0] D============eeeeeER. .. mul z0.d, p0/m, z0.d, z0.d1054# CHECK-NEXT: [1,1] D=================eeeER .. smmla z0.s, z1.b, z2.b1055# CHECK-NEXT: [1,2] .D=================eeeER .. smmla z0.s, z1.b, z2.b1056# CHECK-NEXT: [1,3] .D====================eeeER smmla z0.s, z0.b, z1.b1057 1058# CHECK: Average Wait times (based on the timeline view):1059# CHECK-NEXT: [0]: Executions1060# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1061# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1062# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1063 1064# CHECK: [0] [1] [2] [3]1065# CHECK-NEXT: 0. 2 7.0 0.5 0.0 mul z0.d, p0/m, z0.d, z0.d1066# CHECK-NEXT: 1. 2 12.0 0.0 0.0 smmla z0.s, z1.b, z2.b1067# CHECK-NEXT: 2. 2 12.5 0.0 0.0 smmla z0.s, z1.b, z2.b1068# CHECK-NEXT: 3. 2 15.5 0.0 0.0 smmla z0.s, z0.b, z1.b1069# CHECK-NEXT: 2 11.8 0.1 0.0 <total>1070 1071# CHECK: [21] Code Region - Z mla.d1072 1073# CHECK: Iterations: 1001074# CHECK-NEXT: Instructions: 4001075# CHECK-NEXT: Total Cycles: 17031076# CHECK-NEXT: Total uOps: 8001077 1078# CHECK: Dispatch Width: 81079# CHECK-NEXT: uOps Per Cycle: 0.471080# CHECK-NEXT: IPC: 0.231081# CHECK-NEXT: Block RThroughput: 8.01082 1083# CHECK: Timeline view:1084# CHECK-NEXT: 0123456789 01234561085# CHECK-NEXT: Index 0123456789 01234567891086 1087# CHECK: [0,0] DeeeeeER . . . . . .. mul z0.d, p0/m, z0.d, z0.d1088# CHECK-NEXT: [0,1] D=====eeeeeER . . . . .. mla z0.d, p0/m, z1.d, z2.d1089# CHECK-NEXT: [0,2] D=======eeeeeER. . . . .. mla z0.d, p0/m, z1.d, z2.d1090# CHECK-NEXT: [0,3] D============eeeeeER. . . .. mla z0.d, p0/m, z0.d, z1.d1091# CHECK-NEXT: [1,0] .D================eeeeeER. . .. mul z0.d, p0/m, z0.d, z0.d1092# CHECK-NEXT: [1,1] .D=====================eeeeeER. .. mla z0.d, p0/m, z1.d, z2.d1093# CHECK-NEXT: [1,2] .D=======================eeeeeER .. mla z0.d, p0/m, z1.d, z2.d1094# CHECK-NEXT: [1,3] .D============================eeeeeER mla z0.d, p0/m, z0.d, z1.d1095 1096# CHECK: Average Wait times (based on the timeline view):1097# CHECK-NEXT: [0]: Executions1098# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1099# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1100# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1101 1102# CHECK: [0] [1] [2] [3]1103# CHECK-NEXT: 0. 2 9.0 0.5 0.0 mul z0.d, p0/m, z0.d, z0.d1104# CHECK-NEXT: 1. 2 14.0 0.0 0.0 mla z0.d, p0/m, z1.d, z2.d1105# CHECK-NEXT: 2. 2 16.0 0.0 0.0 mla z0.d, p0/m, z1.d, z2.d1106# CHECK-NEXT: 3. 2 21.0 0.0 0.0 mla z0.d, p0/m, z0.d, z1.d1107# CHECK-NEXT: 2 15.0 0.1 0.0 <total>1108 1109# CHECK: [22] Code Region - Z mad.d1110 1111# CHECK: Iterations: 1001112# CHECK-NEXT: Instructions: 4001113# CHECK-NEXT: Total Cycles: 17031114# CHECK-NEXT: Total uOps: 8001115 1116# CHECK: Dispatch Width: 81117# CHECK-NEXT: uOps Per Cycle: 0.471118# CHECK-NEXT: IPC: 0.231119# CHECK-NEXT: Block RThroughput: 8.01120 1121# CHECK: Timeline view:1122# CHECK-NEXT: 0123456789 01234561123# CHECK-NEXT: Index 0123456789 01234567891124 1125# CHECK: [0,0] DeeeeeER . . . . . .. mul z0.d, p0/m, z0.d, z0.d1126# CHECK-NEXT: [0,1] D=====eeeeeER . . . . .. mad z0.d, p0/m, z1.d, z2.d1127# CHECK-NEXT: [0,2] D=======eeeeeER. . . . .. mad z0.d, p0/m, z1.d, z2.d1128# CHECK-NEXT: [0,3] D============eeeeeER. . . .. mad z0.d, p0/m, z0.d, z1.d1129# CHECK-NEXT: [1,0] .D================eeeeeER. . .. mul z0.d, p0/m, z0.d, z0.d1130# CHECK-NEXT: [1,1] .D=====================eeeeeER. .. mad z0.d, p0/m, z1.d, z2.d1131# CHECK-NEXT: [1,2] .D=======================eeeeeER .. mad z0.d, p0/m, z1.d, z2.d1132# CHECK-NEXT: [1,3] .D============================eeeeeER mad z0.d, p0/m, z0.d, z1.d1133 1134# CHECK: Average Wait times (based on the timeline view):1135# CHECK-NEXT: [0]: Executions1136# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1137# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1138# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1139 1140# CHECK: [0] [1] [2] [3]1141# CHECK-NEXT: 0. 2 9.0 0.5 0.0 mul z0.d, p0/m, z0.d, z0.d1142# CHECK-NEXT: 1. 2 14.0 0.0 0.0 mad z0.d, p0/m, z1.d, z2.d1143# CHECK-NEXT: 2. 2 16.0 0.0 0.0 mad z0.d, p0/m, z1.d, z2.d1144# CHECK-NEXT: 3. 2 21.0 0.0 0.0 mad z0.d, p0/m, z0.d, z1.d1145# CHECK-NEXT: 2 15.0 0.1 0.0 <total>1146 1147# CHECK: [23] Code Region - Z msb.d1148 1149# CHECK: Iterations: 1001150# CHECK-NEXT: Instructions: 4001151# CHECK-NEXT: Total Cycles: 17031152# CHECK-NEXT: Total uOps: 8001153 1154# CHECK: Dispatch Width: 81155# CHECK-NEXT: uOps Per Cycle: 0.471156# CHECK-NEXT: IPC: 0.231157# CHECK-NEXT: Block RThroughput: 8.01158 1159# CHECK: Timeline view:1160# CHECK-NEXT: 0123456789 01234561161# CHECK-NEXT: Index 0123456789 01234567891162 1163# CHECK: [0,0] DeeeeeER . . . . . .. mul z0.d, p0/m, z0.d, z0.d1164# CHECK-NEXT: [0,1] D=====eeeeeER . . . . .. msb z0.d, p0/m, z1.d, z2.d1165# CHECK-NEXT: [0,2] D=======eeeeeER. . . . .. msb z0.d, p0/m, z1.d, z2.d1166# CHECK-NEXT: [0,3] D============eeeeeER. . . .. msb z0.d, p0/m, z0.d, z1.d1167# CHECK-NEXT: [1,0] .D================eeeeeER. . .. mul z0.d, p0/m, z0.d, z0.d1168# CHECK-NEXT: [1,1] .D=====================eeeeeER. .. msb z0.d, p0/m, z1.d, z2.d1169# CHECK-NEXT: [1,2] .D=======================eeeeeER .. msb z0.d, p0/m, z1.d, z2.d1170# CHECK-NEXT: [1,3] .D============================eeeeeER msb z0.d, p0/m, z0.d, z1.d1171 1172# CHECK: Average Wait times (based on the timeline view):1173# CHECK-NEXT: [0]: Executions1174# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1175# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1176# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1177 1178# CHECK: [0] [1] [2] [3]1179# CHECK-NEXT: 0. 2 9.0 0.5 0.0 mul z0.d, p0/m, z0.d, z0.d1180# CHECK-NEXT: 1. 2 14.0 0.0 0.0 msb z0.d, p0/m, z1.d, z2.d1181# CHECK-NEXT: 2. 2 16.0 0.0 0.0 msb z0.d, p0/m, z1.d, z2.d1182# CHECK-NEXT: 3. 2 21.0 0.0 0.0 msb z0.d, p0/m, z0.d, z1.d1183# CHECK-NEXT: 2 15.0 0.1 0.0 <total>1184 1185# CHECK: [24] Code Region - Z fcmla ZPmZZ1186 1187# CHECK: Iterations: 1001188# CHECK-NEXT: Instructions: 4001189# CHECK-NEXT: Total Cycles: 15031190# CHECK-NEXT: Total uOps: 4001191 1192# CHECK: Dispatch Width: 81193# CHECK-NEXT: uOps Per Cycle: 0.271194# CHECK-NEXT: IPC: 0.271195# CHECK-NEXT: Block RThroughput: 2.01196 1197# CHECK: Timeline view:1198# CHECK-NEXT: 0123456789 0121199# CHECK-NEXT: Index 0123456789 01234567891200 1201# CHECK: [0,0] DeeeER . . . . . . fmul z0.d, z0.d, z0.d1202# CHECK-NEXT: [0,1] D===eeeeeER . . . . . fcmla z0.d, p0/m, z1.d, z2.d, #901203# CHECK-NEXT: [0,2] D=====eeeeeER . . . . . fcmla z0.d, p0/m, z1.d, z2.d, #901204# CHECK-NEXT: [0,3] D==========eeeeeER . . . . fcmla z0.d, p0/m, z0.d, z1.d, #901205# CHECK-NEXT: [1,0] D===============eeeER . . . fmul z0.d, z0.d, z0.d1206# CHECK-NEXT: [1,1] D==================eeeeeER . . fcmla z0.d, p0/m, z1.d, z2.d, #901207# CHECK-NEXT: [1,2] D====================eeeeeER . . fcmla z0.d, p0/m, z1.d, z2.d, #901208# CHECK-NEXT: [1,3] D=========================eeeeeER fcmla z0.d, p0/m, z0.d, z1.d, #901209 1210# CHECK: Average Wait times (based on the timeline view):1211# CHECK-NEXT: [0]: Executions1212# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1213# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1214# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1215 1216# CHECK: [0] [1] [2] [3]1217# CHECK-NEXT: 0. 2 8.5 0.5 0.0 fmul z0.d, z0.d, z0.d1218# CHECK-NEXT: 1. 2 11.5 0.0 0.0 fcmla z0.d, p0/m, z1.d, z2.d, #901219# CHECK-NEXT: 2. 2 13.5 0.0 0.0 fcmla z0.d, p0/m, z1.d, z2.d, #901220# CHECK-NEXT: 3. 2 18.5 0.0 0.0 fcmla z0.d, p0/m, z0.d, z1.d, #901221# CHECK-NEXT: 2 13.0 0.1 0.0 <total>1222 1223# CHECK: [25] Code Region - Z fcmla ZZZI1224 1225# CHECK: Iterations: 1001226# CHECK-NEXT: Instructions: 4001227# CHECK-NEXT: Total Cycles: 15031228# CHECK-NEXT: Total uOps: 4001229 1230# CHECK: Dispatch Width: 81231# CHECK-NEXT: uOps Per Cycle: 0.271232# CHECK-NEXT: IPC: 0.271233# CHECK-NEXT: Block RThroughput: 2.01234 1235# CHECK: Timeline view:1236# CHECK-NEXT: 0123456789 0121237# CHECK-NEXT: Index 0123456789 01234567891238 1239# CHECK: [0,0] DeeeER . . . . . . fmul z0.d, z0.d, z0.d1240# CHECK-NEXT: [0,1] D===eeeeeER . . . . . fcmla z0.s, z1.s, z2.s[1], #901241# CHECK-NEXT: [0,2] D=====eeeeeER . . . . . fcmla z0.s, z1.s, z2.s[1], #901242# CHECK-NEXT: [0,3] D==========eeeeeER . . . . fcmla z0.s, z0.s, z1.s[1], #901243# CHECK-NEXT: [1,0] D===============eeeER . . . fmul z0.d, z0.d, z0.d1244# CHECK-NEXT: [1,1] D==================eeeeeER . . fcmla z0.s, z1.s, z2.s[1], #901245# CHECK-NEXT: [1,2] D====================eeeeeER . . fcmla z0.s, z1.s, z2.s[1], #901246# CHECK-NEXT: [1,3] D=========================eeeeeER fcmla z0.s, z0.s, z1.s[1], #901247 1248# CHECK: Average Wait times (based on the timeline view):1249# CHECK-NEXT: [0]: Executions1250# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1251# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1252# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1253 1254# CHECK: [0] [1] [2] [3]1255# CHECK-NEXT: 0. 2 8.5 0.5 0.0 fmul z0.d, z0.d, z0.d1256# CHECK-NEXT: 1. 2 11.5 0.0 0.0 fcmla z0.s, z1.s, z2.s[1], #901257# CHECK-NEXT: 2. 2 13.5 0.0 0.0 fcmla z0.s, z1.s, z2.s[1], #901258# CHECK-NEXT: 3. 2 18.5 0.0 0.0 fcmla z0.s, z0.s, z1.s[1], #901259# CHECK-NEXT: 2 13.0 0.1 0.0 <total>1260 1261# CHECK: [26] Code Region - Z fmla ZPmZZ1262 1263# CHECK: Iterations: 1001264# CHECK-NEXT: Instructions: 4001265# CHECK-NEXT: Total Cycles: 13031266# CHECK-NEXT: Total uOps: 4001267 1268# CHECK: Dispatch Width: 81269# CHECK-NEXT: uOps Per Cycle: 0.311270# CHECK-NEXT: IPC: 0.311271# CHECK-NEXT: Block RThroughput: 2.01272 1273# CHECK: Timeline view:1274# CHECK-NEXT: 01234567891275# CHECK-NEXT: Index 0123456789 0123456781276 1277# CHECK: [0,0] DeeeER . . . . . fmul z0.d, z0.d, z0.d1278# CHECK-NEXT: [0,1] D===eeeeER. . . . . fmla z0.d, p0/m, z1.d, z2.d1279# CHECK-NEXT: [0,2] D=====eeeeER . . . . fmla z0.d, p0/m, z1.d, z2.d1280# CHECK-NEXT: [0,3] D=========eeeeER . . . fmla z0.d, p0/m, z0.d, z1.d1281# CHECK-NEXT: [1,0] D=============eeeER . . . fmul z0.d, z0.d, z0.d1282# CHECK-NEXT: [1,1] D================eeeeER . . fmla z0.d, p0/m, z1.d, z2.d1283# CHECK-NEXT: [1,2] D==================eeeeER. . fmla z0.d, p0/m, z1.d, z2.d1284# CHECK-NEXT: [1,3] D======================eeeeER fmla z0.d, p0/m, z0.d, z1.d1285 1286# CHECK: Average Wait times (based on the timeline view):1287# CHECK-NEXT: [0]: Executions1288# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1289# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1290# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1291 1292# CHECK: [0] [1] [2] [3]1293# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul z0.d, z0.d, z0.d1294# CHECK-NEXT: 1. 2 10.5 0.0 0.0 fmla z0.d, p0/m, z1.d, z2.d1295# CHECK-NEXT: 2. 2 12.5 0.0 0.0 fmla z0.d, p0/m, z1.d, z2.d1296# CHECK-NEXT: 3. 2 16.5 0.0 0.0 fmla z0.d, p0/m, z0.d, z1.d1297# CHECK-NEXT: 2 11.8 0.1 0.0 <total>1298 1299# CHECK: [27] Code Region - Z fmla ZZZI1300 1301# CHECK: Iterations: 1001302# CHECK-NEXT: Instructions: 4001303# CHECK-NEXT: Total Cycles: 13031304# CHECK-NEXT: Total uOps: 4001305 1306# CHECK: Dispatch Width: 81307# CHECK-NEXT: uOps Per Cycle: 0.311308# CHECK-NEXT: IPC: 0.311309# CHECK-NEXT: Block RThroughput: 2.01310 1311# CHECK: Timeline view:1312# CHECK-NEXT: 01234567891313# CHECK-NEXT: Index 0123456789 0123456781314 1315# CHECK: [0,0] DeeeER . . . . . fmul z0.d, z0.d, z0.d1316# CHECK-NEXT: [0,1] D===eeeeER. . . . . fmla z0.d, z1.d, z2.d[1]1317# CHECK-NEXT: [0,2] D=====eeeeER . . . . fmla z0.d, z1.d, z2.d[1]1318# CHECK-NEXT: [0,3] D=========eeeeER . . . fmla z0.d, z0.d, z1.d[1]1319# CHECK-NEXT: [1,0] D=============eeeER . . . fmul z0.d, z0.d, z0.d1320# CHECK-NEXT: [1,1] D================eeeeER . . fmla z0.d, z1.d, z2.d[1]1321# CHECK-NEXT: [1,2] D==================eeeeER. . fmla z0.d, z1.d, z2.d[1]1322# CHECK-NEXT: [1,3] D======================eeeeER fmla z0.d, z0.d, z1.d[1]1323 1324# CHECK: Average Wait times (based on the timeline view):1325# CHECK-NEXT: [0]: Executions1326# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1327# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1328# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1329 1330# CHECK: [0] [1] [2] [3]1331# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul z0.d, z0.d, z0.d1332# CHECK-NEXT: 1. 2 10.5 0.0 0.0 fmla z0.d, z1.d, z2.d[1]1333# CHECK-NEXT: 2. 2 12.5 0.0 0.0 fmla z0.d, z1.d, z2.d[1]1334# CHECK-NEXT: 3. 2 16.5 0.0 0.0 fmla z0.d, z0.d, z1.d[1]1335# CHECK-NEXT: 2 11.8 0.1 0.0 <total>1336 1337# CHECK: [28] Code Region - Z bfdot1338 1339# CHECK: Iterations: 1001340# CHECK-NEXT: Instructions: 4001341# CHECK-NEXT: Total Cycles: 13031342# CHECK-NEXT: Total uOps: 4001343 1344# CHECK: Dispatch Width: 81345# CHECK-NEXT: uOps Per Cycle: 0.311346# CHECK-NEXT: IPC: 0.311347# CHECK-NEXT: Block RThroughput: 2.01348 1349# CHECK: Timeline view:1350# CHECK-NEXT: 01234567891351# CHECK-NEXT: Index 0123456789 0123456781352 1353# CHECK: [0,0] DeeeER . . . . . fmul z0.d, z0.d, z0.d1354# CHECK-NEXT: [0,1] D===eeeeER. . . . . bfdot z0.s, z1.h, z2.h1355# CHECK-NEXT: [0,2] D=====eeeeER . . . . bfdot z0.s, z1.h, z2.h1356# CHECK-NEXT: [0,3] D=========eeeeER . . . bfdot z0.s, z0.h, z1.h1357# CHECK-NEXT: [1,0] D=============eeeER . . . fmul z0.d, z0.d, z0.d1358# CHECK-NEXT: [1,1] D================eeeeER . . bfdot z0.s, z1.h, z2.h1359# CHECK-NEXT: [1,2] D==================eeeeER. . bfdot z0.s, z1.h, z2.h1360# CHECK-NEXT: [1,3] D======================eeeeER bfdot z0.s, z0.h, z1.h1361 1362# CHECK: Average Wait times (based on the timeline view):1363# CHECK-NEXT: [0]: Executions1364# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1365# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1366# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1367 1368# CHECK: [0] [1] [2] [3]1369# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul z0.d, z0.d, z0.d1370# CHECK-NEXT: 1. 2 10.5 0.0 0.0 bfdot z0.s, z1.h, z2.h1371# CHECK-NEXT: 2. 2 12.5 0.0 0.0 bfdot z0.s, z1.h, z2.h1372# CHECK-NEXT: 3. 2 16.5 0.0 0.0 bfdot z0.s, z0.h, z1.h1373# CHECK-NEXT: 2 11.8 0.1 0.0 <total>1374 1375# CHECK: [29] Code Region - Z bfmmla1376 1377# CHECK: Iterations: 1001378# CHECK-NEXT: Instructions: 4001379# CHECK-NEXT: Total Cycles: 16031380# CHECK-NEXT: Total uOps: 4001381 1382# CHECK: Dispatch Width: 81383# CHECK-NEXT: uOps Per Cycle: 0.251384# CHECK-NEXT: IPC: 0.251385# CHECK-NEXT: Block RThroughput: 2.01386 1387# CHECK: Timeline view:1388# CHECK-NEXT: 0123456789 012341389# CHECK-NEXT: Index 0123456789 01234567891390 1391# CHECK: [0,0] DeeeER . . . . . . fmul z0.d, z0.d, z0.d1392# CHECK-NEXT: [0,1] D===eeeeeER . . . . . bfmmla z0.s, z1.h, z2.h1393# CHECK-NEXT: [0,2] D======eeeeeER . . . . . bfmmla z0.s, z1.h, z2.h1394# CHECK-NEXT: [0,3] D===========eeeeeER . . . . bfmmla z0.s, z0.h, z1.h1395# CHECK-NEXT: [1,0] D================eeeER . . . fmul z0.d, z0.d, z0.d1396# CHECK-NEXT: [1,1] D===================eeeeeER . . bfmmla z0.s, z1.h, z2.h1397# CHECK-NEXT: [1,2] D======================eeeeeER. . bfmmla z0.s, z1.h, z2.h1398# CHECK-NEXT: [1,3] D===========================eeeeeER bfmmla z0.s, z0.h, z1.h1399 1400# CHECK: Average Wait times (based on the timeline view):1401# CHECK-NEXT: [0]: Executions1402# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1403# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1404# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1405 1406# CHECK: [0] [1] [2] [3]1407# CHECK-NEXT: 0. 2 9.0 0.5 0.0 fmul z0.d, z0.d, z0.d1408# CHECK-NEXT: 1. 2 12.0 0.0 0.0 bfmmla z0.s, z1.h, z2.h1409# CHECK-NEXT: 2. 2 15.0 0.0 0.0 bfmmla z0.s, z1.h, z2.h1410# CHECK-NEXT: 3. 2 20.0 0.0 0.0 bfmmla z0.s, z0.h, z1.h1411# CHECK-NEXT: 2 14.0 0.1 0.0 <total>1412 1413# CHECK: [30] Code Region - bfmlalb1414 1415# CHECK: Iterations: 1001416# CHECK-NEXT: Instructions: 4001417# CHECK-NEXT: Total Cycles: 15031418# CHECK-NEXT: Total uOps: 4001419 1420# CHECK: Dispatch Width: 81421# CHECK-NEXT: uOps Per Cycle: 0.271422# CHECK-NEXT: IPC: 0.271423# CHECK-NEXT: Block RThroughput: 2.01424 1425# CHECK: Timeline view:1426# CHECK-NEXT: 0123456789 0121427# CHECK-NEXT: Index 0123456789 01234567891428 1429# CHECK: [0,0] DeeeER . . . . . . fmul z0.d, z0.d, z0.d1430# CHECK-NEXT: [0,1] D===eeeeeER . . . . . bfmlalb z0.s, z1.h, z2.h1431# CHECK-NEXT: [0,2] D=====eeeeeER . . . . . bfmlalb z0.s, z1.h, z2.h1432# CHECK-NEXT: [0,3] D==========eeeeeER . . . . bfmlalb z0.s, z0.h, z1.h1433# CHECK-NEXT: [1,0] D===============eeeER . . . fmul z0.d, z0.d, z0.d1434# CHECK-NEXT: [1,1] D==================eeeeeER . . bfmlalb z0.s, z1.h, z2.h1435# CHECK-NEXT: [1,2] D====================eeeeeER . . bfmlalb z0.s, z1.h, z2.h1436# CHECK-NEXT: [1,3] D=========================eeeeeER bfmlalb z0.s, z0.h, z1.h1437 1438# CHECK: Average Wait times (based on the timeline view):1439# CHECK-NEXT: [0]: Executions1440# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1441# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1442# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1443 1444# CHECK: [0] [1] [2] [3]1445# CHECK-NEXT: 0. 2 8.5 0.5 0.0 fmul z0.d, z0.d, z0.d1446# CHECK-NEXT: 1. 2 11.5 0.0 0.0 bfmlalb z0.s, z1.h, z2.h1447# CHECK-NEXT: 2. 2 13.5 0.0 0.0 bfmlalb z0.s, z1.h, z2.h1448# CHECK-NEXT: 3. 2 18.5 0.0 0.0 bfmlalb z0.s, z0.h, z1.h1449# CHECK-NEXT: 2 13.0 0.1 0.0 <total>1450