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1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py2# RUN: llvm-mca -mtriple=aarch64 -mcpu=neoverse-v2 -mattr=+sve2-aes,+sve2-sha3,+sve2-sm4 --instruction-info=0 --resource-pressure=0 --timeline --timeline-max-iterations=2 < %s | FileCheck %s3 4# LLVM-MCA-BEGIN madd5mul x0, x0, x06madd x0, x1, x2, x07madd x0, x1, x2, x08madd x0, x0, x0, x09# LLVM-MCA-END10 11# LLVM-MCA-BEGIN smaddl12mul x0, x0, x013smaddl x0, w1, w2, x014smaddl x0, w1, w2, x015smaddl x0, w0, w0, x016# LLVM-MCA-END17 18# LLVM-MCA-BEGIN fmadd19fadd d0, d0, d020fmadd d0, d1, d2, d021fmul d0, d0, d022fmadd d0, d1, d2, d023fmadd d0, d1, d2, d024fmadd d0, d0, d1, d225# LLVM-MCA-END26 27# LLVM-MCA-BEGIN saba28mul v0.4s, v0.4s, v0.4s29saba v0.4s, v1.4s, v2.4s30saba v0.4s, v1.4s, v2.4s31saba v0.4s, v0.4s, v1.4s32# LLVM-MCA-END33 34# LLVM-MCA-BEGIN sdot35mul v0.4s, v0.4s, v0.4s36sdot v0.4s, v1.16b, v2.16b37sdot v0.4s, v1.16b, v2.16b38sdot v0.4s, v0.16b, v1.16b39# LLVM-MCA-END40 41# LLVM-MCA-BEGIN smmla42mul v0.4s, v0.4s, v0.4s43smmla v0.4s, v1.16b, v2.16b44smmla v0.4s, v1.16b, v2.16b45smmla v0.4s, v0.16b, v1.16b46# LLVM-MCA-END47 48# LLVM-MCA-BEGIN mla49mul v0.4s, v0.4s, v0.4s50mla v0.4s, v1.4s, v2.4s51mla v0.4s, v1.4s, v2.4s52mla v0.4s, v0.4s, v1.4s53# LLVM-MCA-END54 55# LLVM-MCA-BEGIN sqrdmlah56mul v0.4s, v0.4s, v0.4s57sqrdmlah v0.4s, v1.4s, v2.4s58sqrdmlah v0.4s, v1.4s, v2.4s59sqrdmlah v0.4s, v0.4s, v1.4s60# LLVM-MCA-END61 62# LLVM-MCA-BEGIN smlal263mul v0.4s, v0.4s, v0.4s64smlal2 v0.4s, v1.8h, v2.8h65smlal2 v0.4s, v1.8h, v2.8h66smlal2 v0.4s, v0.8h, v1.8h67# LLVM-MCA-END68 69# LLVM-MCA-BEGIN sadalp70mul v0.4s, v0.4s, v0.4s71sadalp v0.2d, v1.4s72sadalp v0.2d, v1.4s73sadalp v0.2d, v0.4s74# LLVM-MCA-END75 76# LLVM-MCA-BEGIN ssra77mul v0.4s, v0.4s, v0.4s78ssra v0.2d, v1.2d, #179ssra v0.2d, v1.2d, #180ssra v0.2d, v0.2d, #181# LLVM-MCA-END82 83# LLVM-MCA-BEGIN fcmla84fmul v0.4s, v0.4s, v0.4s85fcmla v0.2d, v1.2d, v2.2d, #9086fcmla v0.2d, v1.2d, v2.2d, #9087fcmla v0.2d, v0.2d, v1.2d, #9088# LLVM-MCA-END89 90# LLVM-MCA-BEGIN fmla91fmul v0.2d, v0.2d, v0.2d92fmla v0.2d, v1.2d, v2.2d93fadd v0.2d, v0.2d, v0.2d94fmla v0.2d, v1.2d, v2.2d95fmla v0.2d, v1.2d, v2.2d96fmla v0.2d, v0.2d, v1.2d97# LLVM-MCA-END98 99# LLVM-MCA-BEGIN fmlal100fmul v0.2d, v0.2d, v0.2d101fmlal v0.4s, v1.4h, v2.4h102fadd v0.2d, v0.2d, v0.2d103fmlal v0.4s, v1.4h, v2.4h104fmlal v0.4s, v1.4h, v2.4h105fmlal v0.4s, v0.4h, v1.4h106# LLVM-MCA-END107 108# LLVM-MCA-BEGIN bfdot109fmul v0.2d, v0.2d, v0.2d110bfdot v0.4s, v1.8h, v2.8h111bfdot v0.4s, v1.8h, v2.8h112bfdot v0.4s, v0.8h, v1.8h113# LLVM-MCA-END114 115# LLVM-MCA-BEGIN bfmmla116fmul v0.2d, v0.2d, v0.2d117bfmmla v0.4s, v1.8h, v2.8h118bfmmla v0.4s, v1.8h, v2.8h119bfmmla v0.4s, v0.8h, v1.8h120# LLVM-MCA-END121 122# LLVM-MCA-BEGIN bfmlalb123fmul v0.2d, v0.2d, v0.2d124bfmlalb v0.4s, v1.8h, v2.8h125bfmlalb v0.4s, v1.8h, v2.8h126bfmlalb v0.4s, v0.8h, v1.8h127# LLVM-MCA-END128 129# LLVM-MCA-BEGIN crc32b130mul w0, w0, w0131crc32b w0, w0, w1132crc32b w0, w0, w1133crc32b w0, w0, w0134# LLVM-MCA-END135 136# LLVM-MCA-BEGIN Z saba137mul z0.d, z0.d, z0.d138saba z0.d, z1.d, z2.d139saba z0.d, z1.d, z2.d140saba z0.d, z0.d, z1.d141# LLVM-MCA-END142 143# LLVM-MCA-BEGIN Z sadalp144mul z0.d, z0.d, z0.d145sadalp z0.d, p0/m, z1.s146sadalp z0.d, p0/m, z1.s147sadalp z0.d, p0/m, z0.s148# LLVM-MCA-END149 150# LLVM-MCA-BEGIN Z ssra151mul z0.d, z0.d, z0.d152ssra z0.d, z1.d, #1153ssra z0.d, z1.d, #1154ssra z0.d, z0.d, #1155# LLVM-MCA-END156 157# LLVM-MCA-BEGIN Z cdot.s158mul z0.d, z0.d, z0.d159cdot z0.s, z1.b, z2.b, #90160cdot z0.s, z1.b, z2.b, #90161cdot z0.s, z0.b, z1.b, #90162# LLVM-MCA-END163 164# LLVM-MCA-BEGIN Z cdot.d165mul z0.d, z0.d, z0.d166cdot z0.d, z1.h, z2.h, #90167cdot z0.d, z1.h, z2.h, #90168cdot z0.d, z0.h, z1.h, #90169# LLVM-MCA-END170 171# LLVM-MCA-BEGIN Z cmla.b172mul z0.d, z0.d, z0.d173cmla z0.b, z1.b, z2.b, #90174cmla z0.b, z1.b, z2.b, #90175cmla z0.b, z0.b, z1.b, #90176# LLVM-MCA-END177 178# LLVM-MCA-BEGIN Z cmla.d179mul z0.d, z0.d, z0.d180cmla z0.d, z1.d, z2.d, #90181cmla z0.d, z1.d, z2.d, #90182cmla z0.d, z0.d, z1.d, #90183# LLVM-MCA-END184 185# LLVM-MCA-BEGIN Z sdot.s186mul z0.d, z0.d, z0.d187sdot z0.s, z1.b, z2.b188sdot z0.s, z1.b, z2.b189sdot z0.s, z0.b, z1.b190# LLVM-MCA-END191 192# LLVM-MCA-BEGIN Z sudot193mul z0.d, z0.d, z0.d194sdot z0.s, z1.b, z2.b[1]195sdot z0.s, z1.b, z2.b[1]196sdot z0.s, z0.b, z1.b[1]197# LLVM-MCA-END198 199# LLVM-MCA-BEGIN Z sdot.d200mul z0.d, z0.d, z0.d201sdot z0.d, z1.h, z2.h202sdot z0.d, z1.h, z2.h203sdot z0.d, z0.h, z1.h204# LLVM-MCA-END205 206# LLVM-MCA-BEGIN Z smmla207mul z0.s, z0.s, z0.s208smmla z0.s, z1.b, z2.b209smmla z0.s, z1.b, z2.b210smmla z0.s, z0.b, z1.b211# LLVM-MCA-END212 213# LLVM-MCA-BEGIN Z mla.b214mul z0.d, z0.d, z0.d215mla z0.b, p0/m, z1.b, z2.b216mla z0.b, p0/m, z1.b, z2.b217mla z0.b, p0/m, z0.b, z1.b218# LLVM-MCA-END219 220# LLVM-MCA-BEGIN Z mla.d221mul z0.d, z0.d, z0.d222mla z0.d, p0/m, z1.d, z2.d223mla z0.d, p0/m, z1.d, z2.d224mla z0.d, p0/m, z0.d, z1.d225# LLVM-MCA-END226 227# LLVM-MCA-BEGIN Z smlalb228mul z0.d, z0.d, z0.d229smlalb z0.d, z1.s, z2.s230smlalb z0.d, z1.s, z2.s231smlalb z0.d, z0.s, z1.s232# LLVM-MCA-END233 234# LLVM-MCA-BEGIN Z sqdmlalb235mul z0.d, z0.d, z0.d236sqdmlalb z0.d, z1.s, z2.s237sqdmlalb z0.d, z1.s, z2.s238sqdmlalb z0.d, z0.s, z1.s239# LLVM-MCA-END240 241# LLVM-MCA-BEGIN Z sqrdmlah.b242mul z0.d, z0.d, z0.d243sqrdmlah z0.b, z1.b, z2.b244sqrdmlah z0.b, z1.b, z2.b245sqrdmlah z0.b, z0.b, z1.b246# LLVM-MCA-END247 248# LLVM-MCA-BEGIN Z sqrdmlah.d249mul z0.d, z0.d, z0.d250sqrdmlah z0.d, z1.d, z2.d251sqrdmlah z0.d, z1.d, z2.d252sqrdmlah z0.d, z0.d, z1.d253# LLVM-MCA-END254 255# LLVM-MCA-BEGIN Z fcmla ZPmZZ256fmul z0.d, z0.d, z0.d257fcmla z0.d, p0/m, z1.d, z2.d, 90258fcmla z0.d, p0/m, z1.d, z2.d, 90259fcmla z0.d, p0/m, z0.d, z1.d, 90260# LLVM-MCA-END261 262# LLVM-MCA-BEGIN Z fcmla ZZZI263fmul z0.d, z0.d, z0.d264fcmla z0.s, z1.s, z2.s[1], 90265fcmla z0.s, z1.s, z2.s[1], 90266fcmla z0.s, z0.s, z1.s[1], 90267# LLVM-MCA-END268 269# LLVM-MCA-BEGIN Z fmla ZPmZZ270fmul z0.d, z0.d, z0.d271fmla z0.d, p0/m, z1.d, z2.d272fmla z0.d, p0/m, z1.d, z2.d273fmla z0.d, p0/m, z0.d, z1.d274# LLVM-MCA-END275 276# LLVM-MCA-BEGIN Z fmla ZZZI277fmul z0.d, z0.d, z0.d278fmla z0.d, z1.d, z2.d[1]279fmla z0.d, z1.d, z2.d[1]280fmla z0.d, z0.d, z1.d[1]281# LLVM-MCA-END282 283# LLVM-MCA-BEGIN Z fmlalb ZZZ284fmul z0.d, z0.d, z0.d285fmlalb z0.s, z1.h, z2.h286fmlalb z0.s, z1.h, z2.h287fmlalb z0.s, z0.h, z1.h288# LLVM-MCA-END289 290# LLVM-MCA-BEGIN Z bfdot291fmul z0.d, z0.d, z0.d292bfdot z0.s, z1.h, z2.h293bfdot z0.s, z1.h, z2.h294bfdot z0.s, z0.h, z1.h295# LLVM-MCA-END296 297# LLVM-MCA-BEGIN Z bfmmla298fmul z0.d, z0.d, z0.d299bfmmla z0.s, z1.h, z2.h300bfmmla z0.s, z1.h, z2.h301bfmmla z0.s, z0.h, z1.h302# LLVM-MCA-END303 304# LLVM-MCA-BEGIN bfmlalb305fmul z0.d, z0.d, z0.d306bfmlalb z0.s, z1.h, z2.h307bfmlalb z0.s, z1.h, z2.h308bfmlalb z0.s, z0.h, z1.h309# LLVM-MCA-END310 311# CHECK: [0] Code Region - madd312 313# CHECK: Iterations: 100314# CHECK-NEXT: Instructions: 400315# CHECK-NEXT: Total Cycles: 703316# CHECK-NEXT: Total uOps: 400317 318# CHECK: Dispatch Width: 6319# CHECK-NEXT: uOps Per Cycle: 0.57320# CHECK-NEXT: IPC: 0.57321# CHECK-NEXT: Block RThroughput: 3.0322 323# CHECK: Timeline view:324# CHECK-NEXT: 0123456325# CHECK-NEXT: Index 0123456789326 327# CHECK: [0,0] DeeER. . .. mul x0, x0, x0328# CHECK-NEXT: [0,1] D==eeER . .. madd x0, x1, x2, x0329# CHECK-NEXT: [0,2] D===eeER . .. madd x0, x1, x2, x0330# CHECK-NEXT: [0,3] D=====eeER. .. madd x0, x0, x0, x0331# CHECK-NEXT: [1,0] D=======eeER .. mul x0, x0, x0332# CHECK-NEXT: [1,1] D=========eeER .. madd x0, x1, x2, x0333# CHECK-NEXT: [1,2] .D=========eeER.. madd x0, x1, x2, x0334# CHECK-NEXT: [1,3] .D===========eeER madd x0, x0, x0, x0335 336# CHECK: Average Wait times (based on the timeline view):337# CHECK-NEXT: [0]: Executions338# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue339# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready340# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage341 342# CHECK: [0] [1] [2] [3]343# CHECK-NEXT: 0. 2 4.5 0.5 0.0 mul x0, x0, x0344# CHECK-NEXT: 1. 2 6.5 0.0 0.0 madd x0, x1, x2, x0345# CHECK-NEXT: 2. 2 7.0 0.0 0.0 madd x0, x1, x2, x0346# CHECK-NEXT: 3. 2 9.0 0.0 0.0 madd x0, x0, x0, x0347# CHECK-NEXT: 2 6.8 0.1 0.0 <total>348 349# CHECK: [1] Code Region - smaddl350 351# CHECK: Iterations: 100352# CHECK-NEXT: Instructions: 400353# CHECK-NEXT: Total Cycles: 703354# CHECK-NEXT: Total uOps: 400355 356# CHECK: Dispatch Width: 6357# CHECK-NEXT: uOps Per Cycle: 0.57358# CHECK-NEXT: IPC: 0.57359# CHECK-NEXT: Block RThroughput: 3.0360 361# CHECK: Timeline view:362# CHECK-NEXT: 0123456363# CHECK-NEXT: Index 0123456789364 365# CHECK: [0,0] DeeER. . .. mul x0, x0, x0366# CHECK-NEXT: [0,1] D==eeER . .. smaddl x0, w1, w2, x0367# CHECK-NEXT: [0,2] D===eeER . .. smaddl x0, w1, w2, x0368# CHECK-NEXT: [0,3] D=====eeER. .. smaddl x0, w0, w0, x0369# CHECK-NEXT: [1,0] D=======eeER .. mul x0, x0, x0370# CHECK-NEXT: [1,1] D=========eeER .. smaddl x0, w1, w2, x0371# CHECK-NEXT: [1,2] .D=========eeER.. smaddl x0, w1, w2, x0372# CHECK-NEXT: [1,3] .D===========eeER smaddl x0, w0, w0, x0373 374# CHECK: Average Wait times (based on the timeline view):375# CHECK-NEXT: [0]: Executions376# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue377# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready378# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage379 380# CHECK: [0] [1] [2] [3]381# CHECK-NEXT: 0. 2 4.5 0.5 0.0 mul x0, x0, x0382# CHECK-NEXT: 1. 2 6.5 0.0 0.0 smaddl x0, w1, w2, x0383# CHECK-NEXT: 2. 2 7.0 0.0 0.0 smaddl x0, w1, w2, x0384# CHECK-NEXT: 3. 2 9.0 0.0 0.0 smaddl x0, w0, w0, x0385# CHECK-NEXT: 2 6.8 0.1 0.0 <total>386 387# CHECK: [2] Code Region - fmadd388 389# CHECK: Iterations: 100390# CHECK-NEXT: Instructions: 600391# CHECK-NEXT: Total Cycles: 1703392# CHECK-NEXT: Total uOps: 600393 394# CHECK: Dispatch Width: 6395# CHECK-NEXT: uOps Per Cycle: 0.35396# CHECK-NEXT: IPC: 0.35397# CHECK-NEXT: Block RThroughput: 1.5398 399# CHECK: Timeline view:400# CHECK-NEXT: 0123456789 0123456401# CHECK-NEXT: Index 0123456789 0123456789402 403# CHECK: [0,0] DeeER. . . . . . .. fadd d0, d0, d0404# CHECK-NEXT: [0,1] D==eeeeER . . . . . .. fmadd d0, d1, d2, d0405# CHECK-NEXT: [0,2] D======eeeER . . . . .. fmul d0, d0, d0406# CHECK-NEXT: [0,3] D=======eeeeER . . . . .. fmadd d0, d1, d2, d0407# CHECK-NEXT: [0,4] D=========eeeeER . . . .. fmadd d0, d1, d2, d0408# CHECK-NEXT: [0,5] D=============eeeeER. . . .. fmadd d0, d0, d1, d2409# CHECK-NEXT: [1,0] .D================eeER . . .. fadd d0, d0, d0410# CHECK-NEXT: [1,1] .D==================eeeeER . .. fmadd d0, d1, d2, d0411# CHECK-NEXT: [1,2] .D======================eeeER . .. fmul d0, d0, d0412# CHECK-NEXT: [1,3] .D=======================eeeeER .. fmadd d0, d1, d2, d0413# CHECK-NEXT: [1,4] .D=========================eeeeER .. fmadd d0, d1, d2, d0414# CHECK-NEXT: [1,5] .D=============================eeeeER fmadd d0, d0, d1, d2415 416# CHECK: Average Wait times (based on the timeline view):417# CHECK-NEXT: [0]: Executions418# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue419# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready420# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage421 422# CHECK: [0] [1] [2] [3]423# CHECK-NEXT: 0. 2 9.0 0.5 0.0 fadd d0, d0, d0424# CHECK-NEXT: 1. 2 11.0 0.0 0.0 fmadd d0, d1, d2, d0425# CHECK-NEXT: 2. 2 15.0 0.0 0.0 fmul d0, d0, d0426# CHECK-NEXT: 3. 2 16.0 0.0 0.0 fmadd d0, d1, d2, d0427# CHECK-NEXT: 4. 2 18.0 0.0 0.0 fmadd d0, d1, d2, d0428# CHECK-NEXT: 5. 2 22.0 0.0 0.0 fmadd d0, d0, d1, d2429# CHECK-NEXT: 2 15.2 0.1 0.0 <total>430 431# CHECK: [3] Code Region - saba432 433# CHECK: Iterations: 100434# CHECK-NEXT: Instructions: 400435# CHECK-NEXT: Total Cycles: 1303436# CHECK-NEXT: Total uOps: 400437 438# CHECK: Dispatch Width: 6439# CHECK-NEXT: uOps Per Cycle: 0.31440# CHECK-NEXT: IPC: 0.31441# CHECK-NEXT: Block RThroughput: 1.5442 443# CHECK: Timeline view:444# CHECK-NEXT: 0123456789445# CHECK-NEXT: Index 0123456789 012345678446 447# CHECK: [0,0] DeeeeER . . . . . mul v0.4s, v0.4s, v0.4s448# CHECK-NEXT: [0,1] D====eeeeER . . . . saba v0.4s, v1.4s, v2.4s449# CHECK-NEXT: [0,2] D=====eeeeER . . . . saba v0.4s, v1.4s, v2.4s450# CHECK-NEXT: [0,3] D=========eeeeER . . . saba v0.4s, v0.4s, v1.4s451# CHECK-NEXT: [1,0] D=============eeeeER. . . mul v0.4s, v0.4s, v0.4s452# CHECK-NEXT: [1,1] D=================eeeeER . . saba v0.4s, v1.4s, v2.4s453# CHECK-NEXT: [1,2] .D=================eeeeER. . saba v0.4s, v1.4s, v2.4s454# CHECK-NEXT: [1,3] .D=====================eeeeER saba v0.4s, v0.4s, v1.4s455 456# CHECK: Average Wait times (based on the timeline view):457# CHECK-NEXT: [0]: Executions458# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue459# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready460# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage461 462# CHECK: [0] [1] [2] [3]463# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s464# CHECK-NEXT: 1. 2 11.5 0.0 0.0 saba v0.4s, v1.4s, v2.4s465# CHECK-NEXT: 2. 2 12.0 0.0 0.0 saba v0.4s, v1.4s, v2.4s466# CHECK-NEXT: 3. 2 16.0 0.0 0.0 saba v0.4s, v0.4s, v1.4s467# CHECK-NEXT: 2 11.8 0.1 0.0 <total>468 469# CHECK: [4] Code Region - sdot470 471# CHECK: Iterations: 100472# CHECK-NEXT: Instructions: 400473# CHECK-NEXT: Total Cycles: 1103474# CHECK-NEXT: Total uOps: 400475 476# CHECK: Dispatch Width: 6477# CHECK-NEXT: uOps Per Cycle: 0.36478# CHECK-NEXT: IPC: 0.36479# CHECK-NEXT: Block RThroughput: 0.8480 481# CHECK: Timeline view:482# CHECK-NEXT: 0123456789483# CHECK-NEXT: Index 0123456789 01234484 485# CHECK: [0,0] DeeeeER . . . . mul v0.4s, v0.4s, v0.4s486# CHECK-NEXT: [0,1] D====eeeER. . . . sdot v0.4s, v1.16b, v2.16b487# CHECK-NEXT: [0,2] D=====eeeER . . . sdot v0.4s, v1.16b, v2.16b488# CHECK-NEXT: [0,3] D========eeeER . . . sdot v0.4s, v0.16b, v1.16b489# CHECK-NEXT: [1,0] D===========eeeeER . . mul v0.4s, v0.4s, v0.4s490# CHECK-NEXT: [1,1] D===============eeeER . sdot v0.4s, v1.16b, v2.16b491# CHECK-NEXT: [1,2] .D===============eeeER . sdot v0.4s, v1.16b, v2.16b492# CHECK-NEXT: [1,3] .D==================eeeER sdot v0.4s, v0.16b, v1.16b493 494# CHECK: Average Wait times (based on the timeline view):495# CHECK-NEXT: [0]: Executions496# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue497# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready498# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage499 500# CHECK: [0] [1] [2] [3]501# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s502# CHECK-NEXT: 1. 2 10.5 0.0 0.0 sdot v0.4s, v1.16b, v2.16b503# CHECK-NEXT: 2. 2 11.0 0.0 0.0 sdot v0.4s, v1.16b, v2.16b504# CHECK-NEXT: 3. 2 14.0 0.0 0.0 sdot v0.4s, v0.16b, v1.16b505# CHECK-NEXT: 2 10.5 0.1 0.0 <total>506 507# CHECK: [5] Code Region - smmla508 509# CHECK: Iterations: 100510# CHECK-NEXT: Instructions: 400511# CHECK-NEXT: Total Cycles: 1103512# CHECK-NEXT: Total uOps: 400513 514# CHECK: Dispatch Width: 6515# CHECK-NEXT: uOps Per Cycle: 0.36516# CHECK-NEXT: IPC: 0.36517# CHECK-NEXT: Block RThroughput: 0.8518 519# CHECK: Timeline view:520# CHECK-NEXT: 0123456789521# CHECK-NEXT: Index 0123456789 01234522 523# CHECK: [0,0] DeeeeER . . . . mul v0.4s, v0.4s, v0.4s524# CHECK-NEXT: [0,1] D====eeeER. . . . smmla v0.4s, v1.16b, v2.16b525# CHECK-NEXT: [0,2] D=====eeeER . . . smmla v0.4s, v1.16b, v2.16b526# CHECK-NEXT: [0,3] D========eeeER . . . smmla v0.4s, v0.16b, v1.16b527# CHECK-NEXT: [1,0] D===========eeeeER . . mul v0.4s, v0.4s, v0.4s528# CHECK-NEXT: [1,1] D===============eeeER . smmla v0.4s, v1.16b, v2.16b529# CHECK-NEXT: [1,2] .D===============eeeER . smmla v0.4s, v1.16b, v2.16b530# CHECK-NEXT: [1,3] .D==================eeeER smmla v0.4s, v0.16b, v1.16b531 532# CHECK: Average Wait times (based on the timeline view):533# CHECK-NEXT: [0]: Executions534# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue535# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready536# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage537 538# CHECK: [0] [1] [2] [3]539# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s540# CHECK-NEXT: 1. 2 10.5 0.0 0.0 smmla v0.4s, v1.16b, v2.16b541# CHECK-NEXT: 2. 2 11.0 0.0 0.0 smmla v0.4s, v1.16b, v2.16b542# CHECK-NEXT: 3. 2 14.0 0.0 0.0 smmla v0.4s, v0.16b, v1.16b543# CHECK-NEXT: 2 10.5 0.1 0.0 <total>544 545# CHECK: [6] Code Region - mla546 547# CHECK: Iterations: 100548# CHECK-NEXT: Instructions: 400549# CHECK-NEXT: Total Cycles: 1303550# CHECK-NEXT: Total uOps: 400551 552# CHECK: Dispatch Width: 6553# CHECK-NEXT: uOps Per Cycle: 0.31554# CHECK-NEXT: IPC: 0.31555# CHECK-NEXT: Block RThroughput: 2.0556 557# CHECK: Timeline view:558# CHECK-NEXT: 0123456789559# CHECK-NEXT: Index 0123456789 012345678560 561# CHECK: [0,0] DeeeeER . . . . . mul v0.4s, v0.4s, v0.4s562# CHECK-NEXT: [0,1] D====eeeeER . . . . mla v0.4s, v1.4s, v2.4s563# CHECK-NEXT: [0,2] D=====eeeeER . . . . mla v0.4s, v1.4s, v2.4s564# CHECK-NEXT: [0,3] D=========eeeeER . . . mla v0.4s, v0.4s, v1.4s565# CHECK-NEXT: [1,0] D=============eeeeER. . . mul v0.4s, v0.4s, v0.4s566# CHECK-NEXT: [1,1] D=================eeeeER . . mla v0.4s, v1.4s, v2.4s567# CHECK-NEXT: [1,2] .D=================eeeeER. . mla v0.4s, v1.4s, v2.4s568# CHECK-NEXT: [1,3] .D=====================eeeeER mla v0.4s, v0.4s, v1.4s569 570# CHECK: Average Wait times (based on the timeline view):571# CHECK-NEXT: [0]: Executions572# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue573# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready574# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage575 576# CHECK: [0] [1] [2] [3]577# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s578# CHECK-NEXT: 1. 2 11.5 0.0 0.0 mla v0.4s, v1.4s, v2.4s579# CHECK-NEXT: 2. 2 12.0 0.0 0.0 mla v0.4s, v1.4s, v2.4s580# CHECK-NEXT: 3. 2 16.0 0.0 0.0 mla v0.4s, v0.4s, v1.4s581# CHECK-NEXT: 2 11.8 0.1 0.0 <total>582 583# CHECK: [7] Code Region - sqrdmlah584 585# CHECK: Iterations: 100586# CHECK-NEXT: Instructions: 400587# CHECK-NEXT: Total Cycles: 1403588# CHECK-NEXT: Total uOps: 400589 590# CHECK: Dispatch Width: 6591# CHECK-NEXT: uOps Per Cycle: 0.29592# CHECK-NEXT: IPC: 0.29593# CHECK-NEXT: Block RThroughput: 3.5594 595# CHECK: Timeline view:596# CHECK-NEXT: 0123456789 0597# CHECK-NEXT: Index 0123456789 0123456789598 599# CHECK: [0,0] DeeeeER . . . . . mul v0.4s, v0.4s, v0.4s600# CHECK-NEXT: [0,1] D====eeeeER . . . . sqrdmlah v0.4s, v1.4s, v2.4s601# CHECK-NEXT: [0,2] D======eeeeER . . . . sqrdmlah v0.4s, v1.4s, v2.4s602# CHECK-NEXT: [0,3] D==========eeeeER . . . sqrdmlah v0.4s, v0.4s, v1.4s603# CHECK-NEXT: [1,0] D==============eeeeER . . mul v0.4s, v0.4s, v0.4s604# CHECK-NEXT: [1,1] D==================eeeeER. . sqrdmlah v0.4s, v1.4s, v2.4s605# CHECK-NEXT: [1,2] .D===================eeeeER . sqrdmlah v0.4s, v1.4s, v2.4s606# CHECK-NEXT: [1,3] .D=======================eeeeER sqrdmlah v0.4s, v0.4s, v1.4s607 608# CHECK: Average Wait times (based on the timeline view):609# CHECK-NEXT: [0]: Executions610# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue611# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready612# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage613 614# CHECK: [0] [1] [2] [3]615# CHECK-NEXT: 0. 2 8.0 0.5 0.0 mul v0.4s, v0.4s, v0.4s616# CHECK-NEXT: 1. 2 12.0 0.0 0.0 sqrdmlah v0.4s, v1.4s, v2.4s617# CHECK-NEXT: 2. 2 13.5 0.0 0.0 sqrdmlah v0.4s, v1.4s, v2.4s618# CHECK-NEXT: 3. 2 17.5 0.0 0.0 sqrdmlah v0.4s, v0.4s, v1.4s619# CHECK-NEXT: 2 12.8 0.1 0.0 <total>620 621# CHECK: [8] Code Region - smlal2622 623# CHECK: Iterations: 100624# CHECK-NEXT: Instructions: 400625# CHECK-NEXT: Total Cycles: 1303626# CHECK-NEXT: Total uOps: 400627 628# CHECK: Dispatch Width: 6629# CHECK-NEXT: uOps Per Cycle: 0.31630# CHECK-NEXT: IPC: 0.31631# CHECK-NEXT: Block RThroughput: 2.0632 633# CHECK: Timeline view:634# CHECK-NEXT: 0123456789635# CHECK-NEXT: Index 0123456789 012345678636 637# CHECK: [0,0] DeeeeER . . . . . mul v0.4s, v0.4s, v0.4s638# CHECK-NEXT: [0,1] D====eeeeER . . . . smlal2 v0.4s, v1.8h, v2.8h639# CHECK-NEXT: [0,2] D=====eeeeER . . . . smlal2 v0.4s, v1.8h, v2.8h640# CHECK-NEXT: [0,3] D=========eeeeER . . . smlal2 v0.4s, v0.8h, v1.8h641# CHECK-NEXT: [1,0] D=============eeeeER. . . mul v0.4s, v0.4s, v0.4s642# CHECK-NEXT: [1,1] D=================eeeeER . . smlal2 v0.4s, v1.8h, v2.8h643# CHECK-NEXT: [1,2] .D=================eeeeER. . smlal2 v0.4s, v1.8h, v2.8h644# CHECK-NEXT: [1,3] .D=====================eeeeER smlal2 v0.4s, v0.8h, v1.8h645 646# CHECK: Average Wait times (based on the timeline view):647# CHECK-NEXT: [0]: Executions648# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue649# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready650# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage651 652# CHECK: [0] [1] [2] [3]653# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s654# CHECK-NEXT: 1. 2 11.5 0.0 0.0 smlal2 v0.4s, v1.8h, v2.8h655# CHECK-NEXT: 2. 2 12.0 0.0 0.0 smlal2 v0.4s, v1.8h, v2.8h656# CHECK-NEXT: 3. 2 16.0 0.0 0.0 smlal2 v0.4s, v0.8h, v1.8h657# CHECK-NEXT: 2 11.8 0.1 0.0 <total>658 659# CHECK: [9] Code Region - sadalp660 661# CHECK: Iterations: 100662# CHECK-NEXT: Instructions: 400663# CHECK-NEXT: Total Cycles: 1303664# CHECK-NEXT: Total uOps: 400665 666# CHECK: Dispatch Width: 6667# CHECK-NEXT: uOps Per Cycle: 0.31668# CHECK-NEXT: IPC: 0.31669# CHECK-NEXT: Block RThroughput: 1.5670 671# CHECK: Timeline view:672# CHECK-NEXT: 0123456789673# CHECK-NEXT: Index 0123456789 012345678674 675# CHECK: [0,0] DeeeeER . . . . . mul v0.4s, v0.4s, v0.4s676# CHECK-NEXT: [0,1] D====eeeeER . . . . sadalp v0.2d, v1.4s677# CHECK-NEXT: [0,2] D=====eeeeER . . . . sadalp v0.2d, v1.4s678# CHECK-NEXT: [0,3] D=========eeeeER . . . sadalp v0.2d, v0.4s679# CHECK-NEXT: [1,0] D=============eeeeER. . . mul v0.4s, v0.4s, v0.4s680# CHECK-NEXT: [1,1] D=================eeeeER . . sadalp v0.2d, v1.4s681# CHECK-NEXT: [1,2] .D=================eeeeER. . sadalp v0.2d, v1.4s682# CHECK-NEXT: [1,3] .D=====================eeeeER sadalp v0.2d, v0.4s683 684# CHECK: Average Wait times (based on the timeline view):685# CHECK-NEXT: [0]: Executions686# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue687# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready688# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage689 690# CHECK: [0] [1] [2] [3]691# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s692# CHECK-NEXT: 1. 2 11.5 0.0 0.0 sadalp v0.2d, v1.4s693# CHECK-NEXT: 2. 2 12.0 0.0 0.0 sadalp v0.2d, v1.4s694# CHECK-NEXT: 3. 2 16.0 0.0 0.0 sadalp v0.2d, v0.4s695# CHECK-NEXT: 2 11.8 0.1 0.0 <total>696 697# CHECK: [10] Code Region - ssra698 699# CHECK: Iterations: 100700# CHECK-NEXT: Instructions: 400701# CHECK-NEXT: Total Cycles: 1303702# CHECK-NEXT: Total uOps: 400703 704# CHECK: Dispatch Width: 6705# CHECK-NEXT: uOps Per Cycle: 0.31706# CHECK-NEXT: IPC: 0.31707# CHECK-NEXT: Block RThroughput: 1.5708 709# CHECK: Timeline view:710# CHECK-NEXT: 0123456789711# CHECK-NEXT: Index 0123456789 012345678712 713# CHECK: [0,0] DeeeeER . . . . . mul v0.4s, v0.4s, v0.4s714# CHECK-NEXT: [0,1] D====eeeeER . . . . ssra v0.2d, v1.2d, #1715# CHECK-NEXT: [0,2] D=====eeeeER . . . . ssra v0.2d, v1.2d, #1716# CHECK-NEXT: [0,3] D=========eeeeER . . . ssra v0.2d, v0.2d, #1717# CHECK-NEXT: [1,0] D=============eeeeER. . . mul v0.4s, v0.4s, v0.4s718# CHECK-NEXT: [1,1] D=================eeeeER . . ssra v0.2d, v1.2d, #1719# CHECK-NEXT: [1,2] .D=================eeeeER. . ssra v0.2d, v1.2d, #1720# CHECK-NEXT: [1,3] .D=====================eeeeER ssra v0.2d, v0.2d, #1721 722# CHECK: Average Wait times (based on the timeline view):723# CHECK-NEXT: [0]: Executions724# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue725# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready726# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage727 728# CHECK: [0] [1] [2] [3]729# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s730# CHECK-NEXT: 1. 2 11.5 0.0 0.0 ssra v0.2d, v1.2d, #1731# CHECK-NEXT: 2. 2 12.0 0.0 0.0 ssra v0.2d, v1.2d, #1732# CHECK-NEXT: 3. 2 16.0 0.0 0.0 ssra v0.2d, v0.2d, #1733# CHECK-NEXT: 2 11.8 0.1 0.0 <total>734 735# CHECK: [11] Code Region - fcmla736 737# CHECK: Iterations: 100738# CHECK-NEXT: Instructions: 400739# CHECK-NEXT: Total Cycles: 1303740# CHECK-NEXT: Total uOps: 400741 742# CHECK: Dispatch Width: 6743# CHECK-NEXT: uOps Per Cycle: 0.31744# CHECK-NEXT: IPC: 0.31745# CHECK-NEXT: Block RThroughput: 1.0746 747# CHECK: Timeline view:748# CHECK-NEXT: 0123456789749# CHECK-NEXT: Index 0123456789 012345678750 751# CHECK: [0,0] DeeeER . . . . . fmul v0.4s, v0.4s, v0.4s752# CHECK-NEXT: [0,1] D===eeeeER. . . . . fcmla v0.2d, v1.2d, v2.2d, #90753# CHECK-NEXT: [0,2] D=====eeeeER . . . . fcmla v0.2d, v1.2d, v2.2d, #90754# CHECK-NEXT: [0,3] D=========eeeeER . . . fcmla v0.2d, v0.2d, v1.2d, #90755# CHECK-NEXT: [1,0] D=============eeeER . . . fmul v0.4s, v0.4s, v0.4s756# CHECK-NEXT: [1,1] D================eeeeER . . fcmla v0.2d, v1.2d, v2.2d, #90757# CHECK-NEXT: [1,2] .D=================eeeeER. . fcmla v0.2d, v1.2d, v2.2d, #90758# CHECK-NEXT: [1,3] .D=====================eeeeER fcmla v0.2d, v0.2d, v1.2d, #90759 760# CHECK: Average Wait times (based on the timeline view):761# CHECK-NEXT: [0]: Executions762# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue763# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready764# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage765 766# CHECK: [0] [1] [2] [3]767# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul v0.4s, v0.4s, v0.4s768# CHECK-NEXT: 1. 2 10.5 0.0 0.0 fcmla v0.2d, v1.2d, v2.2d, #90769# CHECK-NEXT: 2. 2 12.0 0.0 0.0 fcmla v0.2d, v1.2d, v2.2d, #90770# CHECK-NEXT: 3. 2 16.0 0.0 0.0 fcmla v0.2d, v0.2d, v1.2d, #90771# CHECK-NEXT: 2 11.5 0.1 0.0 <total>772 773# CHECK: [12] Code Region - fmla774 775# CHECK: Iterations: 100776# CHECK-NEXT: Instructions: 600777# CHECK-NEXT: Total Cycles: 1703778# CHECK-NEXT: Total uOps: 600779 780# CHECK: Dispatch Width: 6781# CHECK-NEXT: uOps Per Cycle: 0.35782# CHECK-NEXT: IPC: 0.35783# CHECK-NEXT: Block RThroughput: 1.5784 785# CHECK: Timeline view:786# CHECK-NEXT: 0123456789 0123456787# CHECK-NEXT: Index 0123456789 0123456789788 789# CHECK: [0,0] DeeeER . . . . . .. fmul v0.2d, v0.2d, v0.2d790# CHECK-NEXT: [0,1] D=eeeeER . . . . . .. fmla v0.2d, v1.2d, v2.2d791# CHECK-NEXT: [0,2] D=====eeER. . . . . .. fadd v0.2d, v0.2d, v0.2d792# CHECK-NEXT: [0,3] D=======eeeeER . . . . .. fmla v0.2d, v1.2d, v2.2d793# CHECK-NEXT: [0,4] D=========eeeeER . . . .. fmla v0.2d, v1.2d, v2.2d794# CHECK-NEXT: [0,5] D=============eeeeER. . . .. fmla v0.2d, v0.2d, v1.2d795# CHECK-NEXT: [1,0] .D================eeeER . . .. fmul v0.2d, v0.2d, v0.2d796# CHECK-NEXT: [1,1] .D=================eeeeER. . .. fmla v0.2d, v1.2d, v2.2d797# CHECK-NEXT: [1,2] .D=====================eeER . .. fadd v0.2d, v0.2d, v0.2d798# CHECK-NEXT: [1,3] .D=======================eeeeER .. fmla v0.2d, v1.2d, v2.2d799# CHECK-NEXT: [1,4] .D=========================eeeeER .. fmla v0.2d, v1.2d, v2.2d800# CHECK-NEXT: [1,5] .D=============================eeeeER fmla v0.2d, v0.2d, v1.2d801 802# CHECK: Average Wait times (based on the timeline view):803# CHECK-NEXT: [0]: Executions804# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue805# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready806# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage807 808# CHECK: [0] [1] [2] [3]809# CHECK-NEXT: 0. 2 9.0 0.5 0.0 fmul v0.2d, v0.2d, v0.2d810# CHECK-NEXT: 1. 2 10.0 0.0 0.0 fmla v0.2d, v1.2d, v2.2d811# CHECK-NEXT: 2. 2 14.0 0.0 0.0 fadd v0.2d, v0.2d, v0.2d812# CHECK-NEXT: 3. 2 16.0 0.0 0.0 fmla v0.2d, v1.2d, v2.2d813# CHECK-NEXT: 4. 2 18.0 0.0 0.0 fmla v0.2d, v1.2d, v2.2d814# CHECK-NEXT: 5. 2 22.0 0.0 0.0 fmla v0.2d, v0.2d, v1.2d815# CHECK-NEXT: 2 14.8 0.1 0.0 <total>816 817# CHECK: [13] Code Region - fmlal818 819# CHECK: Iterations: 100820# CHECK-NEXT: Instructions: 600821# CHECK-NEXT: Total Cycles: 1903822# CHECK-NEXT: Total uOps: 600823 824# CHECK: Dispatch Width: 6825# CHECK-NEXT: uOps Per Cycle: 0.32826# CHECK-NEXT: IPC: 0.32827# CHECK-NEXT: Block RThroughput: 1.5828 829# CHECK: Timeline view:830# CHECK-NEXT: 0123456789 0123456789831# CHECK-NEXT: Index 0123456789 0123456789 0832 833# CHECK: [0,0] DeeeER . . . . . . . fmul v0.2d, v0.2d, v0.2d834# CHECK-NEXT: [0,1] D===eeeeER. . . . . . . fmlal v0.4s, v1.4h, v2.4h835# CHECK-NEXT: [0,2] D=======eeER . . . . . . fadd v0.2d, v0.2d, v0.2d836# CHECK-NEXT: [0,3] D=========eeeeER . . . . . fmlal v0.4s, v1.4h, v2.4h837# CHECK-NEXT: [0,4] D===========eeeeER . . . . . fmlal v0.4s, v1.4h, v2.4h838# CHECK-NEXT: [0,5] D===============eeeeER . . . . fmlal v0.4s, v0.4h, v1.4h839# CHECK-NEXT: [1,0] .D==================eeeER. . . . fmul v0.2d, v0.2d, v0.2d840# CHECK-NEXT: [1,1] .D=====================eeeeER . . . fmlal v0.4s, v1.4h, v2.4h841# CHECK-NEXT: [1,2] .D=========================eeER . . fadd v0.2d, v0.2d, v0.2d842# CHECK-NEXT: [1,3] .D===========================eeeeER. . fmlal v0.4s, v1.4h, v2.4h843# CHECK-NEXT: [1,4] .D=============================eeeeER . fmlal v0.4s, v1.4h, v2.4h844# CHECK-NEXT: [1,5] .D=================================eeeeER fmlal v0.4s, v0.4h, v1.4h845 846# CHECK: Average Wait times (based on the timeline view):847# CHECK-NEXT: [0]: Executions848# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue849# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready850# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage851 852# CHECK: [0] [1] [2] [3]853# CHECK-NEXT: 0. 2 10.0 0.5 0.0 fmul v0.2d, v0.2d, v0.2d854# CHECK-NEXT: 1. 2 13.0 0.0 0.0 fmlal v0.4s, v1.4h, v2.4h855# CHECK-NEXT: 2. 2 17.0 0.0 0.0 fadd v0.2d, v0.2d, v0.2d856# CHECK-NEXT: 3. 2 19.0 0.0 0.0 fmlal v0.4s, v1.4h, v2.4h857# CHECK-NEXT: 4. 2 21.0 0.0 0.0 fmlal v0.4s, v1.4h, v2.4h858# CHECK-NEXT: 5. 2 25.0 0.0 0.0 fmlal v0.4s, v0.4h, v1.4h859# CHECK-NEXT: 2 17.5 0.1 0.0 <total>860 861# CHECK: [14] Code Region - bfdot862 863# CHECK: Iterations: 100864# CHECK-NEXT: Instructions: 400865# CHECK-NEXT: Total Cycles: 1603866# CHECK-NEXT: Total uOps: 400867 868# CHECK: Dispatch Width: 6869# CHECK-NEXT: uOps Per Cycle: 0.25870# CHECK-NEXT: IPC: 0.25871# CHECK-NEXT: Block RThroughput: 1.0872 873# CHECK: Timeline view:874# CHECK-NEXT: 0123456789 01234875# CHECK-NEXT: Index 0123456789 0123456789876 877# CHECK: [0,0] DeeeER . . . . . . fmul v0.2d, v0.2d, v0.2d878# CHECK-NEXT: [0,1] D===eeeeeER . . . . . bfdot v0.4s, v1.8h, v2.8h879# CHECK-NEXT: [0,2] D======eeeeeER . . . . . bfdot v0.4s, v1.8h, v2.8h880# CHECK-NEXT: [0,3] D===========eeeeeER . . . . bfdot v0.4s, v0.8h, v1.8h881# CHECK-NEXT: [1,0] D================eeeER . . . fmul v0.2d, v0.2d, v0.2d882# CHECK-NEXT: [1,1] D===================eeeeeER . . bfdot v0.4s, v1.8h, v2.8h883# CHECK-NEXT: [1,2] .D=====================eeeeeER. . bfdot v0.4s, v1.8h, v2.8h884# CHECK-NEXT: [1,3] .D==========================eeeeeER bfdot v0.4s, v0.8h, v1.8h885 886# CHECK: Average Wait times (based on the timeline view):887# CHECK-NEXT: [0]: Executions888# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue889# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready890# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage891 892# CHECK: [0] [1] [2] [3]893# CHECK-NEXT: 0. 2 9.0 0.5 0.0 fmul v0.2d, v0.2d, v0.2d894# CHECK-NEXT: 1. 2 12.0 0.0 0.0 bfdot v0.4s, v1.8h, v2.8h895# CHECK-NEXT: 2. 2 14.5 0.0 0.0 bfdot v0.4s, v1.8h, v2.8h896# CHECK-NEXT: 3. 2 19.5 0.0 0.0 bfdot v0.4s, v0.8h, v1.8h897# CHECK-NEXT: 2 13.8 0.1 0.0 <total>898 899# CHECK: [15] Code Region - bfmmla900 901# CHECK: Iterations: 100902# CHECK-NEXT: Instructions: 400903# CHECK-NEXT: Total Cycles: 1903904# CHECK-NEXT: Total uOps: 400905 906# CHECK: Dispatch Width: 6907# CHECK-NEXT: uOps Per Cycle: 0.21908# CHECK-NEXT: IPC: 0.21909# CHECK-NEXT: Block RThroughput: 1.0910 911# CHECK: Timeline view:912# CHECK-NEXT: 0123456789 0123456789913# CHECK-NEXT: Index 0123456789 0123456789 0914 915# CHECK: [0,0] DeeeER . . . . . . . fmul v0.2d, v0.2d, v0.2d916# CHECK-NEXT: [0,1] D===eeeeeeER . . . . . . bfmmla v0.4s, v1.8h, v2.8h917# CHECK-NEXT: [0,2] D=======eeeeeeER . . . . . bfmmla v0.4s, v1.8h, v2.8h918# CHECK-NEXT: [0,3] D=============eeeeeeER . . . . bfmmla v0.4s, v0.8h, v1.8h919# CHECK-NEXT: [1,0] D===================eeeER. . . . fmul v0.2d, v0.2d, v0.2d920# CHECK-NEXT: [1,1] D======================eeeeeeER . . bfmmla v0.4s, v1.8h, v2.8h921# CHECK-NEXT: [1,2] .D=========================eeeeeeER. . bfmmla v0.4s, v1.8h, v2.8h922# CHECK-NEXT: [1,3] .D===============================eeeeeeER bfmmla v0.4s, v0.8h, v1.8h923 924# CHECK: Average Wait times (based on the timeline view):925# CHECK-NEXT: [0]: Executions926# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue927# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready928# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage929 930# CHECK: [0] [1] [2] [3]931# CHECK-NEXT: 0. 2 10.5 0.5 0.0 fmul v0.2d, v0.2d, v0.2d932# CHECK-NEXT: 1. 2 13.5 0.0 0.0 bfmmla v0.4s, v1.8h, v2.8h933# CHECK-NEXT: 2. 2 17.0 0.0 0.0 bfmmla v0.4s, v1.8h, v2.8h934# CHECK-NEXT: 3. 2 23.0 0.0 0.0 bfmmla v0.4s, v0.8h, v1.8h935# CHECK-NEXT: 2 16.0 0.1 0.0 <total>936 937# CHECK: [16] Code Region - bfmlalb938 939# CHECK: Iterations: 100940# CHECK-NEXT: Instructions: 400941# CHECK-NEXT: Total Cycles: 1503942# CHECK-NEXT: Total uOps: 400943 944# CHECK: Dispatch Width: 6945# CHECK-NEXT: uOps Per Cycle: 0.27946# CHECK-NEXT: IPC: 0.27947# CHECK-NEXT: Block RThroughput: 1.0948 949# CHECK: Timeline view:950# CHECK-NEXT: 0123456789 012951# CHECK-NEXT: Index 0123456789 0123456789952 953# CHECK: [0,0] DeeeER . . . . . . fmul v0.2d, v0.2d, v0.2d954# CHECK-NEXT: [0,1] D===eeeeeER . . . . . bfmlalb v0.4s, v1.8h, v2.8h955# CHECK-NEXT: [0,2] D=====eeeeeER . . . . . bfmlalb v0.4s, v1.8h, v2.8h956# CHECK-NEXT: [0,3] D==========eeeeeER . . . . bfmlalb v0.4s, v0.8h, v1.8h957# CHECK-NEXT: [1,0] D===============eeeER . . . fmul v0.2d, v0.2d, v0.2d958# CHECK-NEXT: [1,1] D==================eeeeeER . . bfmlalb v0.4s, v1.8h, v2.8h959# CHECK-NEXT: [1,2] .D===================eeeeeER . . bfmlalb v0.4s, v1.8h, v2.8h960# CHECK-NEXT: [1,3] .D========================eeeeeER bfmlalb v0.4s, v0.8h, v1.8h961 962# CHECK: Average Wait times (based on the timeline view):963# CHECK-NEXT: [0]: Executions964# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue965# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready966# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage967 968# CHECK: [0] [1] [2] [3]969# CHECK-NEXT: 0. 2 8.5 0.5 0.0 fmul v0.2d, v0.2d, v0.2d970# CHECK-NEXT: 1. 2 11.5 0.0 0.0 bfmlalb v0.4s, v1.8h, v2.8h971# CHECK-NEXT: 2. 2 13.0 0.0 0.0 bfmlalb v0.4s, v1.8h, v2.8h972# CHECK-NEXT: 3. 2 18.0 0.0 0.0 bfmlalb v0.4s, v0.8h, v1.8h973# CHECK-NEXT: 2 12.8 0.1 0.0 <total>974 975# CHECK: [17] Code Region - crc32b976 977# CHECK: Iterations: 100978# CHECK-NEXT: Instructions: 400979# CHECK-NEXT: Total Cycles: 703980# CHECK-NEXT: Total uOps: 400981 982# CHECK: Dispatch Width: 6983# CHECK-NEXT: uOps Per Cycle: 0.57984# CHECK-NEXT: IPC: 0.57985# CHECK-NEXT: Block RThroughput: 3.0986 987# CHECK: Timeline view:988# CHECK-NEXT: 0123456989# CHECK-NEXT: Index 0123456789990 991# CHECK: [0,0] DeeER. . .. mul w0, w0, w0992# CHECK-NEXT: [0,1] D==eeER . .. crc32b w0, w0, w1993# CHECK-NEXT: [0,2] D===eeER . .. crc32b w0, w0, w1994# CHECK-NEXT: [0,3] D=====eeER. .. crc32b w0, w0, w0995# CHECK-NEXT: [1,0] D=======eeER .. mul w0, w0, w0996# CHECK-NEXT: [1,1] D=========eeER .. crc32b w0, w0, w1997# CHECK-NEXT: [1,2] .D=========eeER.. crc32b w0, w0, w1998# CHECK-NEXT: [1,3] .D===========eeER crc32b w0, w0, w0999 1000# CHECK: Average Wait times (based on the timeline view):1001# CHECK-NEXT: [0]: Executions1002# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1003# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1004# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1005 1006# CHECK: [0] [1] [2] [3]1007# CHECK-NEXT: 0. 2 4.5 0.5 0.0 mul w0, w0, w01008# CHECK-NEXT: 1. 2 6.5 0.0 0.0 crc32b w0, w0, w11009# CHECK-NEXT: 2. 2 7.0 0.0 0.0 crc32b w0, w0, w11010# CHECK-NEXT: 3. 2 9.0 0.0 0.0 crc32b w0, w0, w01011# CHECK-NEXT: 2 6.8 0.1 0.0 <total>1012 1013# CHECK: [18] Code Region - Z saba1014 1015# CHECK: Iterations: 1001016# CHECK-NEXT: Instructions: 4001017# CHECK-NEXT: Total Cycles: 14031018# CHECK-NEXT: Total uOps: 5001019 1020# CHECK: Dispatch Width: 61021# CHECK-NEXT: uOps Per Cycle: 0.361022# CHECK-NEXT: IPC: 0.291023# CHECK-NEXT: Block RThroughput: 1.51024 1025# CHECK: Timeline view:1026# CHECK-NEXT: 0123456789 01027# CHECK-NEXT: Index 0123456789 01234567891028 1029# CHECK: [0,0] DeeeeeER . . . . . mul z0.d, z0.d, z0.d1030# CHECK-NEXT: [0,1] D=====eeeeER . . . . saba z0.d, z1.d, z2.d1031# CHECK-NEXT: [0,2] D======eeeeER . . . . saba z0.d, z1.d, z2.d1032# CHECK-NEXT: [0,3] D==========eeeeER . . . saba z0.d, z0.d, z1.d1033# CHECK-NEXT: [1,0] .D=============eeeeeER . . mul z0.d, z0.d, z0.d1034# CHECK-NEXT: [1,1] .D==================eeeeER . saba z0.d, z1.d, z2.d1035# CHECK-NEXT: [1,2] .D===================eeeeER . saba z0.d, z1.d, z2.d1036# CHECK-NEXT: [1,3] .D=======================eeeeER saba z0.d, z0.d, z1.d1037 1038# CHECK: Average Wait times (based on the timeline view):1039# CHECK-NEXT: [0]: Executions1040# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1041# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1042# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1043 1044# CHECK: [0] [1] [2] [3]1045# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul z0.d, z0.d, z0.d1046# CHECK-NEXT: 1. 2 12.5 0.0 0.0 saba z0.d, z1.d, z2.d1047# CHECK-NEXT: 2. 2 13.5 0.0 0.0 saba z0.d, z1.d, z2.d1048# CHECK-NEXT: 3. 2 17.5 0.0 0.0 saba z0.d, z0.d, z1.d1049# CHECK-NEXT: 2 12.8 0.1 0.0 <total>1050 1051# CHECK: [19] Code Region - Z sadalp1052 1053# CHECK: Iterations: 1001054# CHECK-NEXT: Instructions: 4001055# CHECK-NEXT: Total Cycles: 14031056# CHECK-NEXT: Total uOps: 5001057 1058# CHECK: Dispatch Width: 61059# CHECK-NEXT: uOps Per Cycle: 0.361060# CHECK-NEXT: IPC: 0.291061# CHECK-NEXT: Block RThroughput: 1.51062 1063# CHECK: Timeline view:1064# CHECK-NEXT: 0123456789 01065# CHECK-NEXT: Index 0123456789 01234567891066 1067# CHECK: [0,0] DeeeeeER . . . . . mul z0.d, z0.d, z0.d1068# CHECK-NEXT: [0,1] D=====eeeeER . . . . sadalp z0.d, p0/m, z1.s1069# CHECK-NEXT: [0,2] D======eeeeER . . . . sadalp z0.d, p0/m, z1.s1070# CHECK-NEXT: [0,3] D==========eeeeER . . . sadalp z0.d, p0/m, z0.s1071# CHECK-NEXT: [1,0] .D=============eeeeeER . . mul z0.d, z0.d, z0.d1072# CHECK-NEXT: [1,1] .D==================eeeeER . sadalp z0.d, p0/m, z1.s1073# CHECK-NEXT: [1,2] .D===================eeeeER . sadalp z0.d, p0/m, z1.s1074# CHECK-NEXT: [1,3] .D=======================eeeeER sadalp z0.d, p0/m, z0.s1075 1076# CHECK: Average Wait times (based on the timeline view):1077# CHECK-NEXT: [0]: Executions1078# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1079# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1080# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1081 1082# CHECK: [0] [1] [2] [3]1083# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul z0.d, z0.d, z0.d1084# CHECK-NEXT: 1. 2 12.5 0.0 0.0 sadalp z0.d, p0/m, z1.s1085# CHECK-NEXT: 2. 2 13.5 0.0 0.0 sadalp z0.d, p0/m, z1.s1086# CHECK-NEXT: 3. 2 17.5 0.0 0.0 sadalp z0.d, p0/m, z0.s1087# CHECK-NEXT: 2 12.8 0.1 0.0 <total>1088 1089# CHECK: [20] Code Region - Z ssra1090 1091# CHECK: Iterations: 1001092# CHECK-NEXT: Instructions: 4001093# CHECK-NEXT: Total Cycles: 14031094# CHECK-NEXT: Total uOps: 5001095 1096# CHECK: Dispatch Width: 61097# CHECK-NEXT: uOps Per Cycle: 0.361098# CHECK-NEXT: IPC: 0.291099# CHECK-NEXT: Block RThroughput: 1.51100 1101# CHECK: Timeline view:1102# CHECK-NEXT: 0123456789 01103# CHECK-NEXT: Index 0123456789 01234567891104 1105# CHECK: [0,0] DeeeeeER . . . . . mul z0.d, z0.d, z0.d1106# CHECK-NEXT: [0,1] D=====eeeeER . . . . ssra z0.d, z1.d, #11107# CHECK-NEXT: [0,2] D======eeeeER . . . . ssra z0.d, z1.d, #11108# CHECK-NEXT: [0,3] D==========eeeeER . . . ssra z0.d, z0.d, #11109# CHECK-NEXT: [1,0] .D=============eeeeeER . . mul z0.d, z0.d, z0.d1110# CHECK-NEXT: [1,1] .D==================eeeeER . ssra z0.d, z1.d, #11111# CHECK-NEXT: [1,2] .D===================eeeeER . ssra z0.d, z1.d, #11112# CHECK-NEXT: [1,3] .D=======================eeeeER ssra z0.d, z0.d, #11113 1114# CHECK: Average Wait times (based on the timeline view):1115# CHECK-NEXT: [0]: Executions1116# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1117# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1118# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1119 1120# CHECK: [0] [1] [2] [3]1121# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul z0.d, z0.d, z0.d1122# CHECK-NEXT: 1. 2 12.5 0.0 0.0 ssra z0.d, z1.d, #11123# CHECK-NEXT: 2. 2 13.5 0.0 0.0 ssra z0.d, z1.d, #11124# CHECK-NEXT: 3. 2 17.5 0.0 0.0 ssra z0.d, z0.d, #11125# CHECK-NEXT: 2 12.8 0.1 0.0 <total>1126 1127# CHECK: [21] Code Region - Z cdot.s1128 1129# CHECK: Iterations: 1001130# CHECK-NEXT: Instructions: 4001131# CHECK-NEXT: Total Cycles: 12031132# CHECK-NEXT: Total uOps: 5001133 1134# CHECK: Dispatch Width: 61135# CHECK-NEXT: uOps Per Cycle: 0.421136# CHECK-NEXT: IPC: 0.331137# CHECK-NEXT: Block RThroughput: 1.01138 1139# CHECK: Timeline view:1140# CHECK-NEXT: 01234567891141# CHECK-NEXT: Index 0123456789 01234561142 1143# CHECK: [0,0] DeeeeeER . . . .. mul z0.d, z0.d, z0.d1144# CHECK-NEXT: [0,1] D=====eeeER . . .. cdot z0.s, z1.b, z2.b, #901145# CHECK-NEXT: [0,2] D======eeeER . . .. cdot z0.s, z1.b, z2.b, #901146# CHECK-NEXT: [0,3] D=========eeeER. . .. cdot z0.s, z0.b, z1.b, #901147# CHECK-NEXT: [1,0] .D===========eeeeeER. .. mul z0.d, z0.d, z0.d1148# CHECK-NEXT: [1,1] .D================eeeER .. cdot z0.s, z1.b, z2.b, #901149# CHECK-NEXT: [1,2] .D=================eeeER .. cdot z0.s, z1.b, z2.b, #901150# CHECK-NEXT: [1,3] .D====================eeeER cdot z0.s, z0.b, z1.b, #901151 1152# CHECK: Average Wait times (based on the timeline view):1153# CHECK-NEXT: [0]: Executions1154# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1155# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1156# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1157 1158# CHECK: [0] [1] [2] [3]1159# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul z0.d, z0.d, z0.d1160# CHECK-NEXT: 1. 2 11.5 0.0 0.0 cdot z0.s, z1.b, z2.b, #901161# CHECK-NEXT: 2. 2 12.5 0.0 0.0 cdot z0.s, z1.b, z2.b, #901162# CHECK-NEXT: 3. 2 15.5 0.0 0.0 cdot z0.s, z0.b, z1.b, #901163# CHECK-NEXT: 2 11.5 0.1 0.0 <total>1164 1165# CHECK: [22] Code Region - Z cdot.d1166 1167# CHECK: Iterations: 1001168# CHECK-NEXT: Instructions: 4001169# CHECK-NEXT: Total Cycles: 14031170# CHECK-NEXT: Total uOps: 5001171 1172# CHECK: Dispatch Width: 61173# CHECK-NEXT: uOps Per Cycle: 0.361174# CHECK-NEXT: IPC: 0.291175# CHECK-NEXT: Block RThroughput: 2.51176 1177# CHECK: Timeline view:1178# CHECK-NEXT: 0123456789 01179# CHECK-NEXT: Index 0123456789 01234567891180 1181# CHECK: [0,0] DeeeeeER . . . . . mul z0.d, z0.d, z0.d1182# CHECK-NEXT: [0,1] D=====eeeeER . . . . cdot z0.d, z1.h, z2.h, #901183# CHECK-NEXT: [0,2] D======eeeeER . . . . cdot z0.d, z1.h, z2.h, #901184# CHECK-NEXT: [0,3] D==========eeeeER . . . cdot z0.d, z0.h, z1.h, #901185# CHECK-NEXT: [1,0] .D=============eeeeeER . . mul z0.d, z0.d, z0.d1186# CHECK-NEXT: [1,1] .D==================eeeeER . cdot z0.d, z1.h, z2.h, #901187# CHECK-NEXT: [1,2] .D===================eeeeER . cdot z0.d, z1.h, z2.h, #901188# CHECK-NEXT: [1,3] .D=======================eeeeER cdot z0.d, z0.h, z1.h, #901189 1190# CHECK: Average Wait times (based on the timeline view):1191# CHECK-NEXT: [0]: Executions1192# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1193# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1194# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1195 1196# CHECK: [0] [1] [2] [3]1197# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul z0.d, z0.d, z0.d1198# CHECK-NEXT: 1. 2 12.5 0.0 0.0 cdot z0.d, z1.h, z2.h, #901199# CHECK-NEXT: 2. 2 13.5 0.0 0.0 cdot z0.d, z1.h, z2.h, #901200# CHECK-NEXT: 3. 2 17.5 0.0 0.0 cdot z0.d, z0.h, z1.h, #901201# CHECK-NEXT: 2 12.8 0.1 0.0 <total>1202 1203# CHECK: [23] Code Region - Z cmla.b1204 1205# CHECK: Iterations: 1001206# CHECK-NEXT: Instructions: 4001207# CHECK-NEXT: Total Cycles: 14031208# CHECK-NEXT: Total uOps: 5001209 1210# CHECK: Dispatch Width: 61211# CHECK-NEXT: uOps Per Cycle: 0.361212# CHECK-NEXT: IPC: 0.291213# CHECK-NEXT: Block RThroughput: 2.51214 1215# CHECK: Timeline view:1216# CHECK-NEXT: 0123456789 01217# CHECK-NEXT: Index 0123456789 01234567891218 1219# CHECK: [0,0] DeeeeeER . . . . . mul z0.d, z0.d, z0.d1220# CHECK-NEXT: [0,1] D=====eeeeER . . . . cmla z0.b, z1.b, z2.b, #901221# CHECK-NEXT: [0,2] D======eeeeER . . . . cmla z0.b, z1.b, z2.b, #901222# CHECK-NEXT: [0,3] D==========eeeeER . . . cmla z0.b, z0.b, z1.b, #901223# CHECK-NEXT: [1,0] .D=============eeeeeER . . mul z0.d, z0.d, z0.d1224# CHECK-NEXT: [1,1] .D==================eeeeER . cmla z0.b, z1.b, z2.b, #901225# CHECK-NEXT: [1,2] .D===================eeeeER . cmla z0.b, z1.b, z2.b, #901226# CHECK-NEXT: [1,3] .D=======================eeeeER cmla z0.b, z0.b, z1.b, #901227 1228# CHECK: Average Wait times (based on the timeline view):1229# CHECK-NEXT: [0]: Executions1230# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1231# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1232# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1233 1234# CHECK: [0] [1] [2] [3]1235# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul z0.d, z0.d, z0.d1236# CHECK-NEXT: 1. 2 12.5 0.0 0.0 cmla z0.b, z1.b, z2.b, #901237# CHECK-NEXT: 2. 2 13.5 0.0 0.0 cmla z0.b, z1.b, z2.b, #901238# CHECK-NEXT: 3. 2 17.5 0.0 0.0 cmla z0.b, z0.b, z1.b, #901239# CHECK-NEXT: 2 12.8 0.1 0.0 <total>1240 1241# CHECK: [24] Code Region - Z cmla.d1242 1243# CHECK: Iterations: 1001244# CHECK-NEXT: Instructions: 4001245# CHECK-NEXT: Total Cycles: 18031246# CHECK-NEXT: Total uOps: 5001247 1248# CHECK: Dispatch Width: 61249# CHECK-NEXT: uOps Per Cycle: 0.281250# CHECK-NEXT: IPC: 0.221251# CHECK-NEXT: Block RThroughput: 4.01252 1253# CHECK: Timeline view:1254# CHECK-NEXT: 0123456789 0123456781255# CHECK-NEXT: Index 0123456789 01234567891256 1257# CHECK: [0,0] DeeeeeER . . . . . . . mul z0.d, z0.d, z0.d1258# CHECK-NEXT: [0,1] D=====eeeeeER . . . . . . cmla z0.d, z1.d, z2.d, #901259# CHECK-NEXT: [0,2] D========eeeeeER . . . . . cmla z0.d, z1.d, z2.d, #901260# CHECK-NEXT: [0,3] D=============eeeeeER . . . . cmla z0.d, z0.d, z1.d, #901261# CHECK-NEXT: [1,0] .D=================eeeeeER . . . mul z0.d, z0.d, z0.d1262# CHECK-NEXT: [1,1] .D======================eeeeeER . . cmla z0.d, z1.d, z2.d, #901263# CHECK-NEXT: [1,2] .D=========================eeeeeER . . cmla z0.d, z1.d, z2.d, #901264# CHECK-NEXT: [1,3] .D==============================eeeeeER cmla z0.d, z0.d, z1.d, #901265 1266# CHECK: Average Wait times (based on the timeline view):1267# CHECK-NEXT: [0]: Executions1268# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1269# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1270# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1271 1272# CHECK: [0] [1] [2] [3]1273# CHECK-NEXT: 0. 2 9.5 0.5 0.0 mul z0.d, z0.d, z0.d1274# CHECK-NEXT: 1. 2 14.5 0.0 0.0 cmla z0.d, z1.d, z2.d, #901275# CHECK-NEXT: 2. 2 17.5 0.0 0.0 cmla z0.d, z1.d, z2.d, #901276# CHECK-NEXT: 3. 2 22.5 0.0 0.0 cmla z0.d, z0.d, z1.d, #901277# CHECK-NEXT: 2 16.0 0.1 0.0 <total>1278 1279# CHECK: [25] Code Region - Z sdot.s1280 1281# CHECK: Iterations: 1001282# CHECK-NEXT: Instructions: 4001283# CHECK-NEXT: Total Cycles: 12031284# CHECK-NEXT: Total uOps: 5001285 1286# CHECK: Dispatch Width: 61287# CHECK-NEXT: uOps Per Cycle: 0.421288# CHECK-NEXT: IPC: 0.331289# CHECK-NEXT: Block RThroughput: 1.01290 1291# CHECK: Timeline view:1292# CHECK-NEXT: 01234567891293# CHECK-NEXT: Index 0123456789 01234561294 1295# CHECK: [0,0] DeeeeeER . . . .. mul z0.d, z0.d, z0.d1296# CHECK-NEXT: [0,1] D=====eeeER . . .. sdot z0.s, z1.b, z2.b1297# CHECK-NEXT: [0,2] D======eeeER . . .. sdot z0.s, z1.b, z2.b1298# CHECK-NEXT: [0,3] D=========eeeER. . .. sdot z0.s, z0.b, z1.b1299# CHECK-NEXT: [1,0] .D===========eeeeeER. .. mul z0.d, z0.d, z0.d1300# CHECK-NEXT: [1,1] .D================eeeER .. sdot z0.s, z1.b, z2.b1301# CHECK-NEXT: [1,2] .D=================eeeER .. sdot z0.s, z1.b, z2.b1302# CHECK-NEXT: [1,3] .D====================eeeER sdot z0.s, z0.b, z1.b1303 1304# CHECK: Average Wait times (based on the timeline view):1305# CHECK-NEXT: [0]: Executions1306# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1307# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1308# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1309 1310# CHECK: [0] [1] [2] [3]1311# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul z0.d, z0.d, z0.d1312# CHECK-NEXT: 1. 2 11.5 0.0 0.0 sdot z0.s, z1.b, z2.b1313# CHECK-NEXT: 2. 2 12.5 0.0 0.0 sdot z0.s, z1.b, z2.b1314# CHECK-NEXT: 3. 2 15.5 0.0 0.0 sdot z0.s, z0.b, z1.b1315# CHECK-NEXT: 2 11.5 0.1 0.0 <total>1316 1317# CHECK: [26] Code Region - Z sudot1318 1319# CHECK: Iterations: 1001320# CHECK-NEXT: Instructions: 4001321# CHECK-NEXT: Total Cycles: 12031322# CHECK-NEXT: Total uOps: 5001323 1324# CHECK: Dispatch Width: 61325# CHECK-NEXT: uOps Per Cycle: 0.421326# CHECK-NEXT: IPC: 0.331327# CHECK-NEXT: Block RThroughput: 1.01328 1329# CHECK: Timeline view:1330# CHECK-NEXT: 01234567891331# CHECK-NEXT: Index 0123456789 01234561332 1333# CHECK: [0,0] DeeeeeER . . . .. mul z0.d, z0.d, z0.d1334# CHECK-NEXT: [0,1] D=====eeeER . . .. sdot z0.s, z1.b, z2.b[1]1335# CHECK-NEXT: [0,2] D======eeeER . . .. sdot z0.s, z1.b, z2.b[1]1336# CHECK-NEXT: [0,3] D=========eeeER. . .. sdot z0.s, z0.b, z1.b[1]1337# CHECK-NEXT: [1,0] .D===========eeeeeER. .. mul z0.d, z0.d, z0.d1338# CHECK-NEXT: [1,1] .D================eeeER .. sdot z0.s, z1.b, z2.b[1]1339# CHECK-NEXT: [1,2] .D=================eeeER .. sdot z0.s, z1.b, z2.b[1]1340# CHECK-NEXT: [1,3] .D====================eeeER sdot z0.s, z0.b, z1.b[1]1341 1342# CHECK: Average Wait times (based on the timeline view):1343# CHECK-NEXT: [0]: Executions1344# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1345# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1346# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1347 1348# CHECK: [0] [1] [2] [3]1349# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul z0.d, z0.d, z0.d1350# CHECK-NEXT: 1. 2 11.5 0.0 0.0 sdot z0.s, z1.b, z2.b[1]1351# CHECK-NEXT: 2. 2 12.5 0.0 0.0 sdot z0.s, z1.b, z2.b[1]1352# CHECK-NEXT: 3. 2 15.5 0.0 0.0 sdot z0.s, z0.b, z1.b[1]1353# CHECK-NEXT: 2 11.5 0.1 0.0 <total>1354 1355# CHECK: [27] Code Region - Z sdot.d1356 1357# CHECK: Iterations: 1001358# CHECK-NEXT: Instructions: 4001359# CHECK-NEXT: Total Cycles: 14031360# CHECK-NEXT: Total uOps: 5001361 1362# CHECK: Dispatch Width: 61363# CHECK-NEXT: uOps Per Cycle: 0.361364# CHECK-NEXT: IPC: 0.291365# CHECK-NEXT: Block RThroughput: 2.51366 1367# CHECK: Timeline view:1368# CHECK-NEXT: 0123456789 01369# CHECK-NEXT: Index 0123456789 01234567891370 1371# CHECK: [0,0] DeeeeeER . . . . . mul z0.d, z0.d, z0.d1372# CHECK-NEXT: [0,1] D=====eeeeER . . . . sdot z0.d, z1.h, z2.h1373# CHECK-NEXT: [0,2] D======eeeeER . . . . sdot z0.d, z1.h, z2.h1374# CHECK-NEXT: [0,3] D==========eeeeER . . . sdot z0.d, z0.h, z1.h1375# CHECK-NEXT: [1,0] .D=============eeeeeER . . mul z0.d, z0.d, z0.d1376# CHECK-NEXT: [1,1] .D==================eeeeER . sdot z0.d, z1.h, z2.h1377# CHECK-NEXT: [1,2] .D===================eeeeER . sdot z0.d, z1.h, z2.h1378# CHECK-NEXT: [1,3] .D=======================eeeeER sdot z0.d, z0.h, z1.h1379 1380# CHECK: Average Wait times (based on the timeline view):1381# CHECK-NEXT: [0]: Executions1382# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1383# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1384# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1385 1386# CHECK: [0] [1] [2] [3]1387# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul z0.d, z0.d, z0.d1388# CHECK-NEXT: 1. 2 12.5 0.0 0.0 sdot z0.d, z1.h, z2.h1389# CHECK-NEXT: 2. 2 13.5 0.0 0.0 sdot z0.d, z1.h, z2.h1390# CHECK-NEXT: 3. 2 17.5 0.0 0.0 sdot z0.d, z0.h, z1.h1391# CHECK-NEXT: 2 12.8 0.1 0.0 <total>1392 1393# CHECK: [28] Code Region - Z smmla1394 1395# CHECK: Iterations: 1001396# CHECK-NEXT: Instructions: 4001397# CHECK-NEXT: Total Cycles: 11031398# CHECK-NEXT: Total uOps: 4001399 1400# CHECK: Dispatch Width: 61401# CHECK-NEXT: uOps Per Cycle: 0.361402# CHECK-NEXT: IPC: 0.361403# CHECK-NEXT: Block RThroughput: 0.81404 1405# CHECK: Timeline view:1406# CHECK-NEXT: 01234567891407# CHECK-NEXT: Index 0123456789 012341408 1409# CHECK: [0,0] DeeeeER . . . . mul z0.s, z0.s, z0.s1410# CHECK-NEXT: [0,1] D====eeeER. . . . smmla z0.s, z1.b, z2.b1411# CHECK-NEXT: [0,2] D=====eeeER . . . smmla z0.s, z1.b, z2.b1412# CHECK-NEXT: [0,3] D========eeeER . . . smmla z0.s, z0.b, z1.b1413# CHECK-NEXT: [1,0] D===========eeeeER . . mul z0.s, z0.s, z0.s1414# CHECK-NEXT: [1,1] D===============eeeER . smmla z0.s, z1.b, z2.b1415# CHECK-NEXT: [1,2] .D===============eeeER . smmla z0.s, z1.b, z2.b1416# CHECK-NEXT: [1,3] .D==================eeeER smmla z0.s, z0.b, z1.b1417 1418# CHECK: Average Wait times (based on the timeline view):1419# CHECK-NEXT: [0]: Executions1420# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1421# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1422# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1423 1424# CHECK: [0] [1] [2] [3]1425# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul z0.s, z0.s, z0.s1426# CHECK-NEXT: 1. 2 10.5 0.0 0.0 smmla z0.s, z1.b, z2.b1427# CHECK-NEXT: 2. 2 11.0 0.0 0.0 smmla z0.s, z1.b, z2.b1428# CHECK-NEXT: 3. 2 14.0 0.0 0.0 smmla z0.s, z0.b, z1.b1429# CHECK-NEXT: 2 10.5 0.1 0.0 <total>1430 1431# CHECK: [29] Code Region - Z mla.b1432 1433# CHECK: Iterations: 1001434# CHECK-NEXT: Instructions: 4001435# CHECK-NEXT: Total Cycles: 14031436# CHECK-NEXT: Total uOps: 5001437 1438# CHECK: Dispatch Width: 61439# CHECK-NEXT: uOps Per Cycle: 0.361440# CHECK-NEXT: IPC: 0.291441# CHECK-NEXT: Block RThroughput: 4.01442 1443# CHECK: Timeline view:1444# CHECK-NEXT: 0123456789 01445# CHECK-NEXT: Index 0123456789 01234567891446 1447# CHECK: [0,0] DeeeeeER . . . . . mul z0.d, z0.d, z0.d1448# CHECK-NEXT: [0,1] D=====eeeeER . . . . mla z0.b, p0/m, z1.b, z2.b1449# CHECK-NEXT: [0,2] D======eeeeER . . . . mla z0.b, p0/m, z1.b, z2.b1450# CHECK-NEXT: [0,3] D==========eeeeER . . . mla z0.b, p0/m, z0.b, z1.b1451# CHECK-NEXT: [1,0] .D=============eeeeeER . . mul z0.d, z0.d, z0.d1452# CHECK-NEXT: [1,1] .D==================eeeeER . mla z0.b, p0/m, z1.b, z2.b1453# CHECK-NEXT: [1,2] .D===================eeeeER . mla z0.b, p0/m, z1.b, z2.b1454# CHECK-NEXT: [1,3] .D=======================eeeeER mla z0.b, p0/m, z0.b, z1.b1455 1456# CHECK: Average Wait times (based on the timeline view):1457# CHECK-NEXT: [0]: Executions1458# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1459# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1460# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1461 1462# CHECK: [0] [1] [2] [3]1463# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul z0.d, z0.d, z0.d1464# CHECK-NEXT: 1. 2 12.5 0.0 0.0 mla z0.b, p0/m, z1.b, z2.b1465# CHECK-NEXT: 2. 2 13.5 0.0 0.0 mla z0.b, p0/m, z1.b, z2.b1466# CHECK-NEXT: 3. 2 17.5 0.0 0.0 mla z0.b, p0/m, z0.b, z1.b1467# CHECK-NEXT: 2 12.8 0.1 0.0 <total>1468 1469# CHECK: [30] Code Region - Z mla.d1470 1471# CHECK: Iterations: 1001472# CHECK-NEXT: Instructions: 4001473# CHECK-NEXT: Total Cycles: 18031474# CHECK-NEXT: Total uOps: 5001475 1476# CHECK: Dispatch Width: 61477# CHECK-NEXT: uOps Per Cycle: 0.281478# CHECK-NEXT: IPC: 0.221479# CHECK-NEXT: Block RThroughput: 4.01480 1481# CHECK: Timeline view:1482# CHECK-NEXT: 0123456789 0123456781483# CHECK-NEXT: Index 0123456789 01234567891484 1485# CHECK: [0,0] DeeeeeER . . . . . . . mul z0.d, z0.d, z0.d1486# CHECK-NEXT: [0,1] D=====eeeeeER . . . . . . mla z0.d, p0/m, z1.d, z2.d1487# CHECK-NEXT: [0,2] D========eeeeeER . . . . . mla z0.d, p0/m, z1.d, z2.d1488# CHECK-NEXT: [0,3] D=============eeeeeER . . . . mla z0.d, p0/m, z0.d, z1.d1489# CHECK-NEXT: [1,0] .D=================eeeeeER . . . mul z0.d, z0.d, z0.d1490# CHECK-NEXT: [1,1] .D======================eeeeeER . . mla z0.d, p0/m, z1.d, z2.d1491# CHECK-NEXT: [1,2] .D=========================eeeeeER . . mla z0.d, p0/m, z1.d, z2.d1492# CHECK-NEXT: [1,3] .D==============================eeeeeER mla z0.d, p0/m, z0.d, z1.d1493 1494# CHECK: Average Wait times (based on the timeline view):1495# CHECK-NEXT: [0]: Executions1496# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1497# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1498# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1499 1500# CHECK: [0] [1] [2] [3]1501# CHECK-NEXT: 0. 2 9.5 0.5 0.0 mul z0.d, z0.d, z0.d1502# CHECK-NEXT: 1. 2 14.5 0.0 0.0 mla z0.d, p0/m, z1.d, z2.d1503# CHECK-NEXT: 2. 2 17.5 0.0 0.0 mla z0.d, p0/m, z1.d, z2.d1504# CHECK-NEXT: 3. 2 22.5 0.0 0.0 mla z0.d, p0/m, z0.d, z1.d1505# CHECK-NEXT: 2 16.0 0.1 0.0 <total>1506 1507# CHECK: [31] Code Region - Z smlalb1508 1509# CHECK: Iterations: 1001510# CHECK-NEXT: Instructions: 4001511# CHECK-NEXT: Total Cycles: 14031512# CHECK-NEXT: Total uOps: 5001513 1514# CHECK: Dispatch Width: 61515# CHECK-NEXT: uOps Per Cycle: 0.361516# CHECK-NEXT: IPC: 0.291517# CHECK-NEXT: Block RThroughput: 2.51518 1519# CHECK: Timeline view:1520# CHECK-NEXT: 0123456789 01521# CHECK-NEXT: Index 0123456789 01234567891522 1523# CHECK: [0,0] DeeeeeER . . . . . mul z0.d, z0.d, z0.d1524# CHECK-NEXT: [0,1] D=====eeeeER . . . . smlalb z0.d, z1.s, z2.s1525# CHECK-NEXT: [0,2] D======eeeeER . . . . smlalb z0.d, z1.s, z2.s1526# CHECK-NEXT: [0,3] D==========eeeeER . . . smlalb z0.d, z0.s, z1.s1527# CHECK-NEXT: [1,0] .D=============eeeeeER . . mul z0.d, z0.d, z0.d1528# CHECK-NEXT: [1,1] .D==================eeeeER . smlalb z0.d, z1.s, z2.s1529# CHECK-NEXT: [1,2] .D===================eeeeER . smlalb z0.d, z1.s, z2.s1530# CHECK-NEXT: [1,3] .D=======================eeeeER smlalb z0.d, z0.s, z1.s1531 1532# CHECK: Average Wait times (based on the timeline view):1533# CHECK-NEXT: [0]: Executions1534# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1535# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1536# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1537 1538# CHECK: [0] [1] [2] [3]1539# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul z0.d, z0.d, z0.d1540# CHECK-NEXT: 1. 2 12.5 0.0 0.0 smlalb z0.d, z1.s, z2.s1541# CHECK-NEXT: 2. 2 13.5 0.0 0.0 smlalb z0.d, z1.s, z2.s1542# CHECK-NEXT: 3. 2 17.5 0.0 0.0 smlalb z0.d, z0.s, z1.s1543# CHECK-NEXT: 2 12.8 0.1 0.0 <total>1544 1545# CHECK: [32] Code Region - Z sqdmlalb1546 1547# CHECK: Iterations: 1001548# CHECK-NEXT: Instructions: 4001549# CHECK-NEXT: Total Cycles: 15031550# CHECK-NEXT: Total uOps: 5001551 1552# CHECK: Dispatch Width: 61553# CHECK-NEXT: uOps Per Cycle: 0.331554# CHECK-NEXT: IPC: 0.271555# CHECK-NEXT: Block RThroughput: 2.51556 1557# CHECK: Timeline view:1558# CHECK-NEXT: 0123456789 0121559# CHECK-NEXT: Index 0123456789 01234567891560 1561# CHECK: [0,0] DeeeeeER . . . . . . mul z0.d, z0.d, z0.d1562# CHECK-NEXT: [0,1] D=====eeeeER . . . . . sqdmlalb z0.d, z1.s, z2.s1563# CHECK-NEXT: [0,2] D=======eeeeER . . . . . sqdmlalb z0.d, z1.s, z2.s1564# CHECK-NEXT: [0,3] D===========eeeeER . . . . sqdmlalb z0.d, z0.s, z1.s1565# CHECK-NEXT: [1,0] .D==============eeeeeER . . . mul z0.d, z0.d, z0.d1566# CHECK-NEXT: [1,1] .D===================eeeeER . . sqdmlalb z0.d, z1.s, z2.s1567# CHECK-NEXT: [1,2] .D=====================eeeeER . . sqdmlalb z0.d, z1.s, z2.s1568# CHECK-NEXT: [1,3] .D=========================eeeeER sqdmlalb z0.d, z0.s, z1.s1569 1570# CHECK: Average Wait times (based on the timeline view):1571# CHECK-NEXT: [0]: Executions1572# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1573# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1574# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1575 1576# CHECK: [0] [1] [2] [3]1577# CHECK-NEXT: 0. 2 8.0 0.5 0.0 mul z0.d, z0.d, z0.d1578# CHECK-NEXT: 1. 2 13.0 0.0 0.0 sqdmlalb z0.d, z1.s, z2.s1579# CHECK-NEXT: 2. 2 15.0 0.0 0.0 sqdmlalb z0.d, z1.s, z2.s1580# CHECK-NEXT: 3. 2 19.0 0.0 0.0 sqdmlalb z0.d, z0.s, z1.s1581# CHECK-NEXT: 2 13.8 0.1 0.0 <total>1582 1583# CHECK: [33] Code Region - Z sqrdmlah.b1584 1585# CHECK: Iterations: 1001586# CHECK-NEXT: Instructions: 4001587# CHECK-NEXT: Total Cycles: 15031588# CHECK-NEXT: Total uOps: 5001589 1590# CHECK: Dispatch Width: 61591# CHECK-NEXT: uOps Per Cycle: 0.331592# CHECK-NEXT: IPC: 0.271593# CHECK-NEXT: Block RThroughput: 2.51594 1595# CHECK: Timeline view:1596# CHECK-NEXT: 0123456789 0121597# CHECK-NEXT: Index 0123456789 01234567891598 1599# CHECK: [0,0] DeeeeeER . . . . . . mul z0.d, z0.d, z0.d1600# CHECK-NEXT: [0,1] D=====eeeeER . . . . . sqrdmlah z0.b, z1.b, z2.b1601# CHECK-NEXT: [0,2] D=======eeeeER . . . . . sqrdmlah z0.b, z1.b, z2.b1602# CHECK-NEXT: [0,3] D===========eeeeER . . . . sqrdmlah z0.b, z0.b, z1.b1603# CHECK-NEXT: [1,0] .D==============eeeeeER . . . mul z0.d, z0.d, z0.d1604# CHECK-NEXT: [1,1] .D===================eeeeER . . sqrdmlah z0.b, z1.b, z2.b1605# CHECK-NEXT: [1,2] .D=====================eeeeER . . sqrdmlah z0.b, z1.b, z2.b1606# CHECK-NEXT: [1,3] .D=========================eeeeER sqrdmlah z0.b, z0.b, z1.b1607 1608# CHECK: Average Wait times (based on the timeline view):1609# CHECK-NEXT: [0]: Executions1610# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1611# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1612# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1613 1614# CHECK: [0] [1] [2] [3]1615# CHECK-NEXT: 0. 2 8.0 0.5 0.0 mul z0.d, z0.d, z0.d1616# CHECK-NEXT: 1. 2 13.0 0.0 0.0 sqrdmlah z0.b, z1.b, z2.b1617# CHECK-NEXT: 2. 2 15.0 0.0 0.0 sqrdmlah z0.b, z1.b, z2.b1618# CHECK-NEXT: 3. 2 19.0 0.0 0.0 sqrdmlah z0.b, z0.b, z1.b1619# CHECK-NEXT: 2 13.8 0.1 0.0 <total>1620 1621# CHECK: [34] Code Region - Z sqrdmlah.d1622 1623# CHECK: Iterations: 1001624# CHECK-NEXT: Instructions: 4001625# CHECK-NEXT: Total Cycles: 18031626# CHECK-NEXT: Total uOps: 5001627 1628# CHECK: Dispatch Width: 61629# CHECK-NEXT: uOps Per Cycle: 0.281630# CHECK-NEXT: IPC: 0.221631# CHECK-NEXT: Block RThroughput: 4.01632 1633# CHECK: Timeline view:1634# CHECK-NEXT: 0123456789 0123456781635# CHECK-NEXT: Index 0123456789 01234567891636 1637# CHECK: [0,0] DeeeeeER . . . . . . . mul z0.d, z0.d, z0.d1638# CHECK-NEXT: [0,1] D=====eeeeeER . . . . . . sqrdmlah z0.d, z1.d, z2.d1639# CHECK-NEXT: [0,2] D========eeeeeER . . . . . sqrdmlah z0.d, z1.d, z2.d1640# CHECK-NEXT: [0,3] D=============eeeeeER . . . . sqrdmlah z0.d, z0.d, z1.d1641# CHECK-NEXT: [1,0] .D=================eeeeeER . . . mul z0.d, z0.d, z0.d1642# CHECK-NEXT: [1,1] .D======================eeeeeER . . sqrdmlah z0.d, z1.d, z2.d1643# CHECK-NEXT: [1,2] .D=========================eeeeeER . . sqrdmlah z0.d, z1.d, z2.d1644# CHECK-NEXT: [1,3] .D==============================eeeeeER sqrdmlah z0.d, z0.d, z1.d1645 1646# CHECK: Average Wait times (based on the timeline view):1647# CHECK-NEXT: [0]: Executions1648# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1649# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1650# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1651 1652# CHECK: [0] [1] [2] [3]1653# CHECK-NEXT: 0. 2 9.5 0.5 0.0 mul z0.d, z0.d, z0.d1654# CHECK-NEXT: 1. 2 14.5 0.0 0.0 sqrdmlah z0.d, z1.d, z2.d1655# CHECK-NEXT: 2. 2 17.5 0.0 0.0 sqrdmlah z0.d, z1.d, z2.d1656# CHECK-NEXT: 3. 2 22.5 0.0 0.0 sqrdmlah z0.d, z0.d, z1.d1657# CHECK-NEXT: 2 16.0 0.1 0.0 <total>1658 1659# CHECK: [35] Code Region - Z fcmla ZPmZZ1660 1661# CHECK: Iterations: 1001662# CHECK-NEXT: Instructions: 4001663# CHECK-NEXT: Total Cycles: 15031664# CHECK-NEXT: Total uOps: 4001665 1666# CHECK: Dispatch Width: 61667# CHECK-NEXT: uOps Per Cycle: 0.271668# CHECK-NEXT: IPC: 0.271669# CHECK-NEXT: Block RThroughput: 1.01670 1671# CHECK: Timeline view:1672# CHECK-NEXT: 0123456789 0121673# CHECK-NEXT: Index 0123456789 01234567891674 1675# CHECK: [0,0] DeeeER . . . . . . fmul z0.d, z0.d, z0.d1676# CHECK-NEXT: [0,1] D===eeeeeER . . . . . fcmla z0.d, p0/m, z1.d, z2.d, #901677# CHECK-NEXT: [0,2] D=====eeeeeER . . . . . fcmla z0.d, p0/m, z1.d, z2.d, #901678# CHECK-NEXT: [0,3] D==========eeeeeER . . . . fcmla z0.d, p0/m, z0.d, z1.d, #901679# CHECK-NEXT: [1,0] D===============eeeER . . . fmul z0.d, z0.d, z0.d1680# CHECK-NEXT: [1,1] D==================eeeeeER . . fcmla z0.d, p0/m, z1.d, z2.d, #901681# CHECK-NEXT: [1,2] .D===================eeeeeER . . fcmla z0.d, p0/m, z1.d, z2.d, #901682# CHECK-NEXT: [1,3] .D========================eeeeeER fcmla z0.d, p0/m, z0.d, z1.d, #901683 1684# CHECK: Average Wait times (based on the timeline view):1685# CHECK-NEXT: [0]: Executions1686# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1687# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1688# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1689 1690# CHECK: [0] [1] [2] [3]1691# CHECK-NEXT: 0. 2 8.5 0.5 0.0 fmul z0.d, z0.d, z0.d1692# CHECK-NEXT: 1. 2 11.5 0.0 0.0 fcmla z0.d, p0/m, z1.d, z2.d, #901693# CHECK-NEXT: 2. 2 13.0 0.0 0.0 fcmla z0.d, p0/m, z1.d, z2.d, #901694# CHECK-NEXT: 3. 2 18.0 0.0 0.0 fcmla z0.d, p0/m, z0.d, z1.d, #901695# CHECK-NEXT: 2 12.8 0.1 0.0 <total>1696 1697# CHECK: [36] Code Region - Z fcmla ZZZI1698 1699# CHECK: Iterations: 1001700# CHECK-NEXT: Instructions: 4001701# CHECK-NEXT: Total Cycles: 15031702# CHECK-NEXT: Total uOps: 4001703 1704# CHECK: Dispatch Width: 61705# CHECK-NEXT: uOps Per Cycle: 0.271706# CHECK-NEXT: IPC: 0.271707# CHECK-NEXT: Block RThroughput: 1.01708 1709# CHECK: Timeline view:1710# CHECK-NEXT: 0123456789 0121711# CHECK-NEXT: Index 0123456789 01234567891712 1713# CHECK: [0,0] DeeeER . . . . . . fmul z0.d, z0.d, z0.d1714# CHECK-NEXT: [0,1] D===eeeeeER . . . . . fcmla z0.s, z1.s, z2.s[1], #901715# CHECK-NEXT: [0,2] D=====eeeeeER . . . . . fcmla z0.s, z1.s, z2.s[1], #901716# CHECK-NEXT: [0,3] D==========eeeeeER . . . . fcmla z0.s, z0.s, z1.s[1], #901717# CHECK-NEXT: [1,0] D===============eeeER . . . fmul z0.d, z0.d, z0.d1718# CHECK-NEXT: [1,1] D==================eeeeeER . . fcmla z0.s, z1.s, z2.s[1], #901719# CHECK-NEXT: [1,2] .D===================eeeeeER . . fcmla z0.s, z1.s, z2.s[1], #901720# CHECK-NEXT: [1,3] .D========================eeeeeER fcmla z0.s, z0.s, z1.s[1], #901721 1722# CHECK: Average Wait times (based on the timeline view):1723# CHECK-NEXT: [0]: Executions1724# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1725# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1726# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1727 1728# CHECK: [0] [1] [2] [3]1729# CHECK-NEXT: 0. 2 8.5 0.5 0.0 fmul z0.d, z0.d, z0.d1730# CHECK-NEXT: 1. 2 11.5 0.0 0.0 fcmla z0.s, z1.s, z2.s[1], #901731# CHECK-NEXT: 2. 2 13.0 0.0 0.0 fcmla z0.s, z1.s, z2.s[1], #901732# CHECK-NEXT: 3. 2 18.0 0.0 0.0 fcmla z0.s, z0.s, z1.s[1], #901733# CHECK-NEXT: 2 12.8 0.1 0.0 <total>1734 1735# CHECK: [37] Code Region - Z fmla ZPmZZ1736 1737# CHECK: Iterations: 1001738# CHECK-NEXT: Instructions: 4001739# CHECK-NEXT: Total Cycles: 13031740# CHECK-NEXT: Total uOps: 4001741 1742# CHECK: Dispatch Width: 61743# CHECK-NEXT: uOps Per Cycle: 0.311744# CHECK-NEXT: IPC: 0.311745# CHECK-NEXT: Block RThroughput: 1.01746 1747# CHECK: Timeline view:1748# CHECK-NEXT: 01234567891749# CHECK-NEXT: Index 0123456789 0123456781750 1751# CHECK: [0,0] DeeeER . . . . . fmul z0.d, z0.d, z0.d1752# CHECK-NEXT: [0,1] D===eeeeER. . . . . fmla z0.d, p0/m, z1.d, z2.d1753# CHECK-NEXT: [0,2] D=====eeeeER . . . . fmla z0.d, p0/m, z1.d, z2.d1754# CHECK-NEXT: [0,3] D=========eeeeER . . . fmla z0.d, p0/m, z0.d, z1.d1755# CHECK-NEXT: [1,0] D=============eeeER . . . fmul z0.d, z0.d, z0.d1756# CHECK-NEXT: [1,1] D================eeeeER . . fmla z0.d, p0/m, z1.d, z2.d1757# CHECK-NEXT: [1,2] .D=================eeeeER. . fmla z0.d, p0/m, z1.d, z2.d1758# CHECK-NEXT: [1,3] .D=====================eeeeER fmla z0.d, p0/m, z0.d, z1.d1759 1760# CHECK: Average Wait times (based on the timeline view):1761# CHECK-NEXT: [0]: Executions1762# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1763# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1764# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1765 1766# CHECK: [0] [1] [2] [3]1767# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul z0.d, z0.d, z0.d1768# CHECK-NEXT: 1. 2 10.5 0.0 0.0 fmla z0.d, p0/m, z1.d, z2.d1769# CHECK-NEXT: 2. 2 12.0 0.0 0.0 fmla z0.d, p0/m, z1.d, z2.d1770# CHECK-NEXT: 3. 2 16.0 0.0 0.0 fmla z0.d, p0/m, z0.d, z1.d1771# CHECK-NEXT: 2 11.5 0.1 0.0 <total>1772 1773# CHECK: [38] Code Region - Z fmla ZZZI1774 1775# CHECK: Iterations: 1001776# CHECK-NEXT: Instructions: 4001777# CHECK-NEXT: Total Cycles: 13031778# CHECK-NEXT: Total uOps: 4001779 1780# CHECK: Dispatch Width: 61781# CHECK-NEXT: uOps Per Cycle: 0.311782# CHECK-NEXT: IPC: 0.311783# CHECK-NEXT: Block RThroughput: 1.01784 1785# CHECK: Timeline view:1786# CHECK-NEXT: 01234567891787# CHECK-NEXT: Index 0123456789 0123456781788 1789# CHECK: [0,0] DeeeER . . . . . fmul z0.d, z0.d, z0.d1790# CHECK-NEXT: [0,1] D===eeeeER. . . . . fmla z0.d, z1.d, z2.d[1]1791# CHECK-NEXT: [0,2] D=====eeeeER . . . . fmla z0.d, z1.d, z2.d[1]1792# CHECK-NEXT: [0,3] D=========eeeeER . . . fmla z0.d, z0.d, z1.d[1]1793# CHECK-NEXT: [1,0] D=============eeeER . . . fmul z0.d, z0.d, z0.d1794# CHECK-NEXT: [1,1] D================eeeeER . . fmla z0.d, z1.d, z2.d[1]1795# CHECK-NEXT: [1,2] .D=================eeeeER. . fmla z0.d, z1.d, z2.d[1]1796# CHECK-NEXT: [1,3] .D=====================eeeeER fmla z0.d, z0.d, z1.d[1]1797 1798# CHECK: Average Wait times (based on the timeline view):1799# CHECK-NEXT: [0]: Executions1800# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1801# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1802# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1803 1804# CHECK: [0] [1] [2] [3]1805# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul z0.d, z0.d, z0.d1806# CHECK-NEXT: 1. 2 10.5 0.0 0.0 fmla z0.d, z1.d, z2.d[1]1807# CHECK-NEXT: 2. 2 12.0 0.0 0.0 fmla z0.d, z1.d, z2.d[1]1808# CHECK-NEXT: 3. 2 16.0 0.0 0.0 fmla z0.d, z0.d, z1.d[1]1809# CHECK-NEXT: 2 11.5 0.1 0.0 <total>1810 1811# CHECK: [39] Code Region - Z fmlalb ZZZ1812 1813# CHECK: Iterations: 1001814# CHECK-NEXT: Instructions: 4001815# CHECK-NEXT: Total Cycles: 13031816# CHECK-NEXT: Total uOps: 4001817 1818# CHECK: Dispatch Width: 61819# CHECK-NEXT: uOps Per Cycle: 0.311820# CHECK-NEXT: IPC: 0.311821# CHECK-NEXT: Block RThroughput: 1.01822 1823# CHECK: Timeline view:1824# CHECK-NEXT: 01234567891825# CHECK-NEXT: Index 0123456789 0123456781826 1827# CHECK: [0,0] DeeeER . . . . . fmul z0.d, z0.d, z0.d1828# CHECK-NEXT: [0,1] D===eeeeER. . . . . fmlalb z0.s, z1.h, z2.h1829# CHECK-NEXT: [0,2] D=====eeeeER . . . . fmlalb z0.s, z1.h, z2.h1830# CHECK-NEXT: [0,3] D=========eeeeER . . . fmlalb z0.s, z0.h, z1.h1831# CHECK-NEXT: [1,0] D=============eeeER . . . fmul z0.d, z0.d, z0.d1832# CHECK-NEXT: [1,1] D================eeeeER . . fmlalb z0.s, z1.h, z2.h1833# CHECK-NEXT: [1,2] .D=================eeeeER. . fmlalb z0.s, z1.h, z2.h1834# CHECK-NEXT: [1,3] .D=====================eeeeER fmlalb z0.s, z0.h, z1.h1835 1836# CHECK: Average Wait times (based on the timeline view):1837# CHECK-NEXT: [0]: Executions1838# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1839# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1840# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1841 1842# CHECK: [0] [1] [2] [3]1843# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul z0.d, z0.d, z0.d1844# CHECK-NEXT: 1. 2 10.5 0.0 0.0 fmlalb z0.s, z1.h, z2.h1845# CHECK-NEXT: 2. 2 12.0 0.0 0.0 fmlalb z0.s, z1.h, z2.h1846# CHECK-NEXT: 3. 2 16.0 0.0 0.0 fmlalb z0.s, z0.h, z1.h1847# CHECK-NEXT: 2 11.5 0.1 0.0 <total>1848 1849# CHECK: [40] Code Region - Z bfdot1850 1851# CHECK: Iterations: 1001852# CHECK-NEXT: Instructions: 4001853# CHECK-NEXT: Total Cycles: 16031854# CHECK-NEXT: Total uOps: 4001855 1856# CHECK: Dispatch Width: 61857# CHECK-NEXT: uOps Per Cycle: 0.251858# CHECK-NEXT: IPC: 0.251859# CHECK-NEXT: Block RThroughput: 1.01860 1861# CHECK: Timeline view:1862# CHECK-NEXT: 0123456789 012341863# CHECK-NEXT: Index 0123456789 01234567891864 1865# CHECK: [0,0] DeeeER . . . . . . fmul z0.d, z0.d, z0.d1866# CHECK-NEXT: [0,1] D===eeeeeER . . . . . bfdot z0.s, z1.h, z2.h1867# CHECK-NEXT: [0,2] D======eeeeeER . . . . . bfdot z0.s, z1.h, z2.h1868# CHECK-NEXT: [0,3] D===========eeeeeER . . . . bfdot z0.s, z0.h, z1.h1869# CHECK-NEXT: [1,0] D================eeeER . . . fmul z0.d, z0.d, z0.d1870# CHECK-NEXT: [1,1] D===================eeeeeER . . bfdot z0.s, z1.h, z2.h1871# CHECK-NEXT: [1,2] .D=====================eeeeeER. . bfdot z0.s, z1.h, z2.h1872# CHECK-NEXT: [1,3] .D==========================eeeeeER bfdot z0.s, z0.h, z1.h1873 1874# CHECK: Average Wait times (based on the timeline view):1875# CHECK-NEXT: [0]: Executions1876# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1877# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1878# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1879 1880# CHECK: [0] [1] [2] [3]1881# CHECK-NEXT: 0. 2 9.0 0.5 0.0 fmul z0.d, z0.d, z0.d1882# CHECK-NEXT: 1. 2 12.0 0.0 0.0 bfdot z0.s, z1.h, z2.h1883# CHECK-NEXT: 2. 2 14.5 0.0 0.0 bfdot z0.s, z1.h, z2.h1884# CHECK-NEXT: 3. 2 19.5 0.0 0.0 bfdot z0.s, z0.h, z1.h1885# CHECK-NEXT: 2 13.8 0.1 0.0 <total>1886 1887# CHECK: [41] Code Region - Z bfmmla1888 1889# CHECK: Iterations: 1001890# CHECK-NEXT: Instructions: 4001891# CHECK-NEXT: Total Cycles: 19031892# CHECK-NEXT: Total uOps: 4001893 1894# CHECK: Dispatch Width: 61895# CHECK-NEXT: uOps Per Cycle: 0.211896# CHECK-NEXT: IPC: 0.211897# CHECK-NEXT: Block RThroughput: 1.01898 1899# CHECK: Timeline view:1900# CHECK-NEXT: 0123456789 01234567891901# CHECK-NEXT: Index 0123456789 0123456789 01902 1903# CHECK: [0,0] DeeeER . . . . . . . fmul z0.d, z0.d, z0.d1904# CHECK-NEXT: [0,1] D===eeeeeeER . . . . . . bfmmla z0.s, z1.h, z2.h1905# CHECK-NEXT: [0,2] D=======eeeeeeER . . . . . bfmmla z0.s, z1.h, z2.h1906# CHECK-NEXT: [0,3] D=============eeeeeeER . . . . bfmmla z0.s, z0.h, z1.h1907# CHECK-NEXT: [1,0] D===================eeeER. . . . fmul z0.d, z0.d, z0.d1908# CHECK-NEXT: [1,1] D======================eeeeeeER . . bfmmla z0.s, z1.h, z2.h1909# CHECK-NEXT: [1,2] .D=========================eeeeeeER. . bfmmla z0.s, z1.h, z2.h1910# CHECK-NEXT: [1,3] .D===============================eeeeeeER bfmmla z0.s, z0.h, z1.h1911 1912# CHECK: Average Wait times (based on the timeline view):1913# CHECK-NEXT: [0]: Executions1914# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1915# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1916# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1917 1918# CHECK: [0] [1] [2] [3]1919# CHECK-NEXT: 0. 2 10.5 0.5 0.0 fmul z0.d, z0.d, z0.d1920# CHECK-NEXT: 1. 2 13.5 0.0 0.0 bfmmla z0.s, z1.h, z2.h1921# CHECK-NEXT: 2. 2 17.0 0.0 0.0 bfmmla z0.s, z1.h, z2.h1922# CHECK-NEXT: 3. 2 23.0 0.0 0.0 bfmmla z0.s, z0.h, z1.h1923# CHECK-NEXT: 2 16.0 0.1 0.0 <total>1924 1925# CHECK: [42] Code Region - bfmlalb1926 1927# CHECK: Iterations: 1001928# CHECK-NEXT: Instructions: 4001929# CHECK-NEXT: Total Cycles: 15031930# CHECK-NEXT: Total uOps: 4001931 1932# CHECK: Dispatch Width: 61933# CHECK-NEXT: uOps Per Cycle: 0.271934# CHECK-NEXT: IPC: 0.271935# CHECK-NEXT: Block RThroughput: 1.01936 1937# CHECK: Timeline view:1938# CHECK-NEXT: 0123456789 0121939# CHECK-NEXT: Index 0123456789 01234567891940 1941# CHECK: [0,0] DeeeER . . . . . . fmul z0.d, z0.d, z0.d1942# CHECK-NEXT: [0,1] D===eeeeeER . . . . . bfmlalb z0.s, z1.h, z2.h1943# CHECK-NEXT: [0,2] D=====eeeeeER . . . . . bfmlalb z0.s, z1.h, z2.h1944# CHECK-NEXT: [0,3] D==========eeeeeER . . . . bfmlalb z0.s, z0.h, z1.h1945# CHECK-NEXT: [1,0] D===============eeeER . . . fmul z0.d, z0.d, z0.d1946# CHECK-NEXT: [1,1] D==================eeeeeER . . bfmlalb z0.s, z1.h, z2.h1947# CHECK-NEXT: [1,2] .D===================eeeeeER . . bfmlalb z0.s, z1.h, z2.h1948# CHECK-NEXT: [1,3] .D========================eeeeeER bfmlalb z0.s, z0.h, z1.h1949 1950# CHECK: Average Wait times (based on the timeline view):1951# CHECK-NEXT: [0]: Executions1952# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1953# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1954# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1955 1956# CHECK: [0] [1] [2] [3]1957# CHECK-NEXT: 0. 2 8.5 0.5 0.0 fmul z0.d, z0.d, z0.d1958# CHECK-NEXT: 1. 2 11.5 0.0 0.0 bfmlalb z0.s, z1.h, z2.h1959# CHECK-NEXT: 2. 2 13.0 0.0 0.0 bfmlalb z0.s, z1.h, z2.h1960# CHECK-NEXT: 3. 2 18.0 0.0 0.0 bfmlalb z0.s, z0.h, z1.h1961# CHECK-NEXT: 2 12.8 0.1 0.0 <total>1962