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1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py2# RUN: llvm-mca -mtriple=aarch64 -mcpu=neoverse-v3 -mattr=+sve2-aes,+sve2-sha3,+sve2-sm4 --instruction-info=0 --resource-pressure=0 --timeline --timeline-max-iterations=2 < %s | FileCheck %s3 4# LLVM-MCA-BEGIN madd5mul x0, x0, x06madd x0, x1, x2, x07madd x0, x1, x2, x08madd x0, x0, x0, x09# LLVM-MCA-END10 11# LLVM-MCA-BEGIN smaddl12mul x0, x0, x013smaddl x0, w1, w2, x014smaddl x0, w1, w2, x015smaddl x0, w0, w0, x016# LLVM-MCA-END17 18# LLVM-MCA-BEGIN fmadd19fadd d0, d0, d020fmadd d0, d1, d2, d021fmul d0, d0, d022fmadd d0, d1, d2, d023fmadd d0, d1, d2, d024fmadd d0, d0, d1, d225# LLVM-MCA-END26 27# LLVM-MCA-BEGIN saba28mul v0.4s, v0.4s, v0.4s29saba v0.4s, v1.4s, v2.4s30saba v0.4s, v1.4s, v2.4s31saba v0.4s, v0.4s, v1.4s32# LLVM-MCA-END33 34# LLVM-MCA-BEGIN sdot35mul v0.4s, v0.4s, v0.4s36sdot v0.4s, v1.16b, v2.16b37sdot v0.4s, v1.16b, v2.16b38sdot v0.4s, v0.16b, v1.16b39# LLVM-MCA-END40 41# LLVM-MCA-BEGIN smmla42mul v0.4s, v0.4s, v0.4s43smmla v0.4s, v1.16b, v2.16b44smmla v0.4s, v1.16b, v2.16b45smmla v0.4s, v0.16b, v1.16b46# LLVM-MCA-END47 48# LLVM-MCA-BEGIN mla49mul v0.4s, v0.4s, v0.4s50mla v0.4s, v1.4s, v2.4s51mla v0.4s, v1.4s, v2.4s52mla v0.4s, v0.4s, v1.4s53# LLVM-MCA-END54 55# LLVM-MCA-BEGIN sqrdmlah56mul v0.4s, v0.4s, v0.4s57sqrdmlah v0.4s, v1.4s, v2.4s58sqrdmlah v0.4s, v1.4s, v2.4s59sqrdmlah v0.4s, v0.4s, v1.4s60# LLVM-MCA-END61 62# LLVM-MCA-BEGIN smlal263mul v0.4s, v0.4s, v0.4s64smlal2 v0.4s, v1.8h, v2.8h65smlal2 v0.4s, v1.8h, v2.8h66smlal2 v0.4s, v0.8h, v1.8h67# LLVM-MCA-END68 69# LLVM-MCA-BEGIN sadalp70mul v0.4s, v0.4s, v0.4s71sadalp v0.2d, v1.4s72sadalp v0.2d, v1.4s73sadalp v0.2d, v0.4s74# LLVM-MCA-END75 76# LLVM-MCA-BEGIN ssra77mul v0.4s, v0.4s, v0.4s78ssra v0.2d, v1.2d, #179ssra v0.2d, v1.2d, #180ssra v0.2d, v0.2d, #181# LLVM-MCA-END82 83# LLVM-MCA-BEGIN fcmla84fmul v0.4s, v0.4s, v0.4s85fcmla v0.2d, v1.2d, v2.2d, #9086fcmla v0.2d, v1.2d, v2.2d, #9087fcmla v0.2d, v0.2d, v1.2d, #9088# LLVM-MCA-END89 90# LLVM-MCA-BEGIN fmla91fmul v0.2d, v0.2d, v0.2d92fmla v0.2d, v1.2d, v2.2d93fadd v0.2d, v0.2d, v0.2d94fmla v0.2d, v1.2d, v2.2d95fmla v0.2d, v1.2d, v2.2d96fmla v0.2d, v0.2d, v1.2d97# LLVM-MCA-END98 99# LLVM-MCA-BEGIN fmlal100fmul v0.2d, v0.2d, v0.2d101fmlal v0.4s, v1.4h, v2.4h102fadd v0.2d, v0.2d, v0.2d103fmlal v0.4s, v1.4h, v2.4h104fmlal v0.4s, v1.4h, v2.4h105fmlal v0.4s, v0.4h, v1.4h106# LLVM-MCA-END107 108# LLVM-MCA-BEGIN bfdot109fmul v0.2d, v0.2d, v0.2d110bfdot v0.4s, v1.8h, v2.8h111bfdot v0.4s, v1.8h, v2.8h112bfdot v0.4s, v0.8h, v1.8h113# LLVM-MCA-END114 115# LLVM-MCA-BEGIN bfmmla116fmul v0.2d, v0.2d, v0.2d117bfmmla v0.4s, v1.8h, v2.8h118bfmmla v0.4s, v1.8h, v2.8h119bfmmla v0.4s, v0.8h, v1.8h120# LLVM-MCA-END121 122# LLVM-MCA-BEGIN bfmlalb123fmul v0.2d, v0.2d, v0.2d124bfmlalb v0.4s, v1.8h, v2.8h125bfmlalb v0.4s, v1.8h, v2.8h126bfmlalb v0.4s, v0.8h, v1.8h127# LLVM-MCA-END128 129# LLVM-MCA-BEGIN crc32b130mul w0, w0, w0131crc32b w0, w0, w1132crc32b w0, w0, w1133crc32b w0, w0, w0134# LLVM-MCA-END135 136# LLVM-MCA-BEGIN Z saba137mul z0.d, z0.d, z0.d138saba z0.d, z1.d, z2.d139saba z0.d, z1.d, z2.d140saba z0.d, z0.d, z1.d141# LLVM-MCA-END142 143# LLVM-MCA-BEGIN Z sadalp144mul z0.d, z0.d, z0.d145sadalp z0.d, p0/m, z1.s146sadalp z0.d, p0/m, z1.s147sadalp z0.d, p0/m, z0.s148# LLVM-MCA-END149 150# LLVM-MCA-BEGIN Z ssra151mul z0.d, z0.d, z0.d152ssra z0.d, z1.d, #1153ssra z0.d, z1.d, #1154ssra z0.d, z0.d, #1155# LLVM-MCA-END156 157# LLVM-MCA-BEGIN Z cdot.s158mul z0.d, z0.d, z0.d159cdot z0.s, z1.b, z2.b, #90160cdot z0.s, z1.b, z2.b, #90161cdot z0.s, z0.b, z1.b, #90162# LLVM-MCA-END163 164# LLVM-MCA-BEGIN Z cdot.d165mul z0.d, z0.d, z0.d166cdot z0.d, z1.h, z2.h, #90167cdot z0.d, z1.h, z2.h, #90168cdot z0.d, z0.h, z1.h, #90169# LLVM-MCA-END170 171# LLVM-MCA-BEGIN Z cmla.b172mul z0.d, z0.d, z0.d173cmla z0.b, z1.b, z2.b, #90174cmla z0.b, z1.b, z2.b, #90175cmla z0.b, z0.b, z1.b, #90176# LLVM-MCA-END177 178# LLVM-MCA-BEGIN Z cmla.d179mul z0.d, z0.d, z0.d180cmla z0.d, z1.d, z2.d, #90181cmla z0.d, z1.d, z2.d, #90182cmla z0.d, z0.d, z1.d, #90183# LLVM-MCA-END184 185# LLVM-MCA-BEGIN Z sdot.s186mul z0.d, z0.d, z0.d187sdot z0.s, z1.b, z2.b188sdot z0.s, z1.b, z2.b189sdot z0.s, z0.b, z1.b190# LLVM-MCA-END191 192# LLVM-MCA-BEGIN Z sudot193mul z0.d, z0.d, z0.d194sdot z0.s, z1.b, z2.b[1]195sdot z0.s, z1.b, z2.b[1]196sdot z0.s, z0.b, z1.b[1]197# LLVM-MCA-END198 199# LLVM-MCA-BEGIN Z sdot.d200mul z0.d, z0.d, z0.d201sdot z0.d, z1.h, z2.h202sdot z0.d, z1.h, z2.h203sdot z0.d, z0.h, z1.h204# LLVM-MCA-END205 206# LLVM-MCA-BEGIN Z smmla207mul z0.s, z0.s, z0.s208smmla z0.s, z1.b, z2.b209smmla z0.s, z1.b, z2.b210smmla z0.s, z0.b, z1.b211# LLVM-MCA-END212 213# LLVM-MCA-BEGIN Z mla.b214mul z0.d, z0.d, z0.d215mla z0.b, p0/m, z1.b, z2.b216mla z0.b, p0/m, z1.b, z2.b217mla z0.b, p0/m, z0.b, z1.b218# LLVM-MCA-END219 220# LLVM-MCA-BEGIN Z mla.d221mul z0.d, z0.d, z0.d222mla z0.d, p0/m, z1.d, z2.d223mla z0.d, p0/m, z1.d, z2.d224mla z0.d, p0/m, z0.d, z1.d225# LLVM-MCA-END226 227# LLVM-MCA-BEGIN Z smlalb228mul z0.d, z0.d, z0.d229smlalb z0.d, z1.s, z2.s230smlalb z0.d, z1.s, z2.s231smlalb z0.d, z0.s, z1.s232# LLVM-MCA-END233 234# LLVM-MCA-BEGIN Z sqdmlalb235mul z0.d, z0.d, z0.d236sqdmlalb z0.d, z1.s, z2.s237sqdmlalb z0.d, z1.s, z2.s238sqdmlalb z0.d, z0.s, z1.s239# LLVM-MCA-END240 241# LLVM-MCA-BEGIN Z sqrdmlah.b242mul z0.d, z0.d, z0.d243sqrdmlah z0.b, z1.b, z2.b244sqrdmlah z0.b, z1.b, z2.b245sqrdmlah z0.b, z0.b, z1.b246# LLVM-MCA-END247 248# LLVM-MCA-BEGIN Z sqrdmlah.d249mul z0.d, z0.d, z0.d250sqrdmlah z0.d, z1.d, z2.d251sqrdmlah z0.d, z1.d, z2.d252sqrdmlah z0.d, z0.d, z1.d253# LLVM-MCA-END254 255# LLVM-MCA-BEGIN Z fcmla ZPmZZ256fmul z0.d, z0.d, z0.d257fcmla z0.d, p0/m, z1.d, z2.d, 90258fcmla z0.d, p0/m, z1.d, z2.d, 90259fcmla z0.d, p0/m, z0.d, z1.d, 90260# LLVM-MCA-END261 262# LLVM-MCA-BEGIN Z fcmla ZZZI263fmul z0.d, z0.d, z0.d264fcmla z0.s, z1.s, z2.s[1], 90265fcmla z0.s, z1.s, z2.s[1], 90266fcmla z0.s, z0.s, z1.s[1], 90267# LLVM-MCA-END268 269# LLVM-MCA-BEGIN Z fmla ZPmZZ270fmul z0.d, z0.d, z0.d271fmla z0.d, p0/m, z1.d, z2.d272fmla z0.d, p0/m, z1.d, z2.d273fmla z0.d, p0/m, z0.d, z1.d274# LLVM-MCA-END275 276# LLVM-MCA-BEGIN Z fmla ZZZI277fmul z0.d, z0.d, z0.d278fmla z0.d, z1.d, z2.d[1]279fmla z0.d, z1.d, z2.d[1]280fmla z0.d, z0.d, z1.d[1]281# LLVM-MCA-END282 283# LLVM-MCA-BEGIN Z fmlalb ZZZ284fmul z0.d, z0.d, z0.d285fmlalb z0.s, z1.h, z2.h286fmlalb z0.s, z1.h, z2.h287fmlalb z0.s, z0.h, z1.h288# LLVM-MCA-END289 290# LLVM-MCA-BEGIN Z bfdot291fmul z0.d, z0.d, z0.d292bfdot z0.s, z1.h, z2.h293bfdot z0.s, z1.h, z2.h294bfdot z0.s, z0.h, z1.h295# LLVM-MCA-END296 297# LLVM-MCA-BEGIN Z bfmmla298fmul z0.d, z0.d, z0.d299bfmmla z0.s, z1.h, z2.h300bfmmla z0.s, z1.h, z2.h301bfmmla z0.s, z0.h, z1.h302# LLVM-MCA-END303 304# LLVM-MCA-BEGIN bfmlalb305fmul z0.d, z0.d, z0.d306bfmlalb z0.s, z1.h, z2.h307bfmlalb z0.s, z1.h, z2.h308bfmlalb z0.s, z0.h, z1.h309# LLVM-MCA-END310 311# CHECK: [0] Code Region - madd312 313# CHECK: Iterations: 100314# CHECK-NEXT: Instructions: 400315# CHECK-NEXT: Total Cycles: 205316# CHECK-NEXT: Total uOps: 400317 318# CHECK: Dispatch Width: 10319# CHECK-NEXT: uOps Per Cycle: 1.95320# CHECK-NEXT: IPC: 1.95321# CHECK-NEXT: Block RThroughput: 2.0322 323# CHECK: Timeline view:324# CHECK-NEXT: Index 012345678325 326# CHECK: [0,0] DeeER. . mul x0, x0, x0327# CHECK-NEXT: [0,1] D=eeER . madd x0, x1, x2, x0328# CHECK-NEXT: [0,2] DeeE-R . madd x0, x1, x2, x0329# CHECK-NEXT: [0,3] D==eeER . madd x0, x0, x0, x0330# CHECK-NEXT: [1,0] D====eeER mul x0, x0, x0331# CHECK-NEXT: [1,1] D==eeE--R madd x0, x1, x2, x0332# CHECK-NEXT: [1,2] D=eeE---R madd x0, x1, x2, x0333# CHECK-NEXT: [1,3] D===eeE-R madd x0, x0, x0, x0334 335# CHECK: Average Wait times (based on the timeline view):336# CHECK-NEXT: [0]: Executions337# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue338# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready339# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage340 341# CHECK: [0] [1] [2] [3]342# CHECK-NEXT: 0. 2 3.0 0.5 0.0 mul x0, x0, x0343# CHECK-NEXT: 1. 2 2.5 2.5 1.0 madd x0, x1, x2, x0344# CHECK-NEXT: 2. 2 1.5 1.5 2.0 madd x0, x1, x2, x0345# CHECK-NEXT: 3. 2 3.5 0.0 0.5 madd x0, x0, x0, x0346# CHECK-NEXT: 2 2.6 1.1 0.9 <total>347 348# CHECK: [1] Code Region - smaddl349 350# CHECK: Iterations: 100351# CHECK-NEXT: Instructions: 400352# CHECK-NEXT: Total Cycles: 803353# CHECK-NEXT: Total uOps: 400354 355# CHECK: Dispatch Width: 10356# CHECK-NEXT: uOps Per Cycle: 0.50357# CHECK-NEXT: IPC: 0.50358# CHECK-NEXT: Block RThroughput: 2.0359 360# CHECK: Timeline view:361# CHECK-NEXT: 012345678362# CHECK-NEXT: Index 0123456789363 364# CHECK: [0,0] DeeER. . . . mul x0, x0, x0365# CHECK-NEXT: [0,1] D==eeER . . . smaddl x0, w1, w2, x0366# CHECK-NEXT: [0,2] D====eeER . . . smaddl x0, w1, w2, x0367# CHECK-NEXT: [0,3] D======eeER . . smaddl x0, w0, w0, x0368# CHECK-NEXT: [1,0] D========eeER . . mul x0, x0, x0369# CHECK-NEXT: [1,1] D==========eeER. . smaddl x0, w1, w2, x0370# CHECK-NEXT: [1,2] D============eeER . smaddl x0, w1, w2, x0371# CHECK-NEXT: [1,3] D==============eeER smaddl x0, w0, w0, x0372 373# CHECK: Average Wait times (based on the timeline view):374# CHECK-NEXT: [0]: Executions375# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue376# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready377# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage378 379# CHECK: [0] [1] [2] [3]380# CHECK-NEXT: 0. 2 5.0 0.5 0.0 mul x0, x0, x0381# CHECK-NEXT: 1. 2 7.0 0.0 0.0 smaddl x0, w1, w2, x0382# CHECK-NEXT: 2. 2 9.0 0.0 0.0 smaddl x0, w1, w2, x0383# CHECK-NEXT: 3. 2 11.0 0.0 0.0 smaddl x0, w0, w0, x0384# CHECK-NEXT: 2 8.0 0.1 0.0 <total>385 386# CHECK: [2] Code Region - fmadd387 388# CHECK: Iterations: 100389# CHECK-NEXT: Instructions: 600390# CHECK-NEXT: Total Cycles: 1703391# CHECK-NEXT: Total uOps: 600392 393# CHECK: Dispatch Width: 10394# CHECK-NEXT: uOps Per Cycle: 0.35395# CHECK-NEXT: IPC: 0.35396# CHECK-NEXT: Block RThroughput: 1.5397 398# CHECK: Timeline view:399# CHECK-NEXT: 0123456789 0123456400# CHECK-NEXT: Index 0123456789 0123456789401 402# CHECK: [0,0] DeeER. . . . . . .. fadd d0, d0, d0403# CHECK-NEXT: [0,1] D==eeeeER . . . . . .. fmadd d0, d1, d2, d0404# CHECK-NEXT: [0,2] D======eeeER . . . . .. fmul d0, d0, d0405# CHECK-NEXT: [0,3] D=======eeeeER . . . . .. fmadd d0, d1, d2, d0406# CHECK-NEXT: [0,4] D=========eeeeER . . . .. fmadd d0, d1, d2, d0407# CHECK-NEXT: [0,5] D=============eeeeER. . . .. fmadd d0, d0, d1, d2408# CHECK-NEXT: [1,0] D=================eeER . . .. fadd d0, d0, d0409# CHECK-NEXT: [1,1] D===================eeeeER . .. fmadd d0, d1, d2, d0410# CHECK-NEXT: [1,2] D=======================eeeER . .. fmul d0, d0, d0411# CHECK-NEXT: [1,3] D========================eeeeER .. fmadd d0, d1, d2, d0412# CHECK-NEXT: [1,4] .D=========================eeeeER .. fmadd d0, d1, d2, d0413# CHECK-NEXT: [1,5] .D=============================eeeeER fmadd d0, d0, d1, d2414 415# CHECK: Average Wait times (based on the timeline view):416# CHECK-NEXT: [0]: Executions417# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue418# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready419# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage420 421# CHECK: [0] [1] [2] [3]422# CHECK-NEXT: 0. 2 9.5 0.5 0.0 fadd d0, d0, d0423# CHECK-NEXT: 1. 2 11.5 0.0 0.0 fmadd d0, d1, d2, d0424# CHECK-NEXT: 2. 2 15.5 0.0 0.0 fmul d0, d0, d0425# CHECK-NEXT: 3. 2 16.5 0.0 0.0 fmadd d0, d1, d2, d0426# CHECK-NEXT: 4. 2 18.0 0.0 0.0 fmadd d0, d1, d2, d0427# CHECK-NEXT: 5. 2 22.0 0.0 0.0 fmadd d0, d0, d1, d2428# CHECK-NEXT: 2 15.5 0.1 0.0 <total>429 430# CHECK: [3] Code Region - saba431 432# CHECK: Iterations: 100433# CHECK-NEXT: Instructions: 400434# CHECK-NEXT: Total Cycles: 1303435# CHECK-NEXT: Total uOps: 400436 437# CHECK: Dispatch Width: 10438# CHECK-NEXT: uOps Per Cycle: 0.31439# CHECK-NEXT: IPC: 0.31440# CHECK-NEXT: Block RThroughput: 0.8441 442# CHECK: Timeline view:443# CHECK-NEXT: 0123456789444# CHECK-NEXT: Index 0123456789 012345678445 446# CHECK: [0,0] DeeeeER . . . . . mul v0.4s, v0.4s, v0.4s447# CHECK-NEXT: [0,1] D====eeeeER . . . . saba v0.4s, v1.4s, v2.4s448# CHECK-NEXT: [0,2] D=====eeeeER . . . . saba v0.4s, v1.4s, v2.4s449# CHECK-NEXT: [0,3] D=========eeeeER . . . saba v0.4s, v0.4s, v1.4s450# CHECK-NEXT: [1,0] D=============eeeeER. . . mul v0.4s, v0.4s, v0.4s451# CHECK-NEXT: [1,1] D=================eeeeER . . saba v0.4s, v1.4s, v2.4s452# CHECK-NEXT: [1,2] D==================eeeeER. . saba v0.4s, v1.4s, v2.4s453# CHECK-NEXT: [1,3] D======================eeeeER saba v0.4s, v0.4s, v1.4s454 455# CHECK: Average Wait times (based on the timeline view):456# CHECK-NEXT: [0]: Executions457# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue458# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready459# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage460 461# CHECK: [0] [1] [2] [3]462# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s463# CHECK-NEXT: 1. 2 11.5 0.0 0.0 saba v0.4s, v1.4s, v2.4s464# CHECK-NEXT: 2. 2 12.5 0.0 0.0 saba v0.4s, v1.4s, v2.4s465# CHECK-NEXT: 3. 2 16.5 0.0 0.0 saba v0.4s, v0.4s, v1.4s466# CHECK-NEXT: 2 12.0 0.1 0.0 <total>467 468# CHECK: [4] Code Region - sdot469 470# CHECK: Iterations: 100471# CHECK-NEXT: Instructions: 400472# CHECK-NEXT: Total Cycles: 1103473# CHECK-NEXT: Total uOps: 400474 475# CHECK: Dispatch Width: 10476# CHECK-NEXT: uOps Per Cycle: 0.36477# CHECK-NEXT: IPC: 0.36478# CHECK-NEXT: Block RThroughput: 0.8479 480# CHECK: Timeline view:481# CHECK-NEXT: 0123456789482# CHECK-NEXT: Index 0123456789 01234483 484# CHECK: [0,0] DeeeeER . . . . mul v0.4s, v0.4s, v0.4s485# CHECK-NEXT: [0,1] D====eeeER. . . . sdot v0.4s, v1.16b, v2.16b486# CHECK-NEXT: [0,2] D=====eeeER . . . sdot v0.4s, v1.16b, v2.16b487# CHECK-NEXT: [0,3] D========eeeER . . . sdot v0.4s, v0.16b, v1.16b488# CHECK-NEXT: [1,0] D===========eeeeER . . mul v0.4s, v0.4s, v0.4s489# CHECK-NEXT: [1,1] D===============eeeER . sdot v0.4s, v1.16b, v2.16b490# CHECK-NEXT: [1,2] D================eeeER . sdot v0.4s, v1.16b, v2.16b491# CHECK-NEXT: [1,3] D===================eeeER sdot v0.4s, v0.16b, v1.16b492 493# CHECK: Average Wait times (based on the timeline view):494# CHECK-NEXT: [0]: Executions495# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue496# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready497# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage498 499# CHECK: [0] [1] [2] [3]500# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s501# CHECK-NEXT: 1. 2 10.5 0.0 0.0 sdot v0.4s, v1.16b, v2.16b502# CHECK-NEXT: 2. 2 11.5 0.0 0.0 sdot v0.4s, v1.16b, v2.16b503# CHECK-NEXT: 3. 2 14.5 0.0 0.0 sdot v0.4s, v0.16b, v1.16b504# CHECK-NEXT: 2 10.8 0.1 0.0 <total>505 506# CHECK: [5] Code Region - smmla507 508# CHECK: Iterations: 100509# CHECK-NEXT: Instructions: 400510# CHECK-NEXT: Total Cycles: 1103511# CHECK-NEXT: Total uOps: 400512 513# CHECK: Dispatch Width: 10514# CHECK-NEXT: uOps Per Cycle: 0.36515# CHECK-NEXT: IPC: 0.36516# CHECK-NEXT: Block RThroughput: 0.8517 518# CHECK: Timeline view:519# CHECK-NEXT: 0123456789520# CHECK-NEXT: Index 0123456789 01234521 522# CHECK: [0,0] DeeeeER . . . . mul v0.4s, v0.4s, v0.4s523# CHECK-NEXT: [0,1] D====eeeER. . . . smmla v0.4s, v1.16b, v2.16b524# CHECK-NEXT: [0,2] D=====eeeER . . . smmla v0.4s, v1.16b, v2.16b525# CHECK-NEXT: [0,3] D========eeeER . . . smmla v0.4s, v0.16b, v1.16b526# CHECK-NEXT: [1,0] D===========eeeeER . . mul v0.4s, v0.4s, v0.4s527# CHECK-NEXT: [1,1] D===============eeeER . smmla v0.4s, v1.16b, v2.16b528# CHECK-NEXT: [1,2] D================eeeER . smmla v0.4s, v1.16b, v2.16b529# CHECK-NEXT: [1,3] D===================eeeER smmla v0.4s, v0.16b, v1.16b530 531# CHECK: Average Wait times (based on the timeline view):532# CHECK-NEXT: [0]: Executions533# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue534# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready535# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage536 537# CHECK: [0] [1] [2] [3]538# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s539# CHECK-NEXT: 1. 2 10.5 0.0 0.0 smmla v0.4s, v1.16b, v2.16b540# CHECK-NEXT: 2. 2 11.5 0.0 0.0 smmla v0.4s, v1.16b, v2.16b541# CHECK-NEXT: 3. 2 14.5 0.0 0.0 smmla v0.4s, v0.16b, v1.16b542# CHECK-NEXT: 2 10.8 0.1 0.0 <total>543 544# CHECK: [6] Code Region - mla545 546# CHECK: Iterations: 100547# CHECK-NEXT: Instructions: 400548# CHECK-NEXT: Total Cycles: 1303549# CHECK-NEXT: Total uOps: 400550 551# CHECK: Dispatch Width: 10552# CHECK-NEXT: uOps Per Cycle: 0.31553# CHECK-NEXT: IPC: 0.31554# CHECK-NEXT: Block RThroughput: 2.0555 556# CHECK: Timeline view:557# CHECK-NEXT: 0123456789558# CHECK-NEXT: Index 0123456789 012345678559 560# CHECK: [0,0] DeeeeER . . . . . mul v0.4s, v0.4s, v0.4s561# CHECK-NEXT: [0,1] D====eeeeER . . . . mla v0.4s, v1.4s, v2.4s562# CHECK-NEXT: [0,2] D=====eeeeER . . . . mla v0.4s, v1.4s, v2.4s563# CHECK-NEXT: [0,3] D=========eeeeER . . . mla v0.4s, v0.4s, v1.4s564# CHECK-NEXT: [1,0] D=============eeeeER. . . mul v0.4s, v0.4s, v0.4s565# CHECK-NEXT: [1,1] D=================eeeeER . . mla v0.4s, v1.4s, v2.4s566# CHECK-NEXT: [1,2] D==================eeeeER. . mla v0.4s, v1.4s, v2.4s567# CHECK-NEXT: [1,3] D======================eeeeER mla v0.4s, v0.4s, v1.4s568 569# CHECK: Average Wait times (based on the timeline view):570# CHECK-NEXT: [0]: Executions571# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue572# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready573# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage574 575# CHECK: [0] [1] [2] [3]576# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s577# CHECK-NEXT: 1. 2 11.5 0.0 0.0 mla v0.4s, v1.4s, v2.4s578# CHECK-NEXT: 2. 2 12.5 0.0 0.0 mla v0.4s, v1.4s, v2.4s579# CHECK-NEXT: 3. 2 16.5 0.0 0.0 mla v0.4s, v0.4s, v1.4s580# CHECK-NEXT: 2 12.0 0.1 0.0 <total>581 582# CHECK: [7] Code Region - sqrdmlah583 584# CHECK: Iterations: 100585# CHECK-NEXT: Instructions: 400586# CHECK-NEXT: Total Cycles: 1403587# CHECK-NEXT: Total uOps: 400588 589# CHECK: Dispatch Width: 10590# CHECK-NEXT: uOps Per Cycle: 0.29591# CHECK-NEXT: IPC: 0.29592# CHECK-NEXT: Block RThroughput: 3.5593 594# CHECK: Timeline view:595# CHECK-NEXT: 0123456789 0596# CHECK-NEXT: Index 0123456789 0123456789597 598# CHECK: [0,0] DeeeeER . . . . . mul v0.4s, v0.4s, v0.4s599# CHECK-NEXT: [0,1] D====eeeeER . . . . sqrdmlah v0.4s, v1.4s, v2.4s600# CHECK-NEXT: [0,2] D======eeeeER . . . . sqrdmlah v0.4s, v1.4s, v2.4s601# CHECK-NEXT: [0,3] D==========eeeeER . . . sqrdmlah v0.4s, v0.4s, v1.4s602# CHECK-NEXT: [1,0] D==============eeeeER . . mul v0.4s, v0.4s, v0.4s603# CHECK-NEXT: [1,1] D==================eeeeER. . sqrdmlah v0.4s, v1.4s, v2.4s604# CHECK-NEXT: [1,2] D====================eeeeER . sqrdmlah v0.4s, v1.4s, v2.4s605# CHECK-NEXT: [1,3] D========================eeeeER sqrdmlah v0.4s, v0.4s, v1.4s606 607# CHECK: Average Wait times (based on the timeline view):608# CHECK-NEXT: [0]: Executions609# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue610# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready611# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage612 613# CHECK: [0] [1] [2] [3]614# CHECK-NEXT: 0. 2 8.0 0.5 0.0 mul v0.4s, v0.4s, v0.4s615# CHECK-NEXT: 1. 2 12.0 0.0 0.0 sqrdmlah v0.4s, v1.4s, v2.4s616# CHECK-NEXT: 2. 2 14.0 0.0 0.0 sqrdmlah v0.4s, v1.4s, v2.4s617# CHECK-NEXT: 3. 2 18.0 0.0 0.0 sqrdmlah v0.4s, v0.4s, v1.4s618# CHECK-NEXT: 2 13.0 0.1 0.0 <total>619 620# CHECK: [8] Code Region - smlal2621 622# CHECK: Iterations: 100623# CHECK-NEXT: Instructions: 400624# CHECK-NEXT: Total Cycles: 1303625# CHECK-NEXT: Total uOps: 400626 627# CHECK: Dispatch Width: 10628# CHECK-NEXT: uOps Per Cycle: 0.31629# CHECK-NEXT: IPC: 0.31630# CHECK-NEXT: Block RThroughput: 2.0631 632# CHECK: Timeline view:633# CHECK-NEXT: 0123456789634# CHECK-NEXT: Index 0123456789 012345678635 636# CHECK: [0,0] DeeeeER . . . . . mul v0.4s, v0.4s, v0.4s637# CHECK-NEXT: [0,1] D====eeeeER . . . . smlal2 v0.4s, v1.8h, v2.8h638# CHECK-NEXT: [0,2] D=====eeeeER . . . . smlal2 v0.4s, v1.8h, v2.8h639# CHECK-NEXT: [0,3] D=========eeeeER . . . smlal2 v0.4s, v0.8h, v1.8h640# CHECK-NEXT: [1,0] D=============eeeeER. . . mul v0.4s, v0.4s, v0.4s641# CHECK-NEXT: [1,1] D=================eeeeER . . smlal2 v0.4s, v1.8h, v2.8h642# CHECK-NEXT: [1,2] D==================eeeeER. . smlal2 v0.4s, v1.8h, v2.8h643# CHECK-NEXT: [1,3] D======================eeeeER smlal2 v0.4s, v0.8h, v1.8h644 645# CHECK: Average Wait times (based on the timeline view):646# CHECK-NEXT: [0]: Executions647# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue648# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready649# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage650 651# CHECK: [0] [1] [2] [3]652# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s653# CHECK-NEXT: 1. 2 11.5 0.0 0.0 smlal2 v0.4s, v1.8h, v2.8h654# CHECK-NEXT: 2. 2 12.5 0.0 0.0 smlal2 v0.4s, v1.8h, v2.8h655# CHECK-NEXT: 3. 2 16.5 0.0 0.0 smlal2 v0.4s, v0.8h, v1.8h656# CHECK-NEXT: 2 12.0 0.1 0.0 <total>657 658# CHECK: [9] Code Region - sadalp659 660# CHECK: Iterations: 100661# CHECK-NEXT: Instructions: 400662# CHECK-NEXT: Total Cycles: 1303663# CHECK-NEXT: Total uOps: 400664 665# CHECK: Dispatch Width: 10666# CHECK-NEXT: uOps Per Cycle: 0.31667# CHECK-NEXT: IPC: 0.31668# CHECK-NEXT: Block RThroughput: 0.8669 670# CHECK: Timeline view:671# CHECK-NEXT: 0123456789672# CHECK-NEXT: Index 0123456789 012345678673 674# CHECK: [0,0] DeeeeER . . . . . mul v0.4s, v0.4s, v0.4s675# CHECK-NEXT: [0,1] D====eeeeER . . . . sadalp v0.2d, v1.4s676# CHECK-NEXT: [0,2] D=====eeeeER . . . . sadalp v0.2d, v1.4s677# CHECK-NEXT: [0,3] D=========eeeeER . . . sadalp v0.2d, v0.4s678# CHECK-NEXT: [1,0] D=============eeeeER. . . mul v0.4s, v0.4s, v0.4s679# CHECK-NEXT: [1,1] D=================eeeeER . . sadalp v0.2d, v1.4s680# CHECK-NEXT: [1,2] D==================eeeeER. . sadalp v0.2d, v1.4s681# CHECK-NEXT: [1,3] D======================eeeeER sadalp v0.2d, v0.4s682 683# CHECK: Average Wait times (based on the timeline view):684# CHECK-NEXT: [0]: Executions685# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue686# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready687# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage688 689# CHECK: [0] [1] [2] [3]690# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s691# CHECK-NEXT: 1. 2 11.5 0.0 0.0 sadalp v0.2d, v1.4s692# CHECK-NEXT: 2. 2 12.5 0.0 0.0 sadalp v0.2d, v1.4s693# CHECK-NEXT: 3. 2 16.5 0.0 0.0 sadalp v0.2d, v0.4s694# CHECK-NEXT: 2 12.0 0.1 0.0 <total>695 696# CHECK: [10] Code Region - ssra697 698# CHECK: Iterations: 100699# CHECK-NEXT: Instructions: 400700# CHECK-NEXT: Total Cycles: 1303701# CHECK-NEXT: Total uOps: 400702 703# CHECK: Dispatch Width: 10704# CHECK-NEXT: uOps Per Cycle: 0.31705# CHECK-NEXT: IPC: 0.31706# CHECK-NEXT: Block RThroughput: 0.8707 708# CHECK: Timeline view:709# CHECK-NEXT: 0123456789710# CHECK-NEXT: Index 0123456789 012345678711 712# CHECK: [0,0] DeeeeER . . . . . mul v0.4s, v0.4s, v0.4s713# CHECK-NEXT: [0,1] D====eeeeER . . . . ssra v0.2d, v1.2d, #1714# CHECK-NEXT: [0,2] D=====eeeeER . . . . ssra v0.2d, v1.2d, #1715# CHECK-NEXT: [0,3] D=========eeeeER . . . ssra v0.2d, v0.2d, #1716# CHECK-NEXT: [1,0] D=============eeeeER. . . mul v0.4s, v0.4s, v0.4s717# CHECK-NEXT: [1,1] D=================eeeeER . . ssra v0.2d, v1.2d, #1718# CHECK-NEXT: [1,2] D==================eeeeER. . ssra v0.2d, v1.2d, #1719# CHECK-NEXT: [1,3] D======================eeeeER ssra v0.2d, v0.2d, #1720 721# CHECK: Average Wait times (based on the timeline view):722# CHECK-NEXT: [0]: Executions723# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue724# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready725# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage726 727# CHECK: [0] [1] [2] [3]728# CHECK-NEXT: 0. 2 7.5 0.5 0.0 mul v0.4s, v0.4s, v0.4s729# CHECK-NEXT: 1. 2 11.5 0.0 0.0 ssra v0.2d, v1.2d, #1730# CHECK-NEXT: 2. 2 12.5 0.0 0.0 ssra v0.2d, v1.2d, #1731# CHECK-NEXT: 3. 2 16.5 0.0 0.0 ssra v0.2d, v0.2d, #1732# CHECK-NEXT: 2 12.0 0.1 0.0 <total>733 734# CHECK: [11] Code Region - fcmla735 736# CHECK: Iterations: 100737# CHECK-NEXT: Instructions: 400738# CHECK-NEXT: Total Cycles: 1303739# CHECK-NEXT: Total uOps: 400740 741# CHECK: Dispatch Width: 10742# CHECK-NEXT: uOps Per Cycle: 0.31743# CHECK-NEXT: IPC: 0.31744# CHECK-NEXT: Block RThroughput: 1.0745 746# CHECK: Timeline view:747# CHECK-NEXT: 0123456789748# CHECK-NEXT: Index 0123456789 012345678749 750# CHECK: [0,0] DeeeER . . . . . fmul v0.4s, v0.4s, v0.4s751# CHECK-NEXT: [0,1] D===eeeeER. . . . . fcmla v0.2d, v1.2d, v2.2d, #90752# CHECK-NEXT: [0,2] D=====eeeeER . . . . fcmla v0.2d, v1.2d, v2.2d, #90753# CHECK-NEXT: [0,3] D=========eeeeER . . . fcmla v0.2d, v0.2d, v1.2d, #90754# CHECK-NEXT: [1,0] D=============eeeER . . . fmul v0.4s, v0.4s, v0.4s755# CHECK-NEXT: [1,1] D================eeeeER . . fcmla v0.2d, v1.2d, v2.2d, #90756# CHECK-NEXT: [1,2] D==================eeeeER. . fcmla v0.2d, v1.2d, v2.2d, #90757# CHECK-NEXT: [1,3] D======================eeeeER fcmla v0.2d, v0.2d, v1.2d, #90758 759# CHECK: Average Wait times (based on the timeline view):760# CHECK-NEXT: [0]: Executions761# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue762# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready763# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage764 765# CHECK: [0] [1] [2] [3]766# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul v0.4s, v0.4s, v0.4s767# CHECK-NEXT: 1. 2 10.5 0.0 0.0 fcmla v0.2d, v1.2d, v2.2d, #90768# CHECK-NEXT: 2. 2 12.5 0.0 0.0 fcmla v0.2d, v1.2d, v2.2d, #90769# CHECK-NEXT: 3. 2 16.5 0.0 0.0 fcmla v0.2d, v0.2d, v1.2d, #90770# CHECK-NEXT: 2 11.8 0.1 0.0 <total>771 772# CHECK: [12] Code Region - fmla773 774# CHECK: Iterations: 100775# CHECK-NEXT: Instructions: 600776# CHECK-NEXT: Total Cycles: 1703777# CHECK-NEXT: Total uOps: 600778 779# CHECK: Dispatch Width: 10780# CHECK-NEXT: uOps Per Cycle: 0.35781# CHECK-NEXT: IPC: 0.35782# CHECK-NEXT: Block RThroughput: 1.5783 784# CHECK: Timeline view:785# CHECK-NEXT: 0123456789 0123456786# CHECK-NEXT: Index 0123456789 0123456789787 788# CHECK: [0,0] DeeeER . . . . . .. fmul v0.2d, v0.2d, v0.2d789# CHECK-NEXT: [0,1] D=eeeeER . . . . . .. fmla v0.2d, v1.2d, v2.2d790# CHECK-NEXT: [0,2] D=====eeER. . . . . .. fadd v0.2d, v0.2d, v0.2d791# CHECK-NEXT: [0,3] D=======eeeeER . . . . .. fmla v0.2d, v1.2d, v2.2d792# CHECK-NEXT: [0,4] D=========eeeeER . . . .. fmla v0.2d, v1.2d, v2.2d793# CHECK-NEXT: [0,5] D=============eeeeER. . . .. fmla v0.2d, v0.2d, v1.2d794# CHECK-NEXT: [1,0] D=================eeeER . . .. fmul v0.2d, v0.2d, v0.2d795# CHECK-NEXT: [1,1] D==================eeeeER. . .. fmla v0.2d, v1.2d, v2.2d796# CHECK-NEXT: [1,2] D======================eeER . .. fadd v0.2d, v0.2d, v0.2d797# CHECK-NEXT: [1,3] D========================eeeeER .. fmla v0.2d, v1.2d, v2.2d798# CHECK-NEXT: [1,4] .D=========================eeeeER .. fmla v0.2d, v1.2d, v2.2d799# CHECK-NEXT: [1,5] .D=============================eeeeER fmla v0.2d, v0.2d, v1.2d800 801# CHECK: Average Wait times (based on the timeline view):802# CHECK-NEXT: [0]: Executions803# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue804# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready805# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage806 807# CHECK: [0] [1] [2] [3]808# CHECK-NEXT: 0. 2 9.5 0.5 0.0 fmul v0.2d, v0.2d, v0.2d809# CHECK-NEXT: 1. 2 10.5 0.0 0.0 fmla v0.2d, v1.2d, v2.2d810# CHECK-NEXT: 2. 2 14.5 0.0 0.0 fadd v0.2d, v0.2d, v0.2d811# CHECK-NEXT: 3. 2 16.5 0.0 0.0 fmla v0.2d, v1.2d, v2.2d812# CHECK-NEXT: 4. 2 18.0 0.0 0.0 fmla v0.2d, v1.2d, v2.2d813# CHECK-NEXT: 5. 2 22.0 0.0 0.0 fmla v0.2d, v0.2d, v1.2d814# CHECK-NEXT: 2 15.2 0.1 0.0 <total>815 816# CHECK: [13] Code Region - fmlal817 818# CHECK: Iterations: 100819# CHECK-NEXT: Instructions: 600820# CHECK-NEXT: Total Cycles: 1903821# CHECK-NEXT: Total uOps: 600822 823# CHECK: Dispatch Width: 10824# CHECK-NEXT: uOps Per Cycle: 0.32825# CHECK-NEXT: IPC: 0.32826# CHECK-NEXT: Block RThroughput: 1.5827 828# CHECK: Timeline view:829# CHECK-NEXT: 0123456789 0123456789830# CHECK-NEXT: Index 0123456789 0123456789 0831 832# CHECK: [0,0] DeeeER . . . . . . . fmul v0.2d, v0.2d, v0.2d833# CHECK-NEXT: [0,1] D===eeeeER. . . . . . . fmlal v0.4s, v1.4h, v2.4h834# CHECK-NEXT: [0,2] D=======eeER . . . . . . fadd v0.2d, v0.2d, v0.2d835# CHECK-NEXT: [0,3] D=========eeeeER . . . . . fmlal v0.4s, v1.4h, v2.4h836# CHECK-NEXT: [0,4] D===========eeeeER . . . . . fmlal v0.4s, v1.4h, v2.4h837# CHECK-NEXT: [0,5] D===============eeeeER . . . . fmlal v0.4s, v0.4h, v1.4h838# CHECK-NEXT: [1,0] D===================eeeER. . . . fmul v0.2d, v0.2d, v0.2d839# CHECK-NEXT: [1,1] D======================eeeeER . . . fmlal v0.4s, v1.4h, v2.4h840# CHECK-NEXT: [1,2] D==========================eeER . . fadd v0.2d, v0.2d, v0.2d841# CHECK-NEXT: [1,3] D============================eeeeER. . fmlal v0.4s, v1.4h, v2.4h842# CHECK-NEXT: [1,4] .D=============================eeeeER . fmlal v0.4s, v1.4h, v2.4h843# CHECK-NEXT: [1,5] .D=================================eeeeER fmlal v0.4s, v0.4h, v1.4h844 845# CHECK: Average Wait times (based on the timeline view):846# CHECK-NEXT: [0]: Executions847# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue848# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready849# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage850 851# CHECK: [0] [1] [2] [3]852# CHECK-NEXT: 0. 2 10.5 0.5 0.0 fmul v0.2d, v0.2d, v0.2d853# CHECK-NEXT: 1. 2 13.5 0.0 0.0 fmlal v0.4s, v1.4h, v2.4h854# CHECK-NEXT: 2. 2 17.5 0.0 0.0 fadd v0.2d, v0.2d, v0.2d855# CHECK-NEXT: 3. 2 19.5 0.0 0.0 fmlal v0.4s, v1.4h, v2.4h856# CHECK-NEXT: 4. 2 21.0 0.0 0.0 fmlal v0.4s, v1.4h, v2.4h857# CHECK-NEXT: 5. 2 25.0 0.0 0.0 fmlal v0.4s, v0.4h, v1.4h858# CHECK-NEXT: 2 17.8 0.1 0.0 <total>859 860# CHECK: [14] Code Region - bfdot861 862# CHECK: Iterations: 100863# CHECK-NEXT: Instructions: 400864# CHECK-NEXT: Total Cycles: 1603865# CHECK-NEXT: Total uOps: 400866 867# CHECK: Dispatch Width: 10868# CHECK-NEXT: uOps Per Cycle: 0.25869# CHECK-NEXT: IPC: 0.25870# CHECK-NEXT: Block RThroughput: 1.0871 872# CHECK: Timeline view:873# CHECK-NEXT: 0123456789 01234874# CHECK-NEXT: Index 0123456789 0123456789875 876# CHECK: [0,0] DeeeER . . . . . . fmul v0.2d, v0.2d, v0.2d877# CHECK-NEXT: [0,1] D===eeeeeER . . . . . bfdot v0.4s, v1.8h, v2.8h878# CHECK-NEXT: [0,2] D======eeeeeER . . . . . bfdot v0.4s, v1.8h, v2.8h879# CHECK-NEXT: [0,3] D===========eeeeeER . . . . bfdot v0.4s, v0.8h, v1.8h880# CHECK-NEXT: [1,0] D================eeeER . . . fmul v0.2d, v0.2d, v0.2d881# CHECK-NEXT: [1,1] D===================eeeeeER . . bfdot v0.4s, v1.8h, v2.8h882# CHECK-NEXT: [1,2] D======================eeeeeER. . bfdot v0.4s, v1.8h, v2.8h883# CHECK-NEXT: [1,3] D===========================eeeeeER bfdot v0.4s, v0.8h, v1.8h884 885# CHECK: Average Wait times (based on the timeline view):886# CHECK-NEXT: [0]: Executions887# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue888# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready889# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage890 891# CHECK: [0] [1] [2] [3]892# CHECK-NEXT: 0. 2 9.0 0.5 0.0 fmul v0.2d, v0.2d, v0.2d893# CHECK-NEXT: 1. 2 12.0 0.0 0.0 bfdot v0.4s, v1.8h, v2.8h894# CHECK-NEXT: 2. 2 15.0 0.0 0.0 bfdot v0.4s, v1.8h, v2.8h895# CHECK-NEXT: 3. 2 20.0 0.0 0.0 bfdot v0.4s, v0.8h, v1.8h896# CHECK-NEXT: 2 14.0 0.1 0.0 <total>897 898# CHECK: [15] Code Region - bfmmla899 900# CHECK: Iterations: 100901# CHECK-NEXT: Instructions: 400902# CHECK-NEXT: Total Cycles: 1903903# CHECK-NEXT: Total uOps: 400904 905# CHECK: Dispatch Width: 10906# CHECK-NEXT: uOps Per Cycle: 0.21907# CHECK-NEXT: IPC: 0.21908# CHECK-NEXT: Block RThroughput: 1.0909 910# CHECK: Timeline view:911# CHECK-NEXT: 0123456789 0123456789912# CHECK-NEXT: Index 0123456789 0123456789 0913 914# CHECK: [0,0] DeeeER . . . . . . . fmul v0.2d, v0.2d, v0.2d915# CHECK-NEXT: [0,1] D===eeeeeeER . . . . . . bfmmla v0.4s, v1.8h, v2.8h916# CHECK-NEXT: [0,2] D=======eeeeeeER . . . . . bfmmla v0.4s, v1.8h, v2.8h917# CHECK-NEXT: [0,3] D=============eeeeeeER . . . . bfmmla v0.4s, v0.8h, v1.8h918# CHECK-NEXT: [1,0] D===================eeeER. . . . fmul v0.2d, v0.2d, v0.2d919# CHECK-NEXT: [1,1] D======================eeeeeeER . . bfmmla v0.4s, v1.8h, v2.8h920# CHECK-NEXT: [1,2] D==========================eeeeeeER. . bfmmla v0.4s, v1.8h, v2.8h921# CHECK-NEXT: [1,3] D================================eeeeeeER bfmmla v0.4s, v0.8h, v1.8h922 923# CHECK: Average Wait times (based on the timeline view):924# CHECK-NEXT: [0]: Executions925# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue926# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready927# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage928 929# CHECK: [0] [1] [2] [3]930# CHECK-NEXT: 0. 2 10.5 0.5 0.0 fmul v0.2d, v0.2d, v0.2d931# CHECK-NEXT: 1. 2 13.5 0.0 0.0 bfmmla v0.4s, v1.8h, v2.8h932# CHECK-NEXT: 2. 2 17.5 0.0 0.0 bfmmla v0.4s, v1.8h, v2.8h933# CHECK-NEXT: 3. 2 23.5 0.0 0.0 bfmmla v0.4s, v0.8h, v1.8h934# CHECK-NEXT: 2 16.3 0.1 0.0 <total>935 936# CHECK: [16] Code Region - bfmlalb937 938# CHECK: Iterations: 100939# CHECK-NEXT: Instructions: 400940# CHECK-NEXT: Total Cycles: 1503941# CHECK-NEXT: Total uOps: 400942 943# CHECK: Dispatch Width: 10944# CHECK-NEXT: uOps Per Cycle: 0.27945# CHECK-NEXT: IPC: 0.27946# CHECK-NEXT: Block RThroughput: 1.0947 948# CHECK: Timeline view:949# CHECK-NEXT: 0123456789 012950# CHECK-NEXT: Index 0123456789 0123456789951 952# CHECK: [0,0] DeeeER . . . . . . fmul v0.2d, v0.2d, v0.2d953# CHECK-NEXT: [0,1] D===eeeeeER . . . . . bfmlalb v0.4s, v1.8h, v2.8h954# CHECK-NEXT: [0,2] D=====eeeeeER . . . . . bfmlalb v0.4s, v1.8h, v2.8h955# CHECK-NEXT: [0,3] D==========eeeeeER . . . . bfmlalb v0.4s, v0.8h, v1.8h956# CHECK-NEXT: [1,0] D===============eeeER . . . fmul v0.2d, v0.2d, v0.2d957# CHECK-NEXT: [1,1] D==================eeeeeER . . bfmlalb v0.4s, v1.8h, v2.8h958# CHECK-NEXT: [1,2] D====================eeeeeER . . bfmlalb v0.4s, v1.8h, v2.8h959# CHECK-NEXT: [1,3] D=========================eeeeeER bfmlalb v0.4s, v0.8h, v1.8h960 961# CHECK: Average Wait times (based on the timeline view):962# CHECK-NEXT: [0]: Executions963# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue964# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready965# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage966 967# CHECK: [0] [1] [2] [3]968# CHECK-NEXT: 0. 2 8.5 0.5 0.0 fmul v0.2d, v0.2d, v0.2d969# CHECK-NEXT: 1. 2 11.5 0.0 0.0 bfmlalb v0.4s, v1.8h, v2.8h970# CHECK-NEXT: 2. 2 13.5 0.0 0.0 bfmlalb v0.4s, v1.8h, v2.8h971# CHECK-NEXT: 3. 2 18.5 0.0 0.0 bfmlalb v0.4s, v0.8h, v1.8h972# CHECK-NEXT: 2 13.0 0.1 0.0 <total>973 974# CHECK: [17] Code Region - crc32b975 976# CHECK: Iterations: 100977# CHECK-NEXT: Instructions: 400978# CHECK-NEXT: Total Cycles: 703979# CHECK-NEXT: Total uOps: 400980 981# CHECK: Dispatch Width: 10982# CHECK-NEXT: uOps Per Cycle: 0.57983# CHECK-NEXT: IPC: 0.57984# CHECK-NEXT: Block RThroughput: 3.0985 986# CHECK: Timeline view:987# CHECK-NEXT: 0123456988# CHECK-NEXT: Index 0123456789989 990# CHECK: [0,0] DeeER. . .. mul w0, w0, w0991# CHECK-NEXT: [0,1] D==eeER . .. crc32b w0, w0, w1992# CHECK-NEXT: [0,2] D===eeER . .. crc32b w0, w0, w1993# CHECK-NEXT: [0,3] D=====eeER. .. crc32b w0, w0, w0994# CHECK-NEXT: [1,0] D=======eeER .. mul w0, w0, w0995# CHECK-NEXT: [1,1] D=========eeER .. crc32b w0, w0, w1996# CHECK-NEXT: [1,2] D==========eeER.. crc32b w0, w0, w1997# CHECK-NEXT: [1,3] D============eeER crc32b w0, w0, w0998 999# CHECK: Average Wait times (based on the timeline view):1000# CHECK-NEXT: [0]: Executions1001# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1002# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1003# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1004 1005# CHECK: [0] [1] [2] [3]1006# CHECK-NEXT: 0. 2 4.5 0.5 0.0 mul w0, w0, w01007# CHECK-NEXT: 1. 2 6.5 0.0 0.0 crc32b w0, w0, w11008# CHECK-NEXT: 2. 2 7.5 0.0 0.0 crc32b w0, w0, w11009# CHECK-NEXT: 3. 2 9.5 0.0 0.0 crc32b w0, w0, w01010# CHECK-NEXT: 2 7.0 0.1 0.0 <total>1011 1012# CHECK: [18] Code Region - Z saba1013 1014# CHECK: Iterations: 1001015# CHECK-NEXT: Instructions: 4001016# CHECK-NEXT: Total Cycles: 14031017# CHECK-NEXT: Total uOps: 5001018 1019# CHECK: Dispatch Width: 101020# CHECK-NEXT: uOps Per Cycle: 0.361021# CHECK-NEXT: IPC: 0.291022# CHECK-NEXT: Block RThroughput: 1.01023 1024# CHECK: Timeline view:1025# CHECK-NEXT: 0123456789 01026# CHECK-NEXT: Index 0123456789 01234567891027 1028# CHECK: [0,0] DeeeeeER . . . . . mul z0.d, z0.d, z0.d1029# CHECK-NEXT: [0,1] D=====eeeeER . . . . saba z0.d, z1.d, z2.d1030# CHECK-NEXT: [0,2] D======eeeeER . . . . saba z0.d, z1.d, z2.d1031# CHECK-NEXT: [0,3] D==========eeeeER . . . saba z0.d, z0.d, z1.d1032# CHECK-NEXT: [1,0] D==============eeeeeER . . mul z0.d, z0.d, z0.d1033# CHECK-NEXT: [1,1] D===================eeeeER . saba z0.d, z1.d, z2.d1034# CHECK-NEXT: [1,2] D====================eeeeER . saba z0.d, z1.d, z2.d1035# CHECK-NEXT: [1,3] D========================eeeeER saba z0.d, z0.d, z1.d1036 1037# CHECK: Average Wait times (based on the timeline view):1038# CHECK-NEXT: [0]: Executions1039# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1040# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1041# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1042 1043# CHECK: [0] [1] [2] [3]1044# CHECK-NEXT: 0. 2 8.0 0.5 0.0 mul z0.d, z0.d, z0.d1045# CHECK-NEXT: 1. 2 13.0 0.0 0.0 saba z0.d, z1.d, z2.d1046# CHECK-NEXT: 2. 2 14.0 0.0 0.0 saba z0.d, z1.d, z2.d1047# CHECK-NEXT: 3. 2 18.0 0.0 0.0 saba z0.d, z0.d, z1.d1048# CHECK-NEXT: 2 13.3 0.1 0.0 <total>1049 1050# CHECK: [19] Code Region - Z sadalp1051 1052# CHECK: Iterations: 1001053# CHECK-NEXT: Instructions: 4001054# CHECK-NEXT: Total Cycles: 14031055# CHECK-NEXT: Total uOps: 5001056 1057# CHECK: Dispatch Width: 101058# CHECK-NEXT: uOps Per Cycle: 0.361059# CHECK-NEXT: IPC: 0.291060# CHECK-NEXT: Block RThroughput: 1.01061 1062# CHECK: Timeline view:1063# CHECK-NEXT: 0123456789 01064# CHECK-NEXT: Index 0123456789 01234567891065 1066# CHECK: [0,0] DeeeeeER . . . . . mul z0.d, z0.d, z0.d1067# CHECK-NEXT: [0,1] D=====eeeeER . . . . sadalp z0.d, p0/m, z1.s1068# CHECK-NEXT: [0,2] D======eeeeER . . . . sadalp z0.d, p0/m, z1.s1069# CHECK-NEXT: [0,3] D==========eeeeER . . . sadalp z0.d, p0/m, z0.s1070# CHECK-NEXT: [1,0] D==============eeeeeER . . mul z0.d, z0.d, z0.d1071# CHECK-NEXT: [1,1] D===================eeeeER . sadalp z0.d, p0/m, z1.s1072# CHECK-NEXT: [1,2] D====================eeeeER . sadalp z0.d, p0/m, z1.s1073# CHECK-NEXT: [1,3] D========================eeeeER sadalp z0.d, p0/m, z0.s1074 1075# CHECK: Average Wait times (based on the timeline view):1076# CHECK-NEXT: [0]: Executions1077# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1078# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1079# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1080 1081# CHECK: [0] [1] [2] [3]1082# CHECK-NEXT: 0. 2 8.0 0.5 0.0 mul z0.d, z0.d, z0.d1083# CHECK-NEXT: 1. 2 13.0 0.0 0.0 sadalp z0.d, p0/m, z1.s1084# CHECK-NEXT: 2. 2 14.0 0.0 0.0 sadalp z0.d, p0/m, z1.s1085# CHECK-NEXT: 3. 2 18.0 0.0 0.0 sadalp z0.d, p0/m, z0.s1086# CHECK-NEXT: 2 13.3 0.1 0.0 <total>1087 1088# CHECK: [20] Code Region - Z ssra1089 1090# CHECK: Iterations: 1001091# CHECK-NEXT: Instructions: 4001092# CHECK-NEXT: Total Cycles: 14031093# CHECK-NEXT: Total uOps: 5001094 1095# CHECK: Dispatch Width: 101096# CHECK-NEXT: uOps Per Cycle: 0.361097# CHECK-NEXT: IPC: 0.291098# CHECK-NEXT: Block RThroughput: 1.51099 1100# CHECK: Timeline view:1101# CHECK-NEXT: 0123456789 01102# CHECK-NEXT: Index 0123456789 01234567891103 1104# CHECK: [0,0] DeeeeeER . . . . . mul z0.d, z0.d, z0.d1105# CHECK-NEXT: [0,1] D=====eeeeER . . . . ssra z0.d, z1.d, #11106# CHECK-NEXT: [0,2] D======eeeeER . . . . ssra z0.d, z1.d, #11107# CHECK-NEXT: [0,3] D==========eeeeER . . . ssra z0.d, z0.d, #11108# CHECK-NEXT: [1,0] D==============eeeeeER . . mul z0.d, z0.d, z0.d1109# CHECK-NEXT: [1,1] D===================eeeeER . ssra z0.d, z1.d, #11110# CHECK-NEXT: [1,2] D====================eeeeER . ssra z0.d, z1.d, #11111# CHECK-NEXT: [1,3] D========================eeeeER ssra z0.d, z0.d, #11112 1113# CHECK: Average Wait times (based on the timeline view):1114# CHECK-NEXT: [0]: Executions1115# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1116# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1117# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1118 1119# CHECK: [0] [1] [2] [3]1120# CHECK-NEXT: 0. 2 8.0 0.5 0.0 mul z0.d, z0.d, z0.d1121# CHECK-NEXT: 1. 2 13.0 0.0 0.0 ssra z0.d, z1.d, #11122# CHECK-NEXT: 2. 2 14.0 0.0 0.0 ssra z0.d, z1.d, #11123# CHECK-NEXT: 3. 2 18.0 0.0 0.0 ssra z0.d, z0.d, #11124# CHECK-NEXT: 2 13.3 0.1 0.0 <total>1125 1126# CHECK: [21] Code Region - Z cdot.s1127 1128# CHECK: Iterations: 1001129# CHECK-NEXT: Instructions: 4001130# CHECK-NEXT: Total Cycles: 12031131# CHECK-NEXT: Total uOps: 5001132 1133# CHECK: Dispatch Width: 101134# CHECK-NEXT: uOps Per Cycle: 0.421135# CHECK-NEXT: IPC: 0.331136# CHECK-NEXT: Block RThroughput: 1.01137 1138# CHECK: Timeline view:1139# CHECK-NEXT: 01234567891140# CHECK-NEXT: Index 0123456789 01234561141 1142# CHECK: [0,0] DeeeeeER . . . .. mul z0.d, z0.d, z0.d1143# CHECK-NEXT: [0,1] D=====eeeER . . .. cdot z0.s, z1.b, z2.b, #901144# CHECK-NEXT: [0,2] D======eeeER . . .. cdot z0.s, z1.b, z2.b, #901145# CHECK-NEXT: [0,3] D=========eeeER. . .. cdot z0.s, z0.b, z1.b, #901146# CHECK-NEXT: [1,0] D============eeeeeER. .. mul z0.d, z0.d, z0.d1147# CHECK-NEXT: [1,1] D=================eeeER .. cdot z0.s, z1.b, z2.b, #901148# CHECK-NEXT: [1,2] D==================eeeER .. cdot z0.s, z1.b, z2.b, #901149# CHECK-NEXT: [1,3] D=====================eeeER cdot z0.s, z0.b, z1.b, #901150 1151# CHECK: Average Wait times (based on the timeline view):1152# CHECK-NEXT: [0]: Executions1153# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1154# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1155# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1156 1157# CHECK: [0] [1] [2] [3]1158# CHECK-NEXT: 0. 2 7.0 0.5 0.0 mul z0.d, z0.d, z0.d1159# CHECK-NEXT: 1. 2 12.0 0.0 0.0 cdot z0.s, z1.b, z2.b, #901160# CHECK-NEXT: 2. 2 13.0 0.0 0.0 cdot z0.s, z1.b, z2.b, #901161# CHECK-NEXT: 3. 2 16.0 0.0 0.0 cdot z0.s, z0.b, z1.b, #901162# CHECK-NEXT: 2 12.0 0.1 0.0 <total>1163 1164# CHECK: [22] Code Region - Z cdot.d1165 1166# CHECK: Iterations: 1001167# CHECK-NEXT: Instructions: 4001168# CHECK-NEXT: Total Cycles: 12031169# CHECK-NEXT: Total uOps: 5001170 1171# CHECK: Dispatch Width: 101172# CHECK-NEXT: uOps Per Cycle: 0.421173# CHECK-NEXT: IPC: 0.331174# CHECK-NEXT: Block RThroughput: 2.51175 1176# CHECK: Timeline view:1177# CHECK-NEXT: 01234567891178# CHECK-NEXT: Index 0123456789 01234561179 1180# CHECK: [0,0] DeeeeeER . . . .. mul z0.d, z0.d, z0.d1181# CHECK-NEXT: [0,1] D=====eeeER . . .. cdot z0.d, z1.h, z2.h, #901182# CHECK-NEXT: [0,2] D======eeeER . . .. cdot z0.d, z1.h, z2.h, #901183# CHECK-NEXT: [0,3] D=========eeeER. . .. cdot z0.d, z0.h, z1.h, #901184# CHECK-NEXT: [1,0] D============eeeeeER. .. mul z0.d, z0.d, z0.d1185# CHECK-NEXT: [1,1] D=================eeeER .. cdot z0.d, z1.h, z2.h, #901186# CHECK-NEXT: [1,2] D==================eeeER .. cdot z0.d, z1.h, z2.h, #901187# CHECK-NEXT: [1,3] D=====================eeeER cdot z0.d, z0.h, z1.h, #901188 1189# CHECK: Average Wait times (based on the timeline view):1190# CHECK-NEXT: [0]: Executions1191# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1192# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1193# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1194 1195# CHECK: [0] [1] [2] [3]1196# CHECK-NEXT: 0. 2 7.0 0.5 0.0 mul z0.d, z0.d, z0.d1197# CHECK-NEXT: 1. 2 12.0 0.0 0.0 cdot z0.d, z1.h, z2.h, #901198# CHECK-NEXT: 2. 2 13.0 0.0 0.0 cdot z0.d, z1.h, z2.h, #901199# CHECK-NEXT: 3. 2 16.0 0.0 0.0 cdot z0.d, z0.h, z1.h, #901200# CHECK-NEXT: 2 12.0 0.1 0.0 <total>1201 1202# CHECK: [23] Code Region - Z cmla.b1203 1204# CHECK: Iterations: 1001205# CHECK-NEXT: Instructions: 4001206# CHECK-NEXT: Total Cycles: 14031207# CHECK-NEXT: Total uOps: 5001208 1209# CHECK: Dispatch Width: 101210# CHECK-NEXT: uOps Per Cycle: 0.361211# CHECK-NEXT: IPC: 0.291212# CHECK-NEXT: Block RThroughput: 2.51213 1214# CHECK: Timeline view:1215# CHECK-NEXT: 0123456789 01216# CHECK-NEXT: Index 0123456789 01234567891217 1218# CHECK: [0,0] DeeeeeER . . . . . mul z0.d, z0.d, z0.d1219# CHECK-NEXT: [0,1] D=====eeeeER . . . . cmla z0.b, z1.b, z2.b, #901220# CHECK-NEXT: [0,2] D======eeeeER . . . . cmla z0.b, z1.b, z2.b, #901221# CHECK-NEXT: [0,3] D==========eeeeER . . . cmla z0.b, z0.b, z1.b, #901222# CHECK-NEXT: [1,0] D==============eeeeeER . . mul z0.d, z0.d, z0.d1223# CHECK-NEXT: [1,1] D===================eeeeER . cmla z0.b, z1.b, z2.b, #901224# CHECK-NEXT: [1,2] D====================eeeeER . cmla z0.b, z1.b, z2.b, #901225# CHECK-NEXT: [1,3] D========================eeeeER cmla z0.b, z0.b, z1.b, #901226 1227# CHECK: Average Wait times (based on the timeline view):1228# CHECK-NEXT: [0]: Executions1229# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1230# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1231# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1232 1233# CHECK: [0] [1] [2] [3]1234# CHECK-NEXT: 0. 2 8.0 0.5 0.0 mul z0.d, z0.d, z0.d1235# CHECK-NEXT: 1. 2 13.0 0.0 0.0 cmla z0.b, z1.b, z2.b, #901236# CHECK-NEXT: 2. 2 14.0 0.0 0.0 cmla z0.b, z1.b, z2.b, #901237# CHECK-NEXT: 3. 2 18.0 0.0 0.0 cmla z0.b, z0.b, z1.b, #901238# CHECK-NEXT: 2 13.3 0.1 0.0 <total>1239 1240# CHECK: [24] Code Region - Z cmla.d1241 1242# CHECK: Iterations: 1001243# CHECK-NEXT: Instructions: 4001244# CHECK-NEXT: Total Cycles: 18031245# CHECK-NEXT: Total uOps: 5001246 1247# CHECK: Dispatch Width: 101248# CHECK-NEXT: uOps Per Cycle: 0.281249# CHECK-NEXT: IPC: 0.221250# CHECK-NEXT: Block RThroughput: 4.01251 1252# CHECK: Timeline view:1253# CHECK-NEXT: 0123456789 0123456781254# CHECK-NEXT: Index 0123456789 01234567891255 1256# CHECK: [0,0] DeeeeeER . . . . . . . mul z0.d, z0.d, z0.d1257# CHECK-NEXT: [0,1] D=====eeeeeER . . . . . . cmla z0.d, z1.d, z2.d, #901258# CHECK-NEXT: [0,2] D========eeeeeER . . . . . cmla z0.d, z1.d, z2.d, #901259# CHECK-NEXT: [0,3] D=============eeeeeER . . . . cmla z0.d, z0.d, z1.d, #901260# CHECK-NEXT: [1,0] D==================eeeeeER . . . mul z0.d, z0.d, z0.d1261# CHECK-NEXT: [1,1] D=======================eeeeeER . . cmla z0.d, z1.d, z2.d, #901262# CHECK-NEXT: [1,2] D==========================eeeeeER . . cmla z0.d, z1.d, z2.d, #901263# CHECK-NEXT: [1,3] D===============================eeeeeER cmla z0.d, z0.d, z1.d, #901264 1265# CHECK: Average Wait times (based on the timeline view):1266# CHECK-NEXT: [0]: Executions1267# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1268# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1269# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1270 1271# CHECK: [0] [1] [2] [3]1272# CHECK-NEXT: 0. 2 10.0 0.5 0.0 mul z0.d, z0.d, z0.d1273# CHECK-NEXT: 1. 2 15.0 0.0 0.0 cmla z0.d, z1.d, z2.d, #901274# CHECK-NEXT: 2. 2 18.0 0.0 0.0 cmla z0.d, z1.d, z2.d, #901275# CHECK-NEXT: 3. 2 23.0 0.0 0.0 cmla z0.d, z0.d, z1.d, #901276# CHECK-NEXT: 2 16.5 0.1 0.0 <total>1277 1278# CHECK: [25] Code Region - Z sdot.s1279 1280# CHECK: Iterations: 1001281# CHECK-NEXT: Instructions: 4001282# CHECK-NEXT: Total Cycles: 12031283# CHECK-NEXT: Total uOps: 5001284 1285# CHECK: Dispatch Width: 101286# CHECK-NEXT: uOps Per Cycle: 0.421287# CHECK-NEXT: IPC: 0.331288# CHECK-NEXT: Block RThroughput: 1.01289 1290# CHECK: Timeline view:1291# CHECK-NEXT: 01234567891292# CHECK-NEXT: Index 0123456789 01234561293 1294# CHECK: [0,0] DeeeeeER . . . .. mul z0.d, z0.d, z0.d1295# CHECK-NEXT: [0,1] D=====eeeER . . .. sdot z0.s, z1.b, z2.b1296# CHECK-NEXT: [0,2] D======eeeER . . .. sdot z0.s, z1.b, z2.b1297# CHECK-NEXT: [0,3] D=========eeeER. . .. sdot z0.s, z0.b, z1.b1298# CHECK-NEXT: [1,0] D============eeeeeER. .. mul z0.d, z0.d, z0.d1299# CHECK-NEXT: [1,1] D=================eeeER .. sdot z0.s, z1.b, z2.b1300# CHECK-NEXT: [1,2] D==================eeeER .. sdot z0.s, z1.b, z2.b1301# CHECK-NEXT: [1,3] D=====================eeeER sdot z0.s, z0.b, z1.b1302 1303# CHECK: Average Wait times (based on the timeline view):1304# CHECK-NEXT: [0]: Executions1305# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1306# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1307# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1308 1309# CHECK: [0] [1] [2] [3]1310# CHECK-NEXT: 0. 2 7.0 0.5 0.0 mul z0.d, z0.d, z0.d1311# CHECK-NEXT: 1. 2 12.0 0.0 0.0 sdot z0.s, z1.b, z2.b1312# CHECK-NEXT: 2. 2 13.0 0.0 0.0 sdot z0.s, z1.b, z2.b1313# CHECK-NEXT: 3. 2 16.0 0.0 0.0 sdot z0.s, z0.b, z1.b1314# CHECK-NEXT: 2 12.0 0.1 0.0 <total>1315 1316# CHECK: [26] Code Region - Z sudot1317 1318# CHECK: Iterations: 1001319# CHECK-NEXT: Instructions: 4001320# CHECK-NEXT: Total Cycles: 12031321# CHECK-NEXT: Total uOps: 5001322 1323# CHECK: Dispatch Width: 101324# CHECK-NEXT: uOps Per Cycle: 0.421325# CHECK-NEXT: IPC: 0.331326# CHECK-NEXT: Block RThroughput: 1.01327 1328# CHECK: Timeline view:1329# CHECK-NEXT: 01234567891330# CHECK-NEXT: Index 0123456789 01234561331 1332# CHECK: [0,0] DeeeeeER . . . .. mul z0.d, z0.d, z0.d1333# CHECK-NEXT: [0,1] D=====eeeER . . .. sdot z0.s, z1.b, z2.b[1]1334# CHECK-NEXT: [0,2] D======eeeER . . .. sdot z0.s, z1.b, z2.b[1]1335# CHECK-NEXT: [0,3] D=========eeeER. . .. sdot z0.s, z0.b, z1.b[1]1336# CHECK-NEXT: [1,0] D============eeeeeER. .. mul z0.d, z0.d, z0.d1337# CHECK-NEXT: [1,1] D=================eeeER .. sdot z0.s, z1.b, z2.b[1]1338# CHECK-NEXT: [1,2] D==================eeeER .. sdot z0.s, z1.b, z2.b[1]1339# CHECK-NEXT: [1,3] D=====================eeeER sdot z0.s, z0.b, z1.b[1]1340 1341# CHECK: Average Wait times (based on the timeline view):1342# CHECK-NEXT: [0]: Executions1343# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1344# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1345# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1346 1347# CHECK: [0] [1] [2] [3]1348# CHECK-NEXT: 0. 2 7.0 0.5 0.0 mul z0.d, z0.d, z0.d1349# CHECK-NEXT: 1. 2 12.0 0.0 0.0 sdot z0.s, z1.b, z2.b[1]1350# CHECK-NEXT: 2. 2 13.0 0.0 0.0 sdot z0.s, z1.b, z2.b[1]1351# CHECK-NEXT: 3. 2 16.0 0.0 0.0 sdot z0.s, z0.b, z1.b[1]1352# CHECK-NEXT: 2 12.0 0.1 0.0 <total>1353 1354# CHECK: [27] Code Region - Z sdot.d1355 1356# CHECK: Iterations: 1001357# CHECK-NEXT: Instructions: 4001358# CHECK-NEXT: Total Cycles: 12031359# CHECK-NEXT: Total uOps: 5001360 1361# CHECK: Dispatch Width: 101362# CHECK-NEXT: uOps Per Cycle: 0.421363# CHECK-NEXT: IPC: 0.331364# CHECK-NEXT: Block RThroughput: 2.51365 1366# CHECK: Timeline view:1367# CHECK-NEXT: 01234567891368# CHECK-NEXT: Index 0123456789 01234561369 1370# CHECK: [0,0] DeeeeeER . . . .. mul z0.d, z0.d, z0.d1371# CHECK-NEXT: [0,1] D=====eeeER . . .. sdot z0.d, z1.h, z2.h1372# CHECK-NEXT: [0,2] D======eeeER . . .. sdot z0.d, z1.h, z2.h1373# CHECK-NEXT: [0,3] D=========eeeER. . .. sdot z0.d, z0.h, z1.h1374# CHECK-NEXT: [1,0] D============eeeeeER. .. mul z0.d, z0.d, z0.d1375# CHECK-NEXT: [1,1] D=================eeeER .. sdot z0.d, z1.h, z2.h1376# CHECK-NEXT: [1,2] D==================eeeER .. sdot z0.d, z1.h, z2.h1377# CHECK-NEXT: [1,3] D=====================eeeER sdot z0.d, z0.h, z1.h1378 1379# CHECK: Average Wait times (based on the timeline view):1380# CHECK-NEXT: [0]: Executions1381# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1382# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1383# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1384 1385# CHECK: [0] [1] [2] [3]1386# CHECK-NEXT: 0. 2 7.0 0.5 0.0 mul z0.d, z0.d, z0.d1387# CHECK-NEXT: 1. 2 12.0 0.0 0.0 sdot z0.d, z1.h, z2.h1388# CHECK-NEXT: 2. 2 13.0 0.0 0.0 sdot z0.d, z1.h, z2.h1389# CHECK-NEXT: 3. 2 16.0 0.0 0.0 sdot z0.d, z0.h, z1.h1390# CHECK-NEXT: 2 12.0 0.1 0.0 <total>1391 1392# CHECK: [28] Code Region - Z smmla1393 1394# CHECK: Iterations: 1001395# CHECK-NEXT: Instructions: 4001396# CHECK-NEXT: Total Cycles: 11031397# CHECK-NEXT: Total uOps: 4001398 1399# CHECK: Dispatch Width: 101400# CHECK-NEXT: uOps Per Cycle: 0.361401# CHECK-NEXT: IPC: 0.361402# CHECK-NEXT: Block RThroughput: 0.81403 1404# CHECK: Timeline view:1405# CHECK-NEXT: 01234567891406# CHECK-NEXT: Index 0123456789 012341407 1408# CHECK: [0,0] DeeeeER . . . . mul z0.s, z0.s, z0.s1409# CHECK-NEXT: [0,1] D====eeeER. . . . smmla z0.s, z1.b, z2.b1410# CHECK-NEXT: [0,2] D=====eeeER . . . smmla z0.s, z1.b, z2.b1411# CHECK-NEXT: [0,3] D========eeeER . . . smmla z0.s, z0.b, z1.b1412# CHECK-NEXT: [1,0] D===========eeeeER . . mul z0.s, z0.s, z0.s1413# CHECK-NEXT: [1,1] D===============eeeER . smmla z0.s, z1.b, z2.b1414# CHECK-NEXT: [1,2] D================eeeER . smmla z0.s, z1.b, z2.b1415# CHECK-NEXT: [1,3] D===================eeeER smmla z0.s, z0.b, z1.b1416 1417# CHECK: Average Wait times (based on the timeline view):1418# CHECK-NEXT: [0]: Executions1419# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1420# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1421# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1422 1423# CHECK: [0] [1] [2] [3]1424# CHECK-NEXT: 0. 2 6.5 0.5 0.0 mul z0.s, z0.s, z0.s1425# CHECK-NEXT: 1. 2 10.5 0.0 0.0 smmla z0.s, z1.b, z2.b1426# CHECK-NEXT: 2. 2 11.5 0.0 0.0 smmla z0.s, z1.b, z2.b1427# CHECK-NEXT: 3. 2 14.5 0.0 0.0 smmla z0.s, z0.b, z1.b1428# CHECK-NEXT: 2 10.8 0.1 0.0 <total>1429 1430# CHECK: [29] Code Region - Z mla.b1431 1432# CHECK: Iterations: 1001433# CHECK-NEXT: Instructions: 4001434# CHECK-NEXT: Total Cycles: 14031435# CHECK-NEXT: Total uOps: 5001436 1437# CHECK: Dispatch Width: 101438# CHECK-NEXT: uOps Per Cycle: 0.361439# CHECK-NEXT: IPC: 0.291440# CHECK-NEXT: Block RThroughput: 2.51441 1442# CHECK: Timeline view:1443# CHECK-NEXT: 0123456789 01444# CHECK-NEXT: Index 0123456789 01234567891445 1446# CHECK: [0,0] DeeeeeER . . . . . mul z0.d, z0.d, z0.d1447# CHECK-NEXT: [0,1] D=====eeeeER . . . . mla z0.b, p0/m, z1.b, z2.b1448# CHECK-NEXT: [0,2] D======eeeeER . . . . mla z0.b, p0/m, z1.b, z2.b1449# CHECK-NEXT: [0,3] D==========eeeeER . . . mla z0.b, p0/m, z0.b, z1.b1450# CHECK-NEXT: [1,0] D==============eeeeeER . . mul z0.d, z0.d, z0.d1451# CHECK-NEXT: [1,1] D===================eeeeER . mla z0.b, p0/m, z1.b, z2.b1452# CHECK-NEXT: [1,2] D====================eeeeER . mla z0.b, p0/m, z1.b, z2.b1453# CHECK-NEXT: [1,3] D========================eeeeER mla z0.b, p0/m, z0.b, z1.b1454 1455# CHECK: Average Wait times (based on the timeline view):1456# CHECK-NEXT: [0]: Executions1457# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1458# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1459# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1460 1461# CHECK: [0] [1] [2] [3]1462# CHECK-NEXT: 0. 2 8.0 0.5 0.0 mul z0.d, z0.d, z0.d1463# CHECK-NEXT: 1. 2 13.0 0.0 0.0 mla z0.b, p0/m, z1.b, z2.b1464# CHECK-NEXT: 2. 2 14.0 0.0 0.0 mla z0.b, p0/m, z1.b, z2.b1465# CHECK-NEXT: 3. 2 18.0 0.0 0.0 mla z0.b, p0/m, z0.b, z1.b1466# CHECK-NEXT: 2 13.3 0.1 0.0 <total>1467 1468# CHECK: [30] Code Region - Z mla.d1469 1470# CHECK: Iterations: 1001471# CHECK-NEXT: Instructions: 4001472# CHECK-NEXT: Total Cycles: 18031473# CHECK-NEXT: Total uOps: 5001474 1475# CHECK: Dispatch Width: 101476# CHECK-NEXT: uOps Per Cycle: 0.281477# CHECK-NEXT: IPC: 0.221478# CHECK-NEXT: Block RThroughput: 4.01479 1480# CHECK: Timeline view:1481# CHECK-NEXT: 0123456789 0123456781482# CHECK-NEXT: Index 0123456789 01234567891483 1484# CHECK: [0,0] DeeeeeER . . . . . . . mul z0.d, z0.d, z0.d1485# CHECK-NEXT: [0,1] D=====eeeeeER . . . . . . mla z0.d, p0/m, z1.d, z2.d1486# CHECK-NEXT: [0,2] D========eeeeeER . . . . . mla z0.d, p0/m, z1.d, z2.d1487# CHECK-NEXT: [0,3] D=============eeeeeER . . . . mla z0.d, p0/m, z0.d, z1.d1488# CHECK-NEXT: [1,0] D==================eeeeeER . . . mul z0.d, z0.d, z0.d1489# CHECK-NEXT: [1,1] D=======================eeeeeER . . mla z0.d, p0/m, z1.d, z2.d1490# CHECK-NEXT: [1,2] D==========================eeeeeER . . mla z0.d, p0/m, z1.d, z2.d1491# CHECK-NEXT: [1,3] D===============================eeeeeER mla z0.d, p0/m, z0.d, z1.d1492 1493# CHECK: Average Wait times (based on the timeline view):1494# CHECK-NEXT: [0]: Executions1495# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1496# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1497# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1498 1499# CHECK: [0] [1] [2] [3]1500# CHECK-NEXT: 0. 2 10.0 0.5 0.0 mul z0.d, z0.d, z0.d1501# CHECK-NEXT: 1. 2 15.0 0.0 0.0 mla z0.d, p0/m, z1.d, z2.d1502# CHECK-NEXT: 2. 2 18.0 0.0 0.0 mla z0.d, p0/m, z1.d, z2.d1503# CHECK-NEXT: 3. 2 23.0 0.0 0.0 mla z0.d, p0/m, z0.d, z1.d1504# CHECK-NEXT: 2 16.5 0.1 0.0 <total>1505 1506# CHECK: [31] Code Region - Z smlalb1507 1508# CHECK: Iterations: 1001509# CHECK-NEXT: Instructions: 4001510# CHECK-NEXT: Total Cycles: 14031511# CHECK-NEXT: Total uOps: 5001512 1513# CHECK: Dispatch Width: 101514# CHECK-NEXT: uOps Per Cycle: 0.361515# CHECK-NEXT: IPC: 0.291516# CHECK-NEXT: Block RThroughput: 2.51517 1518# CHECK: Timeline view:1519# CHECK-NEXT: 0123456789 01520# CHECK-NEXT: Index 0123456789 01234567891521 1522# CHECK: [0,0] DeeeeeER . . . . . mul z0.d, z0.d, z0.d1523# CHECK-NEXT: [0,1] D=====eeeeER . . . . smlalb z0.d, z1.s, z2.s1524# CHECK-NEXT: [0,2] D======eeeeER . . . . smlalb z0.d, z1.s, z2.s1525# CHECK-NEXT: [0,3] D==========eeeeER . . . smlalb z0.d, z0.s, z1.s1526# CHECK-NEXT: [1,0] D==============eeeeeER . . mul z0.d, z0.d, z0.d1527# CHECK-NEXT: [1,1] D===================eeeeER . smlalb z0.d, z1.s, z2.s1528# CHECK-NEXT: [1,2] D====================eeeeER . smlalb z0.d, z1.s, z2.s1529# CHECK-NEXT: [1,3] D========================eeeeER smlalb z0.d, z0.s, z1.s1530 1531# CHECK: Average Wait times (based on the timeline view):1532# CHECK-NEXT: [0]: Executions1533# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1534# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1535# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1536 1537# CHECK: [0] [1] [2] [3]1538# CHECK-NEXT: 0. 2 8.0 0.5 0.0 mul z0.d, z0.d, z0.d1539# CHECK-NEXT: 1. 2 13.0 0.0 0.0 smlalb z0.d, z1.s, z2.s1540# CHECK-NEXT: 2. 2 14.0 0.0 0.0 smlalb z0.d, z1.s, z2.s1541# CHECK-NEXT: 3. 2 18.0 0.0 0.0 smlalb z0.d, z0.s, z1.s1542# CHECK-NEXT: 2 13.3 0.1 0.0 <total>1543 1544# CHECK: [32] Code Region - Z sqdmlalb1545 1546# CHECK: Iterations: 1001547# CHECK-NEXT: Instructions: 4001548# CHECK-NEXT: Total Cycles: 15031549# CHECK-NEXT: Total uOps: 5001550 1551# CHECK: Dispatch Width: 101552# CHECK-NEXT: uOps Per Cycle: 0.331553# CHECK-NEXT: IPC: 0.271554# CHECK-NEXT: Block RThroughput: 2.51555 1556# CHECK: Timeline view:1557# CHECK-NEXT: 0123456789 0121558# CHECK-NEXT: Index 0123456789 01234567891559 1560# CHECK: [0,0] DeeeeeER . . . . . . mul z0.d, z0.d, z0.d1561# CHECK-NEXT: [0,1] D=====eeeeER . . . . . sqdmlalb z0.d, z1.s, z2.s1562# CHECK-NEXT: [0,2] D=======eeeeER . . . . . sqdmlalb z0.d, z1.s, z2.s1563# CHECK-NEXT: [0,3] D===========eeeeER . . . . sqdmlalb z0.d, z0.s, z1.s1564# CHECK-NEXT: [1,0] D===============eeeeeER . . . mul z0.d, z0.d, z0.d1565# CHECK-NEXT: [1,1] D====================eeeeER . . sqdmlalb z0.d, z1.s, z2.s1566# CHECK-NEXT: [1,2] D======================eeeeER . . sqdmlalb z0.d, z1.s, z2.s1567# CHECK-NEXT: [1,3] D==========================eeeeER sqdmlalb z0.d, z0.s, z1.s1568 1569# CHECK: Average Wait times (based on the timeline view):1570# CHECK-NEXT: [0]: Executions1571# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1572# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1573# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1574 1575# CHECK: [0] [1] [2] [3]1576# CHECK-NEXT: 0. 2 8.5 0.5 0.0 mul z0.d, z0.d, z0.d1577# CHECK-NEXT: 1. 2 13.5 0.0 0.0 sqdmlalb z0.d, z1.s, z2.s1578# CHECK-NEXT: 2. 2 15.5 0.0 0.0 sqdmlalb z0.d, z1.s, z2.s1579# CHECK-NEXT: 3. 2 19.5 0.0 0.0 sqdmlalb z0.d, z0.s, z1.s1580# CHECK-NEXT: 2 14.3 0.1 0.0 <total>1581 1582# CHECK: [33] Code Region - Z sqrdmlah.b1583 1584# CHECK: Iterations: 1001585# CHECK-NEXT: Instructions: 4001586# CHECK-NEXT: Total Cycles: 15031587# CHECK-NEXT: Total uOps: 5001588 1589# CHECK: Dispatch Width: 101590# CHECK-NEXT: uOps Per Cycle: 0.331591# CHECK-NEXT: IPC: 0.271592# CHECK-NEXT: Block RThroughput: 2.51593 1594# CHECK: Timeline view:1595# CHECK-NEXT: 0123456789 0121596# CHECK-NEXT: Index 0123456789 01234567891597 1598# CHECK: [0,0] DeeeeeER . . . . . . mul z0.d, z0.d, z0.d1599# CHECK-NEXT: [0,1] D=====eeeeER . . . . . sqrdmlah z0.b, z1.b, z2.b1600# CHECK-NEXT: [0,2] D=======eeeeER . . . . . sqrdmlah z0.b, z1.b, z2.b1601# CHECK-NEXT: [0,3] D===========eeeeER . . . . sqrdmlah z0.b, z0.b, z1.b1602# CHECK-NEXT: [1,0] D===============eeeeeER . . . mul z0.d, z0.d, z0.d1603# CHECK-NEXT: [1,1] D====================eeeeER . . sqrdmlah z0.b, z1.b, z2.b1604# CHECK-NEXT: [1,2] D======================eeeeER . . sqrdmlah z0.b, z1.b, z2.b1605# CHECK-NEXT: [1,3] D==========================eeeeER sqrdmlah z0.b, z0.b, z1.b1606 1607# CHECK: Average Wait times (based on the timeline view):1608# CHECK-NEXT: [0]: Executions1609# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1610# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1611# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1612 1613# CHECK: [0] [1] [2] [3]1614# CHECK-NEXT: 0. 2 8.5 0.5 0.0 mul z0.d, z0.d, z0.d1615# CHECK-NEXT: 1. 2 13.5 0.0 0.0 sqrdmlah z0.b, z1.b, z2.b1616# CHECK-NEXT: 2. 2 15.5 0.0 0.0 sqrdmlah z0.b, z1.b, z2.b1617# CHECK-NEXT: 3. 2 19.5 0.0 0.0 sqrdmlah z0.b, z0.b, z1.b1618# CHECK-NEXT: 2 14.3 0.1 0.0 <total>1619 1620# CHECK: [34] Code Region - Z sqrdmlah.d1621 1622# CHECK: Iterations: 1001623# CHECK-NEXT: Instructions: 4001624# CHECK-NEXT: Total Cycles: 18031625# CHECK-NEXT: Total uOps: 5001626 1627# CHECK: Dispatch Width: 101628# CHECK-NEXT: uOps Per Cycle: 0.281629# CHECK-NEXT: IPC: 0.221630# CHECK-NEXT: Block RThroughput: 4.01631 1632# CHECK: Timeline view:1633# CHECK-NEXT: 0123456789 0123456781634# CHECK-NEXT: Index 0123456789 01234567891635 1636# CHECK: [0,0] DeeeeeER . . . . . . . mul z0.d, z0.d, z0.d1637# CHECK-NEXT: [0,1] D=====eeeeeER . . . . . . sqrdmlah z0.d, z1.d, z2.d1638# CHECK-NEXT: [0,2] D========eeeeeER . . . . . sqrdmlah z0.d, z1.d, z2.d1639# CHECK-NEXT: [0,3] D=============eeeeeER . . . . sqrdmlah z0.d, z0.d, z1.d1640# CHECK-NEXT: [1,0] D==================eeeeeER . . . mul z0.d, z0.d, z0.d1641# CHECK-NEXT: [1,1] D=======================eeeeeER . . sqrdmlah z0.d, z1.d, z2.d1642# CHECK-NEXT: [1,2] D==========================eeeeeER . . sqrdmlah z0.d, z1.d, z2.d1643# CHECK-NEXT: [1,3] D===============================eeeeeER sqrdmlah z0.d, z0.d, z1.d1644 1645# CHECK: Average Wait times (based on the timeline view):1646# CHECK-NEXT: [0]: Executions1647# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1648# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1649# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1650 1651# CHECK: [0] [1] [2] [3]1652# CHECK-NEXT: 0. 2 10.0 0.5 0.0 mul z0.d, z0.d, z0.d1653# CHECK-NEXT: 1. 2 15.0 0.0 0.0 sqrdmlah z0.d, z1.d, z2.d1654# CHECK-NEXT: 2. 2 18.0 0.0 0.0 sqrdmlah z0.d, z1.d, z2.d1655# CHECK-NEXT: 3. 2 23.0 0.0 0.0 sqrdmlah z0.d, z0.d, z1.d1656# CHECK-NEXT: 2 16.5 0.1 0.0 <total>1657 1658# CHECK: [35] Code Region - Z fcmla ZPmZZ1659 1660# CHECK: Iterations: 1001661# CHECK-NEXT: Instructions: 4001662# CHECK-NEXT: Total Cycles: 15031663# CHECK-NEXT: Total uOps: 4001664 1665# CHECK: Dispatch Width: 101666# CHECK-NEXT: uOps Per Cycle: 0.271667# CHECK-NEXT: IPC: 0.271668# CHECK-NEXT: Block RThroughput: 1.01669 1670# CHECK: Timeline view:1671# CHECK-NEXT: 0123456789 0121672# CHECK-NEXT: Index 0123456789 01234567891673 1674# CHECK: [0,0] DeeeER . . . . . . fmul z0.d, z0.d, z0.d1675# CHECK-NEXT: [0,1] D===eeeeeER . . . . . fcmla z0.d, p0/m, z1.d, z2.d, #901676# CHECK-NEXT: [0,2] D=====eeeeeER . . . . . fcmla z0.d, p0/m, z1.d, z2.d, #901677# CHECK-NEXT: [0,3] D==========eeeeeER . . . . fcmla z0.d, p0/m, z0.d, z1.d, #901678# CHECK-NEXT: [1,0] D===============eeeER . . . fmul z0.d, z0.d, z0.d1679# CHECK-NEXT: [1,1] D==================eeeeeER . . fcmla z0.d, p0/m, z1.d, z2.d, #901680# CHECK-NEXT: [1,2] D====================eeeeeER . . fcmla z0.d, p0/m, z1.d, z2.d, #901681# CHECK-NEXT: [1,3] D=========================eeeeeER fcmla z0.d, p0/m, z0.d, z1.d, #901682 1683# CHECK: Average Wait times (based on the timeline view):1684# CHECK-NEXT: [0]: Executions1685# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1686# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1687# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1688 1689# CHECK: [0] [1] [2] [3]1690# CHECK-NEXT: 0. 2 8.5 0.5 0.0 fmul z0.d, z0.d, z0.d1691# CHECK-NEXT: 1. 2 11.5 0.0 0.0 fcmla z0.d, p0/m, z1.d, z2.d, #901692# CHECK-NEXT: 2. 2 13.5 0.0 0.0 fcmla z0.d, p0/m, z1.d, z2.d, #901693# CHECK-NEXT: 3. 2 18.5 0.0 0.0 fcmla z0.d, p0/m, z0.d, z1.d, #901694# CHECK-NEXT: 2 13.0 0.1 0.0 <total>1695 1696# CHECK: [36] Code Region - Z fcmla ZZZI1697 1698# CHECK: Iterations: 1001699# CHECK-NEXT: Instructions: 4001700# CHECK-NEXT: Total Cycles: 15031701# CHECK-NEXT: Total uOps: 4001702 1703# CHECK: Dispatch Width: 101704# CHECK-NEXT: uOps Per Cycle: 0.271705# CHECK-NEXT: IPC: 0.271706# CHECK-NEXT: Block RThroughput: 1.01707 1708# CHECK: Timeline view:1709# CHECK-NEXT: 0123456789 0121710# CHECK-NEXT: Index 0123456789 01234567891711 1712# CHECK: [0,0] DeeeER . . . . . . fmul z0.d, z0.d, z0.d1713# CHECK-NEXT: [0,1] D===eeeeeER . . . . . fcmla z0.s, z1.s, z2.s[1], #901714# CHECK-NEXT: [0,2] D=====eeeeeER . . . . . fcmla z0.s, z1.s, z2.s[1], #901715# CHECK-NEXT: [0,3] D==========eeeeeER . . . . fcmla z0.s, z0.s, z1.s[1], #901716# CHECK-NEXT: [1,0] D===============eeeER . . . fmul z0.d, z0.d, z0.d1717# CHECK-NEXT: [1,1] D==================eeeeeER . . fcmla z0.s, z1.s, z2.s[1], #901718# CHECK-NEXT: [1,2] D====================eeeeeER . . fcmla z0.s, z1.s, z2.s[1], #901719# CHECK-NEXT: [1,3] D=========================eeeeeER fcmla z0.s, z0.s, z1.s[1], #901720 1721# CHECK: Average Wait times (based on the timeline view):1722# CHECK-NEXT: [0]: Executions1723# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1724# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1725# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1726 1727# CHECK: [0] [1] [2] [3]1728# CHECK-NEXT: 0. 2 8.5 0.5 0.0 fmul z0.d, z0.d, z0.d1729# CHECK-NEXT: 1. 2 11.5 0.0 0.0 fcmla z0.s, z1.s, z2.s[1], #901730# CHECK-NEXT: 2. 2 13.5 0.0 0.0 fcmla z0.s, z1.s, z2.s[1], #901731# CHECK-NEXT: 3. 2 18.5 0.0 0.0 fcmla z0.s, z0.s, z1.s[1], #901732# CHECK-NEXT: 2 13.0 0.1 0.0 <total>1733 1734# CHECK: [37] Code Region - Z fmla ZPmZZ1735 1736# CHECK: Iterations: 1001737# CHECK-NEXT: Instructions: 4001738# CHECK-NEXT: Total Cycles: 13031739# CHECK-NEXT: Total uOps: 4001740 1741# CHECK: Dispatch Width: 101742# CHECK-NEXT: uOps Per Cycle: 0.311743# CHECK-NEXT: IPC: 0.311744# CHECK-NEXT: Block RThroughput: 1.01745 1746# CHECK: Timeline view:1747# CHECK-NEXT: 01234567891748# CHECK-NEXT: Index 0123456789 0123456781749 1750# CHECK: [0,0] DeeeER . . . . . fmul z0.d, z0.d, z0.d1751# CHECK-NEXT: [0,1] D===eeeeER. . . . . fmla z0.d, p0/m, z1.d, z2.d1752# CHECK-NEXT: [0,2] D=====eeeeER . . . . fmla z0.d, p0/m, z1.d, z2.d1753# CHECK-NEXT: [0,3] D=========eeeeER . . . fmla z0.d, p0/m, z0.d, z1.d1754# CHECK-NEXT: [1,0] D=============eeeER . . . fmul z0.d, z0.d, z0.d1755# CHECK-NEXT: [1,1] D================eeeeER . . fmla z0.d, p0/m, z1.d, z2.d1756# CHECK-NEXT: [1,2] D==================eeeeER. . fmla z0.d, p0/m, z1.d, z2.d1757# CHECK-NEXT: [1,3] D======================eeeeER fmla z0.d, p0/m, z0.d, z1.d1758 1759# CHECK: Average Wait times (based on the timeline view):1760# CHECK-NEXT: [0]: Executions1761# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1762# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1763# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1764 1765# CHECK: [0] [1] [2] [3]1766# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul z0.d, z0.d, z0.d1767# CHECK-NEXT: 1. 2 10.5 0.0 0.0 fmla z0.d, p0/m, z1.d, z2.d1768# CHECK-NEXT: 2. 2 12.5 0.0 0.0 fmla z0.d, p0/m, z1.d, z2.d1769# CHECK-NEXT: 3. 2 16.5 0.0 0.0 fmla z0.d, p0/m, z0.d, z1.d1770# CHECK-NEXT: 2 11.8 0.1 0.0 <total>1771 1772# CHECK: [38] Code Region - Z fmla ZZZI1773 1774# CHECK: Iterations: 1001775# CHECK-NEXT: Instructions: 4001776# CHECK-NEXT: Total Cycles: 13031777# CHECK-NEXT: Total uOps: 4001778 1779# CHECK: Dispatch Width: 101780# CHECK-NEXT: uOps Per Cycle: 0.311781# CHECK-NEXT: IPC: 0.311782# CHECK-NEXT: Block RThroughput: 1.01783 1784# CHECK: Timeline view:1785# CHECK-NEXT: 01234567891786# CHECK-NEXT: Index 0123456789 0123456781787 1788# CHECK: [0,0] DeeeER . . . . . fmul z0.d, z0.d, z0.d1789# CHECK-NEXT: [0,1] D===eeeeER. . . . . fmla z0.d, z1.d, z2.d[1]1790# CHECK-NEXT: [0,2] D=====eeeeER . . . . fmla z0.d, z1.d, z2.d[1]1791# CHECK-NEXT: [0,3] D=========eeeeER . . . fmla z0.d, z0.d, z1.d[1]1792# CHECK-NEXT: [1,0] D=============eeeER . . . fmul z0.d, z0.d, z0.d1793# CHECK-NEXT: [1,1] D================eeeeER . . fmla z0.d, z1.d, z2.d[1]1794# CHECK-NEXT: [1,2] D==================eeeeER. . fmla z0.d, z1.d, z2.d[1]1795# CHECK-NEXT: [1,3] D======================eeeeER fmla z0.d, z0.d, z1.d[1]1796 1797# CHECK: Average Wait times (based on the timeline view):1798# CHECK-NEXT: [0]: Executions1799# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1800# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1801# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1802 1803# CHECK: [0] [1] [2] [3]1804# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul z0.d, z0.d, z0.d1805# CHECK-NEXT: 1. 2 10.5 0.0 0.0 fmla z0.d, z1.d, z2.d[1]1806# CHECK-NEXT: 2. 2 12.5 0.0 0.0 fmla z0.d, z1.d, z2.d[1]1807# CHECK-NEXT: 3. 2 16.5 0.0 0.0 fmla z0.d, z0.d, z1.d[1]1808# CHECK-NEXT: 2 11.8 0.1 0.0 <total>1809 1810# CHECK: [39] Code Region - Z fmlalb ZZZ1811 1812# CHECK: Iterations: 1001813# CHECK-NEXT: Instructions: 4001814# CHECK-NEXT: Total Cycles: 13031815# CHECK-NEXT: Total uOps: 4001816 1817# CHECK: Dispatch Width: 101818# CHECK-NEXT: uOps Per Cycle: 0.311819# CHECK-NEXT: IPC: 0.311820# CHECK-NEXT: Block RThroughput: 1.01821 1822# CHECK: Timeline view:1823# CHECK-NEXT: 01234567891824# CHECK-NEXT: Index 0123456789 0123456781825 1826# CHECK: [0,0] DeeeER . . . . . fmul z0.d, z0.d, z0.d1827# CHECK-NEXT: [0,1] D===eeeeER. . . . . fmlalb z0.s, z1.h, z2.h1828# CHECK-NEXT: [0,2] D=====eeeeER . . . . fmlalb z0.s, z1.h, z2.h1829# CHECK-NEXT: [0,3] D=========eeeeER . . . fmlalb z0.s, z0.h, z1.h1830# CHECK-NEXT: [1,0] D=============eeeER . . . fmul z0.d, z0.d, z0.d1831# CHECK-NEXT: [1,1] D================eeeeER . . fmlalb z0.s, z1.h, z2.h1832# CHECK-NEXT: [1,2] D==================eeeeER. . fmlalb z0.s, z1.h, z2.h1833# CHECK-NEXT: [1,3] D======================eeeeER fmlalb z0.s, z0.h, z1.h1834 1835# CHECK: Average Wait times (based on the timeline view):1836# CHECK-NEXT: [0]: Executions1837# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1838# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1839# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1840 1841# CHECK: [0] [1] [2] [3]1842# CHECK-NEXT: 0. 2 7.5 0.5 0.0 fmul z0.d, z0.d, z0.d1843# CHECK-NEXT: 1. 2 10.5 0.0 0.0 fmlalb z0.s, z1.h, z2.h1844# CHECK-NEXT: 2. 2 12.5 0.0 0.0 fmlalb z0.s, z1.h, z2.h1845# CHECK-NEXT: 3. 2 16.5 0.0 0.0 fmlalb z0.s, z0.h, z1.h1846# CHECK-NEXT: 2 11.8 0.1 0.0 <total>1847 1848# CHECK: [40] Code Region - Z bfdot1849 1850# CHECK: Iterations: 1001851# CHECK-NEXT: Instructions: 4001852# CHECK-NEXT: Total Cycles: 16031853# CHECK-NEXT: Total uOps: 4001854 1855# CHECK: Dispatch Width: 101856# CHECK-NEXT: uOps Per Cycle: 0.251857# CHECK-NEXT: IPC: 0.251858# CHECK-NEXT: Block RThroughput: 1.01859 1860# CHECK: Timeline view:1861# CHECK-NEXT: 0123456789 012341862# CHECK-NEXT: Index 0123456789 01234567891863 1864# CHECK: [0,0] DeeeER . . . . . . fmul z0.d, z0.d, z0.d1865# CHECK-NEXT: [0,1] D===eeeeeER . . . . . bfdot z0.s, z1.h, z2.h1866# CHECK-NEXT: [0,2] D======eeeeeER . . . . . bfdot z0.s, z1.h, z2.h1867# CHECK-NEXT: [0,3] D===========eeeeeER . . . . bfdot z0.s, z0.h, z1.h1868# CHECK-NEXT: [1,0] D================eeeER . . . fmul z0.d, z0.d, z0.d1869# CHECK-NEXT: [1,1] D===================eeeeeER . . bfdot z0.s, z1.h, z2.h1870# CHECK-NEXT: [1,2] D======================eeeeeER. . bfdot z0.s, z1.h, z2.h1871# CHECK-NEXT: [1,3] D===========================eeeeeER bfdot z0.s, z0.h, z1.h1872 1873# CHECK: Average Wait times (based on the timeline view):1874# CHECK-NEXT: [0]: Executions1875# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1876# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1877# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1878 1879# CHECK: [0] [1] [2] [3]1880# CHECK-NEXT: 0. 2 9.0 0.5 0.0 fmul z0.d, z0.d, z0.d1881# CHECK-NEXT: 1. 2 12.0 0.0 0.0 bfdot z0.s, z1.h, z2.h1882# CHECK-NEXT: 2. 2 15.0 0.0 0.0 bfdot z0.s, z1.h, z2.h1883# CHECK-NEXT: 3. 2 20.0 0.0 0.0 bfdot z0.s, z0.h, z1.h1884# CHECK-NEXT: 2 14.0 0.1 0.0 <total>1885 1886# CHECK: [41] Code Region - Z bfmmla1887 1888# CHECK: Iterations: 1001889# CHECK-NEXT: Instructions: 4001890# CHECK-NEXT: Total Cycles: 19031891# CHECK-NEXT: Total uOps: 4001892 1893# CHECK: Dispatch Width: 101894# CHECK-NEXT: uOps Per Cycle: 0.211895# CHECK-NEXT: IPC: 0.211896# CHECK-NEXT: Block RThroughput: 1.01897 1898# CHECK: Timeline view:1899# CHECK-NEXT: 0123456789 01234567891900# CHECK-NEXT: Index 0123456789 0123456789 01901 1902# CHECK: [0,0] DeeeER . . . . . . . fmul z0.d, z0.d, z0.d1903# CHECK-NEXT: [0,1] D===eeeeeeER . . . . . . bfmmla z0.s, z1.h, z2.h1904# CHECK-NEXT: [0,2] D=======eeeeeeER . . . . . bfmmla z0.s, z1.h, z2.h1905# CHECK-NEXT: [0,3] D=============eeeeeeER . . . . bfmmla z0.s, z0.h, z1.h1906# CHECK-NEXT: [1,0] D===================eeeER. . . . fmul z0.d, z0.d, z0.d1907# CHECK-NEXT: [1,1] D======================eeeeeeER . . bfmmla z0.s, z1.h, z2.h1908# CHECK-NEXT: [1,2] D==========================eeeeeeER. . bfmmla z0.s, z1.h, z2.h1909# CHECK-NEXT: [1,3] D================================eeeeeeER bfmmla z0.s, z0.h, z1.h1910 1911# CHECK: Average Wait times (based on the timeline view):1912# CHECK-NEXT: [0]: Executions1913# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1914# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1915# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1916 1917# CHECK: [0] [1] [2] [3]1918# CHECK-NEXT: 0. 2 10.5 0.5 0.0 fmul z0.d, z0.d, z0.d1919# CHECK-NEXT: 1. 2 13.5 0.0 0.0 bfmmla z0.s, z1.h, z2.h1920# CHECK-NEXT: 2. 2 17.5 0.0 0.0 bfmmla z0.s, z1.h, z2.h1921# CHECK-NEXT: 3. 2 23.5 0.0 0.0 bfmmla z0.s, z0.h, z1.h1922# CHECK-NEXT: 2 16.3 0.1 0.0 <total>1923 1924# CHECK: [42] Code Region - bfmlalb1925 1926# CHECK: Iterations: 1001927# CHECK-NEXT: Instructions: 4001928# CHECK-NEXT: Total Cycles: 15031929# CHECK-NEXT: Total uOps: 4001930 1931# CHECK: Dispatch Width: 101932# CHECK-NEXT: uOps Per Cycle: 0.271933# CHECK-NEXT: IPC: 0.271934# CHECK-NEXT: Block RThroughput: 1.01935 1936# CHECK: Timeline view:1937# CHECK-NEXT: 0123456789 0121938# CHECK-NEXT: Index 0123456789 01234567891939 1940# CHECK: [0,0] DeeeER . . . . . . fmul z0.d, z0.d, z0.d1941# CHECK-NEXT: [0,1] D===eeeeeER . . . . . bfmlalb z0.s, z1.h, z2.h1942# CHECK-NEXT: [0,2] D=====eeeeeER . . . . . bfmlalb z0.s, z1.h, z2.h1943# CHECK-NEXT: [0,3] D==========eeeeeER . . . . bfmlalb z0.s, z0.h, z1.h1944# CHECK-NEXT: [1,0] D===============eeeER . . . fmul z0.d, z0.d, z0.d1945# CHECK-NEXT: [1,1] D==================eeeeeER . . bfmlalb z0.s, z1.h, z2.h1946# CHECK-NEXT: [1,2] D====================eeeeeER . . bfmlalb z0.s, z1.h, z2.h1947# CHECK-NEXT: [1,3] D=========================eeeeeER bfmlalb z0.s, z0.h, z1.h1948 1949# CHECK: Average Wait times (based on the timeline view):1950# CHECK-NEXT: [0]: Executions1951# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue1952# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready1953# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage1954 1955# CHECK: [0] [1] [2] [3]1956# CHECK-NEXT: 0. 2 8.5 0.5 0.0 fmul z0.d, z0.d, z0.d1957# CHECK-NEXT: 1. 2 11.5 0.0 0.0 bfmlalb z0.s, z1.h, z2.h1958# CHECK-NEXT: 2. 2 13.5 0.0 0.0 bfmlalb z0.s, z1.h, z2.h1959# CHECK-NEXT: 3. 2 18.5 0.0 0.0 bfmlalb z0.s, z0.h, z1.h1960# CHECK-NEXT: 2 13.0 0.1 0.0 <total>1961