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1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py2# RUN: llvm-mca -mtriple=riscv64 -mcpu=mips-p8700 -timeline -iterations=1 < %s | FileCheck %s3 4# A few instructions to test the pipeline:5# - Integer division (IDiv) exercises the p8700GpDiv resource.6# - Integer multiplication (IMul) uses p8700GpMul.7# - Floating-point multiplication uses the FPUL pipeline.8# - Load/Store instructions use the LSU pipeline.9# - Simple ALU instructions test the p8700WriteEitherALU and p8700IssueAL2 resources.10# - A jump instruction to test the CTI pipeline.11 12# Integer division: a0 = a1 / a213# Exercises p8700GpDiv resource.14 div a0, a1, a215 16# Integer multiplication: a4 = a1 * a217# Exercises p8700GpMul resource.18 mul a4, a1, a219 20# Floating-point multiply: f1 = f2 * f3 (single precision)21# Exercises p8700FpuLong + p8700FpuApu resources.22 fmul.s f1, f2, f323 24# Load/Store: load word from a0 into a3, then store a3 into a125# Exercises p8700IssueLSU resource.26 lw a3, 0(a0)27 sw a3, 0(a1)28 29# Simple ALU operations (adding two registers, rotating bits)30# Exercises p8700WriteEitherALU.31 add a5, a1, a232 ror a6, a5, a233 34# A jump instruction: a simple forward jump35# Exercises p8700IssueCTI resource.36 jal x0, .Lend37 38 add a7, a4, a0 # Instruction after jump (won't execute)39.Lend:40 nop41 42# CHECK: Iterations: 143# CHECK-NEXT: Instructions: 1044# CHECK-NEXT: Total Cycles: 1745# CHECK-NEXT: Total uOps: 1046 47# CHECK: Dispatch Width: 448# CHECK-NEXT: uOps Per Cycle: 0.5949# CHECK-NEXT: IPC: 0.5950# CHECK-NEXT: Block RThroughput: 7.051 52# CHECK: Instruction Info:53# CHECK-NEXT: [1]: #uOps54# CHECK-NEXT: [2]: Latency55# CHECK-NEXT: [3]: RThroughput56# CHECK-NEXT: [4]: MayLoad57# CHECK-NEXT: [5]: MayStore58# CHECK-NEXT: [6]: HasSideEffects (U)59 60# CHECK: [1] [2] [3] [4] [5] [6] Instructions:61# CHECK-NEXT: 1 7 7.00 div a0, a1, a262# CHECK-NEXT: 1 4 1.00 mul a4, a1, a263# CHECK-NEXT: 1 5 1.00 fmul.s ft1, ft2, ft364# CHECK-NEXT: 1 4 1.00 * lw a3, 0(a0)65# CHECK-NEXT: 1 3 1.00 * sw a3, 0(a1)66# CHECK-NEXT: 1 1 0.50 add a5, a1, a267# CHECK-NEXT: 1 1 0.50 ror a6, a5, a268# CHECK-NEXT: 1 1 1.00 j .Lend69# CHECK-NEXT: 1 1 0.50 add a7, a4, a070# CHECK-NEXT: 1 0 0.50 nop71 72# CHECK: Resources:73# CHECK-NEXT: [0.0] - p8700AGQ74# CHECK-NEXT: [0.1] - p8700AGQ75# CHECK-NEXT: [0.2] - p8700AGQ76# CHECK-NEXT: [1] - p8700ALQ77# CHECK-NEXT: [2.0] - p8700FPQ78# CHECK-NEXT: [2.1] - p8700FPQ79# CHECK-NEXT: [2.2] - p8700FPQ80# CHECK-NEXT: [3] - p8700FpuApu81# CHECK-NEXT: [4] - p8700FpuLong82# CHECK-NEXT: [5] - p8700GpDiv83# CHECK-NEXT: [6] - p8700GpMul84# CHECK-NEXT: [7] - p8700IssueAL285# CHECK-NEXT: [8] - p8700IssueCTI86# CHECK-NEXT: [9] - p8700IssueFPUL87# CHECK-NEXT: [10] - p8700IssueFPUS88# CHECK-NEXT: [11] - p8700IssueLSU89 90# CHECK: Resource pressure per iteration:91# CHECK-NEXT: [0.0] [0.1] [0.2] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9] [10] [11]92# CHECK-NEXT: 1.00 1.00 1.00 2.00 - - - 1.00 1.00 7.00 1.00 2.00 1.00 - - 2.0093 94# CHECK: Resource pressure by instruction:95# CHECK-NEXT: [0.0] [0.1] [0.2] [1] [2.0] [2.1] [2.2] [3] [4] [5] [6] [7] [8] [9] [10] [11] Instructions:96# CHECK-NEXT: - - - - - - - - - 7.00 - - - - - - div a0, a1, a297# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - mul a4, a1, a298# CHECK-NEXT: - - - - - - - 1.00 1.00 - - - - - - - fmul.s ft1, ft2, ft399# CHECK-NEXT: - 1.00 - - - - - - - - - - - - - 1.00 lw a3, 0(a0)100# CHECK-NEXT: 1.00 - - - - - - - - - - - - - - 1.00 sw a3, 0(a1)101# CHECK-NEXT: - - - - - - - - - - - 1.00 - - - - add a5, a1, a2102# CHECK-NEXT: - - - 1.00 - - - - - - - - - - - - ror a6, a5, a2103# CHECK-NEXT: - - 1.00 - - - - - - - - - 1.00 - - - j .Lend104# CHECK-NEXT: - - - 1.00 - - - - - - - - - - - - add a7, a4, a0105# CHECK-NEXT: - - - - - - - - - - - 1.00 - - - - nop106 107# CHECK: Timeline view:108# CHECK-NEXT: 0123456109# CHECK-NEXT: Index 0123456789110 111# CHECK: [0,0] DeeeeeeeER. .. div a0, a1, a2112# CHECK-NEXT: [0,1] DeeeeE---R. .. mul a4, a1, a2113# CHECK-NEXT: [0,2] DeeeeeE--R. .. fmul.s ft1, ft2, ft3114# CHECK-NEXT: [0,3] D=======eeeeER .. lw a3, 0(a0)115# CHECK-NEXT: [0,4] .D==========eeeER sw a3, 0(a1)116# CHECK-NEXT: [0,5] .DeE------------R add a5, a1, a2117# CHECK-NEXT: [0,6] .D=eE-----------R ror a6, a5, a2118# CHECK-NEXT: [0,7] .DeE------------R j .Lend119# CHECK-NEXT: [0,8] . D=====eE------R add a7, a4, a0120# CHECK-NEXT: [0,9] . DE------------R nop121 122# CHECK: Average Wait times (based on the timeline view):123# CHECK-NEXT: [0]: Executions124# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue125# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready126# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage127 128# CHECK: [0] [1] [2] [3]129# CHECK-NEXT: 0. 1 1.0 1.0 0.0 div a0, a1, a2130# CHECK-NEXT: 1. 1 1.0 1.0 3.0 mul a4, a1, a2131# CHECK-NEXT: 2. 1 1.0 1.0 2.0 fmul.s ft1, ft2, ft3132# CHECK-NEXT: 3. 1 8.0 0.0 0.0 lw a3, 0(a0)133# CHECK-NEXT: 4. 1 11.0 0.0 0.0 sw a3, 0(a1)134# CHECK-NEXT: 5. 1 1.0 1.0 12.0 add a5, a1, a2135# CHECK-NEXT: 6. 1 2.0 0.0 11.0 ror a6, a5, a2136# CHECK-NEXT: 7. 1 1.0 1.0 12.0 j .Lend137# CHECK-NEXT: 8. 1 6.0 0.0 6.0 add a7, a4, a0138# CHECK-NEXT: 9. 1 1.0 1.0 12.0 nop139# CHECK-NEXT: 1 3.3 0.6 5.8 <total>140