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1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py2# RUN: llvm-mca -march=riscv64 -mcpu=sifive-u74 -mattr=+v -instruction-tables < %s | FileCheck %s -check-prefixes=ALL,ISN3# RUN: llvm-mca -march=riscv64 -mcpu=sifive-u74 -mattr=+v -instruction-tables -show-barriers < %s | FileCheck %s -check-prefixes=ALL,ISNB4# RUN: llvm-mca -march=riscv64 -mcpu=sifive-u74 -mattr=+v -instruction-tables -show-encoding < %s | FileCheck %s -check-prefixes=ALL,ISNE5# RUN: llvm-mca -march=riscv64 -mcpu=sifive-u74 -mattr=+v -instruction-tables -show-barriers -show-encoding < %s | FileCheck %s -check-prefixes=ALL,ISNBE6# RUN: llvm-mca -march=riscv64 -mcpu=sifive-u74 -mattr=+v -instruction-tables=normal < %s | FileCheck %s -check-prefixes=ALL,ISN7# RUN: llvm-mca -march=riscv64 -mcpu=sifive-u74 -mattr=+v -instruction-tables=normal -show-barriers < %s | FileCheck %s -check-prefixes=ALL,ISNB8# RUN: llvm-mca -march=riscv64 -mcpu=sifive-u74 -mattr=+v -instruction-tables=normal -show-encoding < %s | FileCheck %s -check-prefixes=ALL,ISNE9# RUN: llvm-mca -march=riscv64 -mcpu=sifive-u74 -mattr=+v -instruction-tables=normal -show-barriers -show-encoding < %s | FileCheck %s -check-prefixes=ALL,ISNBE10# RUN: llvm-mca -march=riscv64 -mcpu=sifive-u74 -mattr=+v -instruction-tables=none < %s | FileCheck %s -check-prefixes=ALL11# RUN: llvm-mca -march=riscv64 -mcpu=sifive-u74 -mattr=+v -instruction-tables=none -show-barriers < %s | FileCheck %s -check-prefixes=ALL,NISB12# RUN: llvm-mca -march=riscv64 -mcpu=sifive-u74 -mattr=+v -instruction-tables=none -show-encoding < %s | FileCheck %s -check-prefixes=ALL,NISE13# RUN: llvm-mca -march=riscv64 -mcpu=sifive-u74 -mattr=+v -instruction-tables=none -show-barriers -show-encoding < %s | FileCheck %s -check-prefixes=ALL,NISBE14# RUN: llvm-mca -march=riscv64 -mcpu=sifive-u74 -mattr=+v -instruction-tables=full < %s | FileCheck %s -check-prefixes=ALL,ISF15# RUN: llvm-mca -march=riscv64 -mcpu=sifive-u74 -mattr=+v -instruction-tables=full -show-barriers < %s | FileCheck %s -check-prefixes=ALL,ISFB16# RUN: llvm-mca -march=riscv64 -mcpu=sifive-u74 -mattr=+v -instruction-tables=full -show-encoding < %s | FileCheck %s -check-prefixes=ALL,ISFE17# RUN: llvm-mca -march=riscv64 -mcpu=sifive-u74 -mattr=+v -instruction-tables=full -show-barriers -show-encoding < %s | FileCheck %s -check-prefixes=ALL,ISFBE18 19 vsetvli a3, a2, e16, m1, tu, mu // Comment20 vlm.v v4, (a1)21 22# NISB: Iterations: 10023# NISB-NEXT: Instructions: 20024# NISB-NEXT: Total Cycles: 40425# NISB-NEXT: Total uOps: 20026 27# NISBE: Iterations: 10028# NISBE-NEXT: Instructions: 20029# NISBE-NEXT: Total Cycles: 40430# NISBE-NEXT: Total uOps: 20031 32# NISE: Iterations: 10033# NISE-NEXT: Instructions: 20034# NISE-NEXT: Total Cycles: 40435# NISE-NEXT: Total uOps: 20036 37# ISF: Resources:38# ISF-NEXT: [0] - VLEN512SiFive7FDiv:139# ISF-NEXT: [1] - VLEN512SiFive7IDiv:140# ISF-NEXT: [2] - VLEN512SiFive7PipeA:141# ISF-NEXT: [3] - VLEN512SiFive7PipeAB:2 VLEN512SiFive7PipeA, VLEN512SiFive7PipeB42# ISF-NEXT: [4] - VLEN512SiFive7PipeB:143# ISF-NEXT: [5] - VLEN512SiFive7VA:144# ISF-NEXT: [6] - VLEN512SiFive7VCQ:145# ISF-NEXT: [7] - VLEN512SiFive7VL:146# ISF-NEXT: [8] - VLEN512SiFive7VS:147 48# ISFB: Resources:49# ISFB-NEXT: [0] - VLEN512SiFive7FDiv:150# ISFB-NEXT: [1] - VLEN512SiFive7IDiv:151# ISFB-NEXT: [2] - VLEN512SiFive7PipeA:152# ISFB-NEXT: [3] - VLEN512SiFive7PipeAB:2 VLEN512SiFive7PipeA, VLEN512SiFive7PipeB53# ISFB-NEXT: [4] - VLEN512SiFive7PipeB:154# ISFB-NEXT: [5] - VLEN512SiFive7VA:155# ISFB-NEXT: [6] - VLEN512SiFive7VCQ:156# ISFB-NEXT: [7] - VLEN512SiFive7VL:157# ISFB-NEXT: [8] - VLEN512SiFive7VS:158 59# ISFBE: Resources:60# ISFBE-NEXT: [0] - VLEN512SiFive7FDiv:161# ISFBE-NEXT: [1] - VLEN512SiFive7IDiv:162# ISFBE-NEXT: [2] - VLEN512SiFive7PipeA:163# ISFBE-NEXT: [3] - VLEN512SiFive7PipeAB:2 VLEN512SiFive7PipeA, VLEN512SiFive7PipeB64# ISFBE-NEXT: [4] - VLEN512SiFive7PipeB:165# ISFBE-NEXT: [5] - VLEN512SiFive7VA:166# ISFBE-NEXT: [6] - VLEN512SiFive7VCQ:167# ISFBE-NEXT: [7] - VLEN512SiFive7VL:168# ISFBE-NEXT: [8] - VLEN512SiFive7VS:169 70# ISFE: Resources:71# ISFE-NEXT: [0] - VLEN512SiFive7FDiv:172# ISFE-NEXT: [1] - VLEN512SiFive7IDiv:173# ISFE-NEXT: [2] - VLEN512SiFive7PipeA:174# ISFE-NEXT: [3] - VLEN512SiFive7PipeAB:2 VLEN512SiFive7PipeA, VLEN512SiFive7PipeB75# ISFE-NEXT: [4] - VLEN512SiFive7PipeB:176# ISFE-NEXT: [5] - VLEN512SiFive7VA:177# ISFE-NEXT: [6] - VLEN512SiFive7VCQ:178# ISFE-NEXT: [7] - VLEN512SiFive7VL:179# ISFE-NEXT: [8] - VLEN512SiFive7VS:180 81# ISN: Instruction Info:82# ISN-NEXT: [1]: #uOps83# ISN-NEXT: [2]: Latency84# ISN-NEXT: [3]: RThroughput85# ISN-NEXT: [4]: MayLoad86# ISN-NEXT: [5]: MayStore87# ISN-NEXT: [6]: HasSideEffects (U)88 89# ISNB: Instruction Info:90# ISNB-NEXT: [1]: #uOps91# ISNB-NEXT: [2]: Latency92# ISNB-NEXT: [3]: RThroughput93# ISNB-NEXT: [4]: MayLoad94# ISNB-NEXT: [5]: MayStore95# ISNB-NEXT: [6]: HasSideEffects (U)96# ISNB-NEXT: [7]: LoadBarrier97# ISNB-NEXT: [8]: StoreBarrier98 99# ISNBE: Instruction Info:100# ISNBE-NEXT: [1]: #uOps101# ISNBE-NEXT: [2]: Latency102# ISNBE-NEXT: [3]: RThroughput103# ISNBE-NEXT: [4]: MayLoad104# ISNBE-NEXT: [5]: MayStore105# ISNBE-NEXT: [6]: HasSideEffects (U)106# ISNBE-NEXT: [7]: LoadBarrier107# ISNBE-NEXT: [8]: StoreBarrier108# ISNBE-NEXT: [9]: Encoding Size109 110# ISNE: Instruction Info:111# ISNE-NEXT: [1]: #uOps112# ISNE-NEXT: [2]: Latency113# ISNE-NEXT: [3]: RThroughput114# ISNE-NEXT: [4]: MayLoad115# ISNE-NEXT: [5]: MayStore116# ISNE-NEXT: [6]: HasSideEffects (U)117# ISNE-NEXT: [7]: Encoding Size118 119# NISB: Dispatch Width: 2120# NISB-NEXT: uOps Per Cycle: 0.50121# NISB-NEXT: IPC: 0.50122# NISB-NEXT: Block RThroughput: 3.0123 124# NISBE: Dispatch Width: 2125# NISBE-NEXT: uOps Per Cycle: 0.50126# NISBE-NEXT: IPC: 0.50127# NISBE-NEXT: Block RThroughput: 3.0128 129# NISE: Dispatch Width: 2130# NISE-NEXT: uOps Per Cycle: 0.50131# NISE-NEXT: IPC: 0.50132# NISE-NEXT: Block RThroughput: 3.0133 134# ISF: Instruction Info:135# ISF-NEXT: [1]: #uOps136# ISF-NEXT: [2]: Latency137# ISF-NEXT: [3]: RThroughput138# ISF-NEXT: [4]: MayLoad139# ISF-NEXT: [5]: MayStore140# ISF-NEXT: [6]: HasSideEffects (U)141# ISF-NEXT: [7]: Bypass Latency142# ISF-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])143# ISF-NEXT: [9]: LLVM Opcode Name144 145# ISFB: Instruction Info:146# ISFB-NEXT: [1]: #uOps147# ISFB-NEXT: [2]: Latency148# ISFB-NEXT: [3]: RThroughput149# ISFB-NEXT: [4]: MayLoad150# ISFB-NEXT: [5]: MayStore151# ISFB-NEXT: [6]: HasSideEffects (U)152# ISFB-NEXT: [7]: Bypass Latency153# ISFB-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])154# ISFB-NEXT: [9]: LLVM Opcode Name155# ISFB-NEXT: [10]: LoadBarrier156# ISFB-NEXT: [11]: StoreBarrier157 158# ISFBE: Instruction Info:159# ISFBE-NEXT: [1]: #uOps160# ISFBE-NEXT: [2]: Latency161# ISFBE-NEXT: [3]: RThroughput162# ISFBE-NEXT: [4]: MayLoad163# ISFBE-NEXT: [5]: MayStore164# ISFBE-NEXT: [6]: HasSideEffects (U)165# ISFBE-NEXT: [7]: Bypass Latency166# ISFBE-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])167# ISFBE-NEXT: [9]: LLVM Opcode Name168# ISFBE-NEXT: [10]: LoadBarrier169# ISFBE-NEXT: [11]: StoreBarrier170# ISFBE-NEXT: [12]: Encoding Size171 172# ISFE: Instruction Info:173# ISFE-NEXT: [1]: #uOps174# ISFE-NEXT: [2]: Latency175# ISFE-NEXT: [3]: RThroughput176# ISFE-NEXT: [4]: MayLoad177# ISFE-NEXT: [5]: MayStore178# ISFE-NEXT: [6]: HasSideEffects (U)179# ISFE-NEXT: [7]: Bypass Latency180# ISFE-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])181# ISFE-NEXT: [9]: LLVM Opcode Name182# ISFE-NEXT: [10]: Encoding Size183 184# ISN: [1] [2] [3] [4] [5] [6] Instructions:185# ISN-NEXT: 1 3 1.00 U vsetvli a3, a2, e16, m1, tu, mu186# ISN-NEXT: 1 4 2.00 * vlm.v v4, (a1)187 188# NISB: Instruction Info:189# NISB-NEXT: [1]: #uOps190# NISB-NEXT: [2]: Latency191# NISB-NEXT: [3]: RThroughput192# NISB-NEXT: [4]: MayLoad193# NISB-NEXT: [5]: MayStore194# NISB-NEXT: [6]: HasSideEffects (U)195# NISB-NEXT: [7]: LoadBarrier196# NISB-NEXT: [8]: StoreBarrier197 198# NISBE: Instruction Info:199# NISBE-NEXT: [1]: #uOps200# NISBE-NEXT: [2]: Latency201# NISBE-NEXT: [3]: RThroughput202# NISBE-NEXT: [4]: MayLoad203# NISBE-NEXT: [5]: MayStore204# NISBE-NEXT: [6]: HasSideEffects (U)205# NISBE-NEXT: [7]: LoadBarrier206# NISBE-NEXT: [8]: StoreBarrier207# NISBE-NEXT: [9]: Encoding Size208 209# NISE: Instruction Info:210# NISE-NEXT: [1]: #uOps211# NISE-NEXT: [2]: Latency212# NISE-NEXT: [3]: RThroughput213# NISE-NEXT: [4]: MayLoad214# NISE-NEXT: [5]: MayStore215# NISE-NEXT: [6]: HasSideEffects (U)216# NISE-NEXT: [7]: Encoding Size217 218# ISF: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:219# ISF-NEXT: 1 3 1.00 U 1 VLEN512SiFive7PipeA,VLEN512SiFive7PipeAB VSETVLI vsetvli a3, a2, e16, m1, tu, mu // Comment220# ISF-NEXT: 1 4 2.00 * 4 VLEN512SiFive7VCQ,VLEN512SiFive7VL[1,3] VLM_V vlm.v v4, (a1)221 222# ISFB: [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] Instructions:223# ISFB-NEXT: 1 3 1.00 U 1 VLEN512SiFive7PipeA,VLEN512SiFive7PipeAB VSETVLI vsetvli a3, a2, e16, m1, tu, mu // Comment224# ISFB-NEXT: 1 4 2.00 * 4 VLEN512SiFive7VCQ,VLEN512SiFive7VL[1,3] VLM_V vlm.v v4, (a1)225 226# ISFBE: [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Encodings: Instructions:227# ISFBE-NEXT: 1 3 1.00 U 1 VLEN512SiFive7PipeA,VLEN512SiFive7PipeAB VSETVLI 4 d7 76 86 00 vsetvli a3, a2, e16, m1, tu, mu // Comment228# ISFBE-NEXT: 1 4 2.00 * 4 VLEN512SiFive7VCQ,VLEN512SiFive7VL[1,3] VLM_V 4 07 82 b5 02 vlm.v v4, (a1)229 230# ISFE: [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] Encodings: Instructions:231# ISFE-NEXT: 1 3 1.00 U 1 VLEN512SiFive7PipeA,VLEN512SiFive7PipeAB VSETVLI 4 d7 76 86 00 vsetvli a3, a2, e16, m1, tu, mu // Comment232# ISFE-NEXT: 1 4 2.00 * 4 VLEN512SiFive7VCQ,VLEN512SiFive7VL[1,3] VLM_V 4 07 82 b5 02 vlm.v v4, (a1)233 234# ISNB: [1] [2] [3] [4] [5] [6] [7] [8] Instructions:235# ISNB-NEXT: 1 3 1.00 U vsetvli a3, a2, e16, m1, tu, mu236# ISNB-NEXT: 1 4 2.00 * vlm.v v4, (a1)237 238# ISNBE: [1] [2] [3] [4] [5] [6] [7] [8] [9] Encodings: Instructions:239# ISNBE-NEXT: 1 3 1.00 U 4 d7 76 86 00 vsetvli a3, a2, e16, m1, tu, mu240# ISNBE-NEXT: 1 4 2.00 * 4 07 82 b5 02 vlm.v v4, (a1)241 242# ISNE: [1] [2] [3] [4] [5] [6] [7] Encodings: Instructions:243# ISNE-NEXT: 1 3 1.00 U 4 d7 76 86 00 vsetvli a3, a2, e16, m1, tu, mu244# ISNE-NEXT: 1 4 2.00 * 4 07 82 b5 02 vlm.v v4, (a1)245 246# NISB: [1] [2] [3] [4] [5] [6] [7] [8] Instructions:247# NISB-NEXT: 1 3 1.00 U vsetvli a3, a2, e16, m1, tu, mu248# NISB-NEXT: 1 4 2.00 * vlm.v v4, (a1)249 250# NISBE: [1] [2] [3] [4] [5] [6] [7] [8] [9] Encodings: Instructions:251# NISBE-NEXT: 1 3 1.00 U 4 d7 76 86 00 vsetvli a3, a2, e16, m1, tu, mu252# NISBE-NEXT: 1 4 2.00 * 4 07 82 b5 02 vlm.v v4, (a1)253 254# NISE: [1] [2] [3] [4] [5] [6] [7] Encodings: Instructions:255# NISE-NEXT: 1 3 1.00 U 4 d7 76 86 00 vsetvli a3, a2, e16, m1, tu, mu256# NISE-NEXT: 1 4 2.00 * 4 07 82 b5 02 vlm.v v4, (a1)257 258# ISN: Resources:259# ISN-NEXT: [0] - VLEN512SiFive7FDiv260# ISN-NEXT: [1] - VLEN512SiFive7IDiv261# ISN-NEXT: [2] - VLEN512SiFive7PipeA262# ISN-NEXT: [3] - VLEN512SiFive7PipeB263# ISN-NEXT: [4] - VLEN512SiFive7VA264# ISN-NEXT: [5] - VLEN512SiFive7VCQ265# ISN-NEXT: [6] - VLEN512SiFive7VL266# ISN-NEXT: [7] - VLEN512SiFive7VS267 268# ISF: Resources:269# ISF-NEXT: [0] - VLEN512SiFive7FDiv270# ISF-NEXT: [1] - VLEN512SiFive7IDiv271# ISF-NEXT: [2] - VLEN512SiFive7PipeA272# ISF-NEXT: [3] - VLEN512SiFive7PipeB273# ISF-NEXT: [4] - VLEN512SiFive7VA274# ISF-NEXT: [5] - VLEN512SiFive7VCQ275# ISF-NEXT: [6] - VLEN512SiFive7VL276# ISF-NEXT: [7] - VLEN512SiFive7VS277 278# ISFB: Resources:279# ISFB-NEXT: [0] - VLEN512SiFive7FDiv280# ISFB-NEXT: [1] - VLEN512SiFive7IDiv281# ISFB-NEXT: [2] - VLEN512SiFive7PipeA282# ISFB-NEXT: [3] - VLEN512SiFive7PipeB283# ISFB-NEXT: [4] - VLEN512SiFive7VA284# ISFB-NEXT: [5] - VLEN512SiFive7VCQ285# ISFB-NEXT: [6] - VLEN512SiFive7VL286# ISFB-NEXT: [7] - VLEN512SiFive7VS287 288# ISFBE: Resources:289# ISFBE-NEXT: [0] - VLEN512SiFive7FDiv290# ISFBE-NEXT: [1] - VLEN512SiFive7IDiv291# ISFBE-NEXT: [2] - VLEN512SiFive7PipeA292# ISFBE-NEXT: [3] - VLEN512SiFive7PipeB293# ISFBE-NEXT: [4] - VLEN512SiFive7VA294# ISFBE-NEXT: [5] - VLEN512SiFive7VCQ295# ISFBE-NEXT: [6] - VLEN512SiFive7VL296# ISFBE-NEXT: [7] - VLEN512SiFive7VS297 298# ISFE: Resources:299# ISFE-NEXT: [0] - VLEN512SiFive7FDiv300# ISFE-NEXT: [1] - VLEN512SiFive7IDiv301# ISFE-NEXT: [2] - VLEN512SiFive7PipeA302# ISFE-NEXT: [3] - VLEN512SiFive7PipeB303# ISFE-NEXT: [4] - VLEN512SiFive7VA304# ISFE-NEXT: [5] - VLEN512SiFive7VCQ305# ISFE-NEXT: [6] - VLEN512SiFive7VL306# ISFE-NEXT: [7] - VLEN512SiFive7VS307 308# ISNB: Resources:309# ISNB-NEXT: [0] - VLEN512SiFive7FDiv310# ISNB-NEXT: [1] - VLEN512SiFive7IDiv311# ISNB-NEXT: [2] - VLEN512SiFive7PipeA312# ISNB-NEXT: [3] - VLEN512SiFive7PipeB313# ISNB-NEXT: [4] - VLEN512SiFive7VA314# ISNB-NEXT: [5] - VLEN512SiFive7VCQ315# ISNB-NEXT: [6] - VLEN512SiFive7VL316# ISNB-NEXT: [7] - VLEN512SiFive7VS317 318# ISNBE: Resources:319# ISNBE-NEXT: [0] - VLEN512SiFive7FDiv320# ISNBE-NEXT: [1] - VLEN512SiFive7IDiv321# ISNBE-NEXT: [2] - VLEN512SiFive7PipeA322# ISNBE-NEXT: [3] - VLEN512SiFive7PipeB323# ISNBE-NEXT: [4] - VLEN512SiFive7VA324# ISNBE-NEXT: [5] - VLEN512SiFive7VCQ325# ISNBE-NEXT: [6] - VLEN512SiFive7VL326# ISNBE-NEXT: [7] - VLEN512SiFive7VS327 328# ISNE: Resources:329# ISNE-NEXT: [0] - VLEN512SiFive7FDiv330# ISNE-NEXT: [1] - VLEN512SiFive7IDiv331# ISNE-NEXT: [2] - VLEN512SiFive7PipeA332# ISNE-NEXT: [3] - VLEN512SiFive7PipeB333# ISNE-NEXT: [4] - VLEN512SiFive7VA334# ISNE-NEXT: [5] - VLEN512SiFive7VCQ335# ISNE-NEXT: [6] - VLEN512SiFive7VL336# ISNE-NEXT: [7] - VLEN512SiFive7VS337 338# NISB: Resources:339# NISB-NEXT: [0] - VLEN512SiFive7FDiv340# NISB-NEXT: [1] - VLEN512SiFive7IDiv341# NISB-NEXT: [2] - VLEN512SiFive7PipeA342# NISB-NEXT: [3] - VLEN512SiFive7PipeB343# NISB-NEXT: [4] - VLEN512SiFive7VA344# NISB-NEXT: [5] - VLEN512SiFive7VCQ345# NISB-NEXT: [6] - VLEN512SiFive7VL346# NISB-NEXT: [7] - VLEN512SiFive7VS347 348# NISBE: Resources:349# NISBE-NEXT: [0] - VLEN512SiFive7FDiv350# NISBE-NEXT: [1] - VLEN512SiFive7IDiv351# NISBE-NEXT: [2] - VLEN512SiFive7PipeA352# NISBE-NEXT: [3] - VLEN512SiFive7PipeB353# NISBE-NEXT: [4] - VLEN512SiFive7VA354# NISBE-NEXT: [5] - VLEN512SiFive7VCQ355# NISBE-NEXT: [6] - VLEN512SiFive7VL356# NISBE-NEXT: [7] - VLEN512SiFive7VS357 358# NISE: Resources:359# NISE-NEXT: [0] - VLEN512SiFive7FDiv360# NISE-NEXT: [1] - VLEN512SiFive7IDiv361# NISE-NEXT: [2] - VLEN512SiFive7PipeA362# NISE-NEXT: [3] - VLEN512SiFive7PipeB363# NISE-NEXT: [4] - VLEN512SiFive7VA364# NISE-NEXT: [5] - VLEN512SiFive7VCQ365# NISE-NEXT: [6] - VLEN512SiFive7VL366# NISE-NEXT: [7] - VLEN512SiFive7VS367 368# ISN: Resource pressure per iteration:369# ISN-NEXT: [0] [1] [2] [3] [4] [5] [6] [7]370# ISN-NEXT: - - 1.00 - - 1.00 3.00 -371 372# ISF: Resource pressure per iteration:373# ISF-NEXT: [0] [1] [2] [3] [4] [5] [6] [7]374# ISF-NEXT: - - 1.00 - - 1.00 3.00 -375 376# ISFB: Resource pressure per iteration:377# ISFB-NEXT: [0] [1] [2] [3] [4] [5] [6] [7]378# ISFB-NEXT: - - 1.00 - - 1.00 3.00 -379 380# ISFBE: Resource pressure per iteration:381# ISFBE-NEXT: [0] [1] [2] [3] [4] [5] [6] [7]382# ISFBE-NEXT: - - 1.00 - - 1.00 3.00 -383 384# ISFE: Resource pressure per iteration:385# ISFE-NEXT: [0] [1] [2] [3] [4] [5] [6] [7]386# ISFE-NEXT: - - 1.00 - - 1.00 3.00 -387 388# ISNB: Resource pressure per iteration:389# ISNB-NEXT: [0] [1] [2] [3] [4] [5] [6] [7]390# ISNB-NEXT: - - 1.00 - - 1.00 3.00 -391 392# ISNBE: Resource pressure per iteration:393# ISNBE-NEXT: [0] [1] [2] [3] [4] [5] [6] [7]394# ISNBE-NEXT: - - 1.00 - - 1.00 3.00 -395 396# ISNE: Resource pressure per iteration:397# ISNE-NEXT: [0] [1] [2] [3] [4] [5] [6] [7]398# ISNE-NEXT: - - 1.00 - - 1.00 3.00 -399 400# NISB: Resource pressure per iteration:401# NISB-NEXT: [0] [1] [2] [3] [4] [5] [6] [7]402# NISB-NEXT: - - 1.00 - - 1.00 3.00 -403 404# NISBE: Resource pressure per iteration:405# NISBE-NEXT: [0] [1] [2] [3] [4] [5] [6] [7]406# NISBE-NEXT: - - 1.00 - - 1.00 3.00 -407 408# NISE: Resource pressure per iteration:409# NISE-NEXT: [0] [1] [2] [3] [4] [5] [6] [7]410# NISE-NEXT: - - 1.00 - - 1.00 3.00 -411 412# ALL: Resource pressure by instruction:413# ALL-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] Instructions:414# ALL-NEXT: - - 1.00 - - - - - vsetvli a3, a2, e16, m1, tu, mu415# ALL-NEXT: - - - - - 1.00 3.00 - vlm.v v4, (a1)416