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1 2# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py3# RUN: llvm-mca -mtriple=riscv64 -mcpu=sifive-p470 -iterations=1 < %s | FileCheck %s4 5# These instructions only support e326 7vsetvli zero, zero, e32, mf2, tu, mu8vsm4k.vi v4, v8, 89vsm4r.vv v4, v810vsm4r.vs v4, v811 12vsetvli zero, zero, e32, m1, tu, mu13vsm4k.vi v4, v8, 814vsm4r.vv v4, v815vsm4r.vs v4, v816 17vsetvli zero, zero, e32, m2, tu, mu18vsm4k.vi v4, v8, 819vsm4r.vv v4, v820vsm4r.vs v4, v821 22vsetvli zero, zero, e32, m4, tu, mu23vsm4k.vi v4, v8, 824vsm4r.vv v4, v825vsm4r.vs v4, v826 27vsetvli zero, zero, e32, m8, tu, mu28vsm4k.vi v8, v16, 829vsm4r.vv v8, v1630vsm4r.vs v8, v1631 32# CHECK: Iterations: 133# CHECK-NEXT: Instructions: 2034# CHECK-NEXT: Total Cycles: 4735# CHECK-NEXT: Total uOps: 2036 37# CHECK: Dispatch Width: 338# CHECK-NEXT: uOps Per Cycle: 0.4339# CHECK-NEXT: IPC: 0.4340# CHECK-NEXT: Block RThroughput: 48.041 42# CHECK: Instruction Info:43# CHECK-NEXT: [1]: #uOps44# CHECK-NEXT: [2]: Latency45# CHECK-NEXT: [3]: RThroughput46# CHECK-NEXT: [4]: MayLoad47# CHECK-NEXT: [5]: MayStore48# CHECK-NEXT: [6]: HasSideEffects (U)49 50# CHECK: [1] [2] [3] [4] [5] [6] Instructions:51# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, mf2, tu, mu52# CHECK-NEXT: 1 3 1.00 vsm4k.vi v4, v8, 853# CHECK-NEXT: 1 3 1.00 vsm4r.vv v4, v854# CHECK-NEXT: 1 3 1.00 vsm4r.vs v4, v855# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m1, tu, mu56# CHECK-NEXT: 1 3 1.00 vsm4k.vi v4, v8, 857# CHECK-NEXT: 1 3 1.00 vsm4r.vv v4, v858# CHECK-NEXT: 1 3 1.00 vsm4r.vs v4, v859# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m2, tu, mu60# CHECK-NEXT: 1 3 2.00 vsm4k.vi v4, v8, 861# CHECK-NEXT: 1 3 2.00 vsm4r.vv v4, v862# CHECK-NEXT: 1 3 2.00 vsm4r.vs v4, v863# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m4, tu, mu64# CHECK-NEXT: 1 3 4.00 vsm4k.vi v4, v8, 865# CHECK-NEXT: 1 3 4.00 vsm4r.vv v4, v866# CHECK-NEXT: 1 3 4.00 vsm4r.vs v4, v867# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m8, tu, mu68# CHECK-NEXT: 1 3 8.00 vsm4k.vi v8, v16, 869# CHECK-NEXT: 1 3 8.00 vsm4r.vv v8, v1670# CHECK-NEXT: 1 3 8.00 vsm4r.vs v8, v1671 72# CHECK: Resources:73# CHECK-NEXT: [0] - SiFiveP400Div74# CHECK-NEXT: [1] - SiFiveP400FEXQ075# CHECK-NEXT: [2] - SiFiveP400FloatDiv76# CHECK-NEXT: [3] - SiFiveP400IEXQ077# CHECK-NEXT: [4] - SiFiveP400IEXQ178# CHECK-NEXT: [5] - SiFiveP400IEXQ279# CHECK-NEXT: [6] - SiFiveP400Load80# CHECK-NEXT: [7] - SiFiveP400Store81# CHECK-NEXT: [8] - SiFiveP400VDiv82# CHECK-NEXT: [9] - SiFiveP400VEXQ083# CHECK-NEXT: [10] - SiFiveP400VFloatDiv84# CHECK-NEXT: [11] - SiFiveP400VLD85# CHECK-NEXT: [12] - SiFiveP400VST86 87# CHECK: Resource pressure per iteration:88# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]89# CHECK-NEXT: - - - - 5.00 - - - - 48.00 - - -90 91# CHECK: Resource pressure by instruction:92# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:93# CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e32, mf2, tu, mu94# CHECK-NEXT: - - - - - - - - - 1.00 - - - vsm4k.vi v4, v8, 895# CHECK-NEXT: - - - - - - - - - 1.00 - - - vsm4r.vv v4, v896# CHECK-NEXT: - - - - - - - - - 1.00 - - - vsm4r.vs v4, v897# CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e32, m1, tu, mu98# CHECK-NEXT: - - - - - - - - - 1.00 - - - vsm4k.vi v4, v8, 899# CHECK-NEXT: - - - - - - - - - 1.00 - - - vsm4r.vv v4, v8100# CHECK-NEXT: - - - - - - - - - 1.00 - - - vsm4r.vs v4, v8101# CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e32, m2, tu, mu102# CHECK-NEXT: - - - - - - - - - 2.00 - - - vsm4k.vi v4, v8, 8103# CHECK-NEXT: - - - - - - - - - 2.00 - - - vsm4r.vv v4, v8104# CHECK-NEXT: - - - - - - - - - 2.00 - - - vsm4r.vs v4, v8105# CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e32, m4, tu, mu106# CHECK-NEXT: - - - - - - - - - 4.00 - - - vsm4k.vi v4, v8, 8107# CHECK-NEXT: - - - - - - - - - 4.00 - - - vsm4r.vv v4, v8108# CHECK-NEXT: - - - - - - - - - 4.00 - - - vsm4r.vs v4, v8109# CHECK-NEXT: - - - - 1.00 - - - - - - - - vsetvli zero, zero, e32, m8, tu, mu110# CHECK-NEXT: - - - - - - - - - 8.00 - - - vsm4k.vi v8, v16, 8111# CHECK-NEXT: - - - - - - - - - 8.00 - - - vsm4r.vv v8, v16112# CHECK-NEXT: - - - - - - - - - 8.00 - - - vsm4r.vs v8, v16113 114