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1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py2# RUN: llvm-mca -mtriple=riscv64 -mcpu=sifive-p870 -iterations=1 -instruction-tables=full < %s | FileCheck %s3 4vsetvli zero, zero, e8, mf8, tu, mu5vdiv.vv v8, v16, v246vsetvli zero, zero, e8, mf4, tu, mu7vdiv.vv v8, v16, v248vsetvli zero, zero, e8, mf2, tu, mu9vdiv.vv v8, v16, v2410vsetvli zero, zero, e8, m1, tu, mu11vdiv.vv v8, v16, v2412vsetvli zero, zero, e8, m1, tu, mu13vdiv.vv v8, v16, v2414vsetvli zero, zero, e8, m2, tu, mu15vdiv.vv v8, v16, v2416vsetvli zero, zero, e8, m4, tu, mu17vdiv.vv v8, v16, v2418vsetvli zero, zero, e8, m8, tu, mu19vdiv.vv v8, v16, v2420vsetvli zero, zero, e16, mf4, tu, mu21vdiv.vv v8, v16, v2422vsetvli zero, zero, e16, mf2, tu, mu23vdiv.vv v8, v16, v2424vsetvli zero, zero, e16, m1, tu, mu25vdiv.vv v8, v16, v2426vsetvli zero, zero, e16, m1, tu, mu27vdiv.vv v8, v16, v2428vsetvli zero, zero, e16, m2, tu, mu29vdiv.vv v8, v16, v2430vsetvli zero, zero, e16, m4, tu, mu31vdiv.vv v8, v16, v2432vsetvli zero, zero, e16, m8, tu, mu33vdiv.vv v8, v16, v2434vsetvli zero, zero, e32, mf2, tu, mu35vdiv.vv v8, v16, v2436vsetvli zero, zero, e32, m1, tu, mu37vdiv.vv v8, v16, v2438vsetvli zero, zero, e32, m1, tu, mu39vdiv.vv v8, v16, v2440vsetvli zero, zero, e32, m2, tu, mu41vdiv.vv v8, v16, v2442vsetvli zero, zero, e32, m4, tu, mu43vdiv.vv v8, v16, v2444vsetvli zero, zero, e32, m8, tu, mu45vdiv.vv v8, v16, v2446vsetvli zero, zero, e64, m1, tu, mu47vdiv.vv v8, v16, v2448vsetvli zero, zero, e64, m1, tu, mu49vdiv.vv v8, v16, v2450vsetvli zero, zero, e64, m2, tu, mu51vdiv.vv v8, v16, v2452vsetvli zero, zero, e64, m4, tu, mu53vdiv.vv v8, v16, v2454vsetvli zero, zero, e64, m8, tu, mu55vdiv.vv v8, v16, v2456 57vsetvli zero, zero, e8, mf8, tu, mu58vdiv.vx v8, v16, a059vsetvli zero, zero, e8, mf4, tu, mu60vdiv.vx v8, v16, a061vsetvli zero, zero, e8, mf2, tu, mu62vdiv.vx v8, v16, a063vsetvli zero, zero, e8, m1, tu, mu64vdiv.vx v8, v16, a065vsetvli zero, zero, e8, m1, tu, mu66vdiv.vx v8, v16, a067vsetvli zero, zero, e8, m2, tu, mu68vdiv.vx v8, v16, a069vsetvli zero, zero, e8, m4, tu, mu70vdiv.vx v8, v16, a071vsetvli zero, zero, e8, m8, tu, mu72vdiv.vx v8, v16, a073vsetvli zero, zero, e16, mf4, tu, mu74vdiv.vx v8, v16, a075vsetvli zero, zero, e16, mf2, tu, mu76vdiv.vx v8, v16, a077vsetvli zero, zero, e16, m1, tu, mu78vdiv.vx v8, v16, a079vsetvli zero, zero, e16, m1, tu, mu80vdiv.vx v8, v16, a081vsetvli zero, zero, e16, m2, tu, mu82vdiv.vx v8, v16, a083vsetvli zero, zero, e16, m4, tu, mu84vdiv.vx v8, v16, a085vsetvli zero, zero, e16, m8, tu, mu86vdiv.vx v8, v16, a087vsetvli zero, zero, e32, mf2, tu, mu88vdiv.vx v8, v16, a089vsetvli zero, zero, e32, m1, tu, mu90vdiv.vx v8, v16, a091vsetvli zero, zero, e32, m1, tu, mu92vdiv.vx v8, v16, a093vsetvli zero, zero, e32, m2, tu, mu94vdiv.vx v8, v16, a095vsetvli zero, zero, e32, m4, tu, mu96vdiv.vx v8, v16, a097vsetvli zero, zero, e32, m8, tu, mu98vdiv.vx v8, v16, a099vsetvli zero, zero, e64, m1, tu, mu100vdiv.vx v8, v16, a0101vsetvli zero, zero, e64, m1, tu, mu102vdiv.vx v8, v16, a0103vsetvli zero, zero, e64, m2, tu, mu104vdiv.vx v8, v16, a0105vsetvli zero, zero, e64, m4, tu, mu106vdiv.vx v8, v16, a0107vsetvli zero, zero, e64, m8, tu, mu108vdiv.vx v8, v16, a0109 110vsetvli zero, zero, e8, mf8, tu, mu111vfdiv.vv v8, v16, v24112vsetvli zero, zero, e8, mf4, tu, mu113vfdiv.vv v8, v16, v24114vsetvli zero, zero, e8, mf2, tu, mu115vfdiv.vv v8, v16, v24116vsetvli zero, zero, e8, m1, tu, mu117vfdiv.vv v8, v16, v24118vsetvli zero, zero, e8, m1, tu, mu119vfdiv.vv v8, v16, v24120vsetvli zero, zero, e8, m2, tu, mu121vfdiv.vv v8, v16, v24122vsetvli zero, zero, e8, m4, tu, mu123vfdiv.vv v8, v16, v24124vsetvli zero, zero, e8, m8, tu, mu125vfdiv.vv v8, v16, v24126vsetvli zero, zero, e16, mf4, tu, mu127vfdiv.vv v8, v16, v24128vsetvli zero, zero, e16, mf2, tu, mu129vfdiv.vv v8, v16, v24130vsetvli zero, zero, e16, m1, tu, mu131vfdiv.vv v8, v16, v24132vsetvli zero, zero, e16, m1, tu, mu133vfdiv.vv v8, v16, v24134vsetvli zero, zero, e16, m2, tu, mu135vfdiv.vv v8, v16, v24136vsetvli zero, zero, e16, m4, tu, mu137vfdiv.vv v8, v16, v24138vsetvli zero, zero, e16, m8, tu, mu139vfdiv.vv v8, v16, v24140vsetvli zero, zero, e32, mf2, tu, mu141vfdiv.vv v8, v16, v24142vsetvli zero, zero, e32, m1, tu, mu143vfdiv.vv v8, v16, v24144vsetvli zero, zero, e32, m1, tu, mu145vfdiv.vv v8, v16, v24146vsetvli zero, zero, e32, m2, tu, mu147vfdiv.vv v8, v16, v24148vsetvli zero, zero, e32, m4, tu, mu149vfdiv.vv v8, v16, v24150vsetvli zero, zero, e32, m8, tu, mu151vfdiv.vv v8, v16, v24152vsetvli zero, zero, e64, m1, tu, mu153vfdiv.vv v8, v16, v24154vsetvli zero, zero, e64, m1, tu, mu155vfdiv.vv v8, v16, v24156vsetvli zero, zero, e64, m2, tu, mu157vfdiv.vv v8, v16, v24158vsetvli zero, zero, e64, m4, tu, mu159vfdiv.vv v8, v16, v24160vsetvli zero, zero, e64, m8, tu, mu161vfdiv.vv v8, v16, v24162 163vsetvli zero, zero, e8, mf8, tu, mu164vfdiv.vf v8, v16, fa0165vsetvli zero, zero, e8, mf4, tu, mu166vfdiv.vf v8, v16, fa0167vsetvli zero, zero, e8, mf2, tu, mu168vfdiv.vf v8, v16, fa0169vsetvli zero, zero, e8, m1, tu, mu170vfdiv.vf v8, v16, fa0171vsetvli zero, zero, e8, m1, tu, mu172vfdiv.vf v8, v16, fa0173vsetvli zero, zero, e8, m2, tu, mu174vfdiv.vf v8, v16, fa0175vsetvli zero, zero, e8, m4, tu, mu176vfdiv.vf v8, v16, fa0177vsetvli zero, zero, e8, m8, tu, mu178vfdiv.vf v8, v16, fa0179vsetvli zero, zero, e16, mf4, tu, mu180vfdiv.vf v8, v16, fa0181vsetvli zero, zero, e16, mf2, tu, mu182vfdiv.vf v8, v16, fa0183vsetvli zero, zero, e16, m1, tu, mu184vfdiv.vf v8, v16, fa0185vsetvli zero, zero, e16, m1, tu, mu186vfdiv.vf v8, v16, fa0187vsetvli zero, zero, e16, m2, tu, mu188vfdiv.vf v8, v16, fa0189vsetvli zero, zero, e16, m4, tu, mu190vfdiv.vf v8, v16, fa0191vsetvli zero, zero, e16, m8, tu, mu192vfdiv.vf v8, v16, fa0193vsetvli zero, zero, e32, mf2, tu, mu194vfdiv.vf v8, v16, fa0195vsetvli zero, zero, e32, m1, tu, mu196vfdiv.vf v8, v16, fa0197vsetvli zero, zero, e32, m1, tu, mu198vfdiv.vf v8, v16, fa0199vsetvli zero, zero, e32, m2, tu, mu200vfdiv.vf v8, v16, fa0201vsetvli zero, zero, e32, m4, tu, mu202vfdiv.vf v8, v16, fa0203vsetvli zero, zero, e32, m8, tu, mu204vfdiv.vf v8, v16, fa0205vsetvli zero, zero, e64, m1, tu, mu206vfdiv.vf v8, v16, fa0207vsetvli zero, zero, e64, m1, tu, mu208vfdiv.vf v8, v16, fa0209vsetvli zero, zero, e64, m2, tu, mu210vfdiv.vf v8, v16, fa0211vsetvli zero, zero, e64, m4, tu, mu212vfdiv.vf v8, v16, fa0213vsetvli zero, zero, e64, m8, tu, mu214vfdiv.vf v8, v16, fa0215 216vsetvli zero, zero, e8, mf8, tu, mu217vfsqrt.v v8, v16218vsetvli zero, zero, e8, mf4, tu, mu219vfsqrt.v v8, v16220vsetvli zero, zero, e8, mf2, tu, mu221vfsqrt.v v8, v16222vsetvli zero, zero, e8, m1, tu, mu223vfsqrt.v v8, v16224vsetvli zero, zero, e8, m1, tu, mu225vfsqrt.v v8, v16226vsetvli zero, zero, e8, m2, tu, mu227vfsqrt.v v8, v16228vsetvli zero, zero, e8, m4, tu, mu229vfsqrt.v v8, v16230vsetvli zero, zero, e8, m8, tu, mu231vfsqrt.v v8, v16232vsetvli zero, zero, e16, mf4, tu, mu233vfsqrt.v v8, v16234vsetvli zero, zero, e16, mf2, tu, mu235vfsqrt.v v8, v16236vsetvli zero, zero, e16, m1, tu, mu237vfsqrt.v v8, v16238vsetvli zero, zero, e16, m1, tu, mu239vfsqrt.v v8, v16240vsetvli zero, zero, e16, m2, tu, mu241vfsqrt.v v8, v16242vsetvli zero, zero, e16, m4, tu, mu243vfsqrt.v v8, v16244vsetvli zero, zero, e16, m8, tu, mu245vfsqrt.v v8, v16246vsetvli zero, zero, e32, mf2, tu, mu247vfsqrt.v v8, v16248vsetvli zero, zero, e32, m1, tu, mu249vfsqrt.v v8, v16250vsetvli zero, zero, e32, m1, tu, mu251vfsqrt.v v8, v16252vsetvli zero, zero, e32, m2, tu, mu253vfsqrt.v v8, v16254vsetvli zero, zero, e32, m4, tu, mu255vfsqrt.v v8, v16256vsetvli zero, zero, e32, m8, tu, mu257vfsqrt.v v8, v16258vsetvli zero, zero, e64, m1, tu, mu259vfsqrt.v v8, v16260vsetvli zero, zero, e64, m1, tu, mu261vfsqrt.v v8, v16262vsetvli zero, zero, e64, m2, tu, mu263vfsqrt.v v8, v16264vsetvli zero, zero, e64, m4, tu, mu265vfsqrt.v v8, v16266vsetvli zero, zero, e64, m8, tu, mu267vfsqrt.v v8, v16268 269# CHECK: Resources:270# CHECK-NEXT: [0] - SiFiveP800Branch:2 SiFiveP800IEXQ4, SiFiveP800IEXQ5271# CHECK-NEXT: [1] - SiFiveP800Div:1272# CHECK-NEXT: [2] - SiFiveP800FEXQ0:1273# CHECK-NEXT: [3] - SiFiveP800FEXQ1:1274# CHECK-NEXT: [4] - SiFiveP800FloatArith:2 SiFiveP800FEXQ0, SiFiveP800FEXQ1275# CHECK-NEXT: [5] - SiFiveP800FloatDiv:1276# CHECK-NEXT: [6] - SiFiveP800IEXQ0:1277# CHECK-NEXT: [7] - SiFiveP800IEXQ1:1278# CHECK-NEXT: [8] - SiFiveP800IEXQ2:1279# CHECK-NEXT: [9] - SiFiveP800IEXQ3:1280# CHECK-NEXT: [10] - SiFiveP800IEXQ4:1281# CHECK-NEXT: [11] - SiFiveP800IEXQ5:1282# CHECK-NEXT: [12] - SiFiveP800IntArith:4 SiFiveP800IEXQ0, SiFiveP800IEXQ1, SiFiveP800IEXQ2, SiFiveP800IEXQ3283# CHECK-NEXT: [13] - SiFiveP800LD:1284# CHECK-NEXT: [14] - SiFiveP800LDST:2285# CHECK-NEXT: [15] - SiFiveP800Load:3 SiFiveP800LDST, SiFiveP800LDST, SiFiveP800LD286# CHECK-NEXT: [16] - SiFiveP800Mul:2 SiFiveP800IEXQ1, SiFiveP800IEXQ3287# CHECK-NEXT: [17] - SiFiveP800VDiv:1288# CHECK-NEXT: [18] - SiFiveP800VEXQ0:1289# CHECK-NEXT: [19] - SiFiveP800VEXQ1:1290# CHECK-NEXT: [20] - SiFiveP800VFloatDiv:1291# CHECK-NEXT: [21] - SiFiveP800VLD:1292# CHECK-NEXT: [22] - SiFiveP800VST:1293# CHECK-NEXT: [23] - SiFiveP800VectorArith:2 SiFiveP800VEXQ0, SiFiveP800VEXQ1294 295# CHECK: Instruction Info:296# CHECK-NEXT: [1]: #uOps297# CHECK-NEXT: [2]: Latency298# CHECK-NEXT: [3]: RThroughput299# CHECK-NEXT: [4]: MayLoad300# CHECK-NEXT: [5]: MayStore301# CHECK-NEXT: [6]: HasSideEffects (U)302# CHECK-NEXT: [7]: Bypass Latency303# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])304# CHECK-NEXT: [9]: LLVM Opcode Name305 306# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:307# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf8, tu, mu308# CHECK-NEXT: 1 51 51.00 51 SiFiveP800VDiv[51],SiFiveP800VEXQ1,SiFiveP800VectorArith VDIV_VV vdiv.vv v8, v16, v24309# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf4, tu, mu310# CHECK-NEXT: 1 51 51.00 51 SiFiveP800VDiv[51],SiFiveP800VEXQ1,SiFiveP800VectorArith VDIV_VV vdiv.vv v8, v16, v24311# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf2, tu, mu312# CHECK-NEXT: 1 51 51.00 51 SiFiveP800VDiv[51],SiFiveP800VEXQ1,SiFiveP800VectorArith VDIV_VV vdiv.vv v8, v16, v24313# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m1, tu, mu314# CHECK-NEXT: 1 51 51.00 51 SiFiveP800VDiv[51],SiFiveP800VEXQ1,SiFiveP800VectorArith VDIV_VV vdiv.vv v8, v16, v24315# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m1, tu, mu316# CHECK-NEXT: 1 51 51.00 51 SiFiveP800VDiv[51],SiFiveP800VEXQ1,SiFiveP800VectorArith VDIV_VV vdiv.vv v8, v16, v24317# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m2, tu, mu318# CHECK-NEXT: 1 102 102.00 102 SiFiveP800VDiv[102],SiFiveP800VEXQ1[2],SiFiveP800VectorArith[2] VDIV_VV vdiv.vv v8, v16, v24319# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m4, tu, mu320# CHECK-NEXT: 1 204 204.00 204 SiFiveP800VDiv[204],SiFiveP800VEXQ1[4],SiFiveP800VectorArith[4] VDIV_VV vdiv.vv v8, v16, v24321# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m8, tu, mu322# CHECK-NEXT: 1 408 408.00 408 SiFiveP800VDiv[408],SiFiveP800VEXQ1[8],SiFiveP800VectorArith[8] VDIV_VV vdiv.vv v8, v16, v24323# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, mf4, tu, mu324# CHECK-NEXT: 1 45 45.00 45 SiFiveP800VDiv[45],SiFiveP800VEXQ1,SiFiveP800VectorArith VDIV_VV vdiv.vv v8, v16, v24325# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, mf2, tu, mu326# CHECK-NEXT: 1 45 45.00 45 SiFiveP800VDiv[45],SiFiveP800VEXQ1,SiFiveP800VectorArith VDIV_VV vdiv.vv v8, v16, v24327# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m1, tu, mu328# CHECK-NEXT: 1 45 45.00 45 SiFiveP800VDiv[45],SiFiveP800VEXQ1,SiFiveP800VectorArith VDIV_VV vdiv.vv v8, v16, v24329# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m1, tu, mu330# CHECK-NEXT: 1 45 45.00 45 SiFiveP800VDiv[45],SiFiveP800VEXQ1,SiFiveP800VectorArith VDIV_VV vdiv.vv v8, v16, v24331# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m2, tu, mu332# CHECK-NEXT: 1 90 90.00 90 SiFiveP800VDiv[90],SiFiveP800VEXQ1[2],SiFiveP800VectorArith[2] VDIV_VV vdiv.vv v8, v16, v24333# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m4, tu, mu334# CHECK-NEXT: 1 180 180.00 180 SiFiveP800VDiv[180],SiFiveP800VEXQ1[4],SiFiveP800VectorArith[4] VDIV_VV vdiv.vv v8, v16, v24335# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m8, tu, mu336# CHECK-NEXT: 1 360 360.00 360 SiFiveP800VDiv[360],SiFiveP800VEXQ1[8],SiFiveP800VectorArith[8] VDIV_VV vdiv.vv v8, v16, v24337# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, mf2, tu, mu338# CHECK-NEXT: 1 42 42.00 42 SiFiveP800VDiv[42],SiFiveP800VEXQ1,SiFiveP800VectorArith VDIV_VV vdiv.vv v8, v16, v24339# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m1, tu, mu340# CHECK-NEXT: 1 42 42.00 42 SiFiveP800VDiv[42],SiFiveP800VEXQ1,SiFiveP800VectorArith VDIV_VV vdiv.vv v8, v16, v24341# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m1, tu, mu342# CHECK-NEXT: 1 42 42.00 42 SiFiveP800VDiv[42],SiFiveP800VEXQ1,SiFiveP800VectorArith VDIV_VV vdiv.vv v8, v16, v24343# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m2, tu, mu344# CHECK-NEXT: 1 84 84.00 84 SiFiveP800VDiv[84],SiFiveP800VEXQ1[2],SiFiveP800VectorArith[2] VDIV_VV vdiv.vv v8, v16, v24345# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m4, tu, mu346# CHECK-NEXT: 1 168 168.00 168 SiFiveP800VDiv[168],SiFiveP800VEXQ1[4],SiFiveP800VectorArith[4] VDIV_VV vdiv.vv v8, v16, v24347# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m8, tu, mu348# CHECK-NEXT: 1 336 336.00 336 SiFiveP800VDiv[336],SiFiveP800VEXQ1[8],SiFiveP800VectorArith[8] VDIV_VV vdiv.vv v8, v16, v24349# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m1, tu, mu350# CHECK-NEXT: 1 72 72.00 72 SiFiveP800VDiv[72],SiFiveP800VEXQ1,SiFiveP800VectorArith VDIV_VV vdiv.vv v8, v16, v24351# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m1, tu, mu352# CHECK-NEXT: 1 72 72.00 72 SiFiveP800VDiv[72],SiFiveP800VEXQ1,SiFiveP800VectorArith VDIV_VV vdiv.vv v8, v16, v24353# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m2, tu, mu354# CHECK-NEXT: 1 144 144.00 144 SiFiveP800VDiv[144],SiFiveP800VEXQ1[2],SiFiveP800VectorArith[2] VDIV_VV vdiv.vv v8, v16, v24355# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m4, tu, mu356# CHECK-NEXT: 1 288 288.00 288 SiFiveP800VDiv[288],SiFiveP800VEXQ1[4],SiFiveP800VectorArith[4] VDIV_VV vdiv.vv v8, v16, v24357# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m8, tu, mu358# CHECK-NEXT: 1 576 576.00 576 SiFiveP800VDiv[576],SiFiveP800VEXQ1[8],SiFiveP800VectorArith[8] VDIV_VV vdiv.vv v8, v16, v24359# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf8, tu, mu360# CHECK-NEXT: 1 51 51.00 51 SiFiveP800VDiv[51],SiFiveP800VEXQ1,SiFiveP800VectorArith VDIV_VX vdiv.vx v8, v16, a0361# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf4, tu, mu362# CHECK-NEXT: 1 51 51.00 51 SiFiveP800VDiv[51],SiFiveP800VEXQ1,SiFiveP800VectorArith VDIV_VX vdiv.vx v8, v16, a0363# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf2, tu, mu364# CHECK-NEXT: 1 51 51.00 51 SiFiveP800VDiv[51],SiFiveP800VEXQ1,SiFiveP800VectorArith VDIV_VX vdiv.vx v8, v16, a0365# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m1, tu, mu366# CHECK-NEXT: 1 51 51.00 51 SiFiveP800VDiv[51],SiFiveP800VEXQ1,SiFiveP800VectorArith VDIV_VX vdiv.vx v8, v16, a0367# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m1, tu, mu368# CHECK-NEXT: 1 51 51.00 51 SiFiveP800VDiv[51],SiFiveP800VEXQ1,SiFiveP800VectorArith VDIV_VX vdiv.vx v8, v16, a0369# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m2, tu, mu370# CHECK-NEXT: 1 102 102.00 102 SiFiveP800VDiv[102],SiFiveP800VEXQ1[2],SiFiveP800VectorArith[2] VDIV_VX vdiv.vx v8, v16, a0371# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m4, tu, mu372# CHECK-NEXT: 1 204 204.00 204 SiFiveP800VDiv[204],SiFiveP800VEXQ1[4],SiFiveP800VectorArith[4] VDIV_VX vdiv.vx v8, v16, a0373# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m8, tu, mu374# CHECK-NEXT: 1 408 408.00 408 SiFiveP800VDiv[408],SiFiveP800VEXQ1[8],SiFiveP800VectorArith[8] VDIV_VX vdiv.vx v8, v16, a0375# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, mf4, tu, mu376# CHECK-NEXT: 1 45 45.00 45 SiFiveP800VDiv[45],SiFiveP800VEXQ1,SiFiveP800VectorArith VDIV_VX vdiv.vx v8, v16, a0377# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, mf2, tu, mu378# CHECK-NEXT: 1 45 45.00 45 SiFiveP800VDiv[45],SiFiveP800VEXQ1,SiFiveP800VectorArith VDIV_VX vdiv.vx v8, v16, a0379# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m1, tu, mu380# CHECK-NEXT: 1 45 45.00 45 SiFiveP800VDiv[45],SiFiveP800VEXQ1,SiFiveP800VectorArith VDIV_VX vdiv.vx v8, v16, a0381# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m1, tu, mu382# CHECK-NEXT: 1 45 45.00 45 SiFiveP800VDiv[45],SiFiveP800VEXQ1,SiFiveP800VectorArith VDIV_VX vdiv.vx v8, v16, a0383# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m2, tu, mu384# CHECK-NEXT: 1 90 90.00 90 SiFiveP800VDiv[90],SiFiveP800VEXQ1[2],SiFiveP800VectorArith[2] VDIV_VX vdiv.vx v8, v16, a0385# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m4, tu, mu386# CHECK-NEXT: 1 180 180.00 180 SiFiveP800VDiv[180],SiFiveP800VEXQ1[4],SiFiveP800VectorArith[4] VDIV_VX vdiv.vx v8, v16, a0387# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m8, tu, mu388# CHECK-NEXT: 1 360 360.00 360 SiFiveP800VDiv[360],SiFiveP800VEXQ1[8],SiFiveP800VectorArith[8] VDIV_VX vdiv.vx v8, v16, a0389# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, mf2, tu, mu390# CHECK-NEXT: 1 42 42.00 42 SiFiveP800VDiv[42],SiFiveP800VEXQ1,SiFiveP800VectorArith VDIV_VX vdiv.vx v8, v16, a0391# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m1, tu, mu392# CHECK-NEXT: 1 42 42.00 42 SiFiveP800VDiv[42],SiFiveP800VEXQ1,SiFiveP800VectorArith VDIV_VX vdiv.vx v8, v16, a0393# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m1, tu, mu394# CHECK-NEXT: 1 42 42.00 42 SiFiveP800VDiv[42],SiFiveP800VEXQ1,SiFiveP800VectorArith VDIV_VX vdiv.vx v8, v16, a0395# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m2, tu, mu396# CHECK-NEXT: 1 84 84.00 84 SiFiveP800VDiv[84],SiFiveP800VEXQ1[2],SiFiveP800VectorArith[2] VDIV_VX vdiv.vx v8, v16, a0397# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m4, tu, mu398# CHECK-NEXT: 1 168 168.00 168 SiFiveP800VDiv[168],SiFiveP800VEXQ1[4],SiFiveP800VectorArith[4] VDIV_VX vdiv.vx v8, v16, a0399# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m8, tu, mu400# CHECK-NEXT: 1 336 336.00 336 SiFiveP800VDiv[336],SiFiveP800VEXQ1[8],SiFiveP800VectorArith[8] VDIV_VX vdiv.vx v8, v16, a0401# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m1, tu, mu402# CHECK-NEXT: 1 72 72.00 72 SiFiveP800VDiv[72],SiFiveP800VEXQ1,SiFiveP800VectorArith VDIV_VX vdiv.vx v8, v16, a0403# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m1, tu, mu404# CHECK-NEXT: 1 72 72.00 72 SiFiveP800VDiv[72],SiFiveP800VEXQ1,SiFiveP800VectorArith VDIV_VX vdiv.vx v8, v16, a0405# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m2, tu, mu406# CHECK-NEXT: 1 144 144.00 144 SiFiveP800VDiv[144],SiFiveP800VEXQ1[2],SiFiveP800VectorArith[2] VDIV_VX vdiv.vx v8, v16, a0407# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m4, tu, mu408# CHECK-NEXT: 1 288 288.00 288 SiFiveP800VDiv[288],SiFiveP800VEXQ1[4],SiFiveP800VectorArith[4] VDIV_VX vdiv.vx v8, v16, a0409# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m8, tu, mu410# CHECK-NEXT: 1 576 576.00 576 SiFiveP800VDiv[576],SiFiveP800VEXQ1[8],SiFiveP800VectorArith[8] VDIV_VX vdiv.vx v8, v16, a0411# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf8, tu, mu412# CHECK-NEXT: 1 232 232.00 232 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[232],SiFiveP800VectorArith[8] VFDIV_VV vfdiv.vv v8, v16, v24413# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf4, tu, mu414# CHECK-NEXT: 1 232 232.00 232 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[232],SiFiveP800VectorArith[8] VFDIV_VV vfdiv.vv v8, v16, v24415# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf2, tu, mu416# CHECK-NEXT: 1 232 232.00 232 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[232],SiFiveP800VectorArith[8] VFDIV_VV vfdiv.vv v8, v16, v24417# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m1, tu, mu418# CHECK-NEXT: 1 232 232.00 232 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[232],SiFiveP800VectorArith[8] VFDIV_VV vfdiv.vv v8, v16, v24419# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m1, tu, mu420# CHECK-NEXT: 1 232 232.00 232 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[232],SiFiveP800VectorArith[8] VFDIV_VV vfdiv.vv v8, v16, v24421# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m2, tu, mu422# CHECK-NEXT: 1 232 232.00 232 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[232],SiFiveP800VectorArith[8] VFDIV_VV vfdiv.vv v8, v16, v24423# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m4, tu, mu424# CHECK-NEXT: 1 232 232.00 232 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[232],SiFiveP800VectorArith[8] VFDIV_VV vfdiv.vv v8, v16, v24425# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m8, tu, mu426# CHECK-NEXT: 1 232 232.00 232 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[232],SiFiveP800VectorArith[8] VFDIV_VV vfdiv.vv v8, v16, v24427# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, mf4, tu, mu428# CHECK-NEXT: 1 29 29.00 29 SiFiveP800VEXQ1,SiFiveP800VFloatDiv[29],SiFiveP800VectorArith VFDIV_VV vfdiv.vv v8, v16, v24429# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, mf2, tu, mu430# CHECK-NEXT: 1 29 29.00 29 SiFiveP800VEXQ1,SiFiveP800VFloatDiv[29],SiFiveP800VectorArith VFDIV_VV vfdiv.vv v8, v16, v24431# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m1, tu, mu432# CHECK-NEXT: 1 29 29.00 29 SiFiveP800VEXQ1,SiFiveP800VFloatDiv[29],SiFiveP800VectorArith VFDIV_VV vfdiv.vv v8, v16, v24433# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m1, tu, mu434# CHECK-NEXT: 1 29 29.00 29 SiFiveP800VEXQ1,SiFiveP800VFloatDiv[29],SiFiveP800VectorArith VFDIV_VV vfdiv.vv v8, v16, v24435# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m2, tu, mu436# CHECK-NEXT: 1 58 58.00 58 SiFiveP800VEXQ1[2],SiFiveP800VFloatDiv[58],SiFiveP800VectorArith[2] VFDIV_VV vfdiv.vv v8, v16, v24437# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m4, tu, mu438# CHECK-NEXT: 1 116 116.00 116 SiFiveP800VEXQ1[4],SiFiveP800VFloatDiv[116],SiFiveP800VectorArith[4] VFDIV_VV vfdiv.vv v8, v16, v24439# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m8, tu, mu440# CHECK-NEXT: 1 232 232.00 232 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[232],SiFiveP800VectorArith[8] VFDIV_VV vfdiv.vv v8, v16, v24441# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, mf2, tu, mu442# CHECK-NEXT: 1 25 25.00 25 SiFiveP800VEXQ1,SiFiveP800VFloatDiv[25],SiFiveP800VectorArith VFDIV_VV vfdiv.vv v8, v16, v24443# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m1, tu, mu444# CHECK-NEXT: 1 25 25.00 25 SiFiveP800VEXQ1,SiFiveP800VFloatDiv[25],SiFiveP800VectorArith VFDIV_VV vfdiv.vv v8, v16, v24445# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m1, tu, mu446# CHECK-NEXT: 1 25 25.00 25 SiFiveP800VEXQ1,SiFiveP800VFloatDiv[25],SiFiveP800VectorArith VFDIV_VV vfdiv.vv v8, v16, v24447# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m2, tu, mu448# CHECK-NEXT: 1 50 50.00 50 SiFiveP800VEXQ1[2],SiFiveP800VFloatDiv[50],SiFiveP800VectorArith[2] VFDIV_VV vfdiv.vv v8, v16, v24449# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m4, tu, mu450# CHECK-NEXT: 1 100 100.00 100 SiFiveP800VEXQ1[4],SiFiveP800VFloatDiv[100],SiFiveP800VectorArith[4] VFDIV_VV vfdiv.vv v8, v16, v24451# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m8, tu, mu452# CHECK-NEXT: 1 200 200.00 200 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[200],SiFiveP800VectorArith[8] VFDIV_VV vfdiv.vv v8, v16, v24453# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m1, tu, mu454# CHECK-NEXT: 1 37 37.00 37 SiFiveP800VEXQ1,SiFiveP800VFloatDiv[37],SiFiveP800VectorArith VFDIV_VV vfdiv.vv v8, v16, v24455# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m1, tu, mu456# CHECK-NEXT: 1 37 37.00 37 SiFiveP800VEXQ1,SiFiveP800VFloatDiv[37],SiFiveP800VectorArith VFDIV_VV vfdiv.vv v8, v16, v24457# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m2, tu, mu458# CHECK-NEXT: 1 74 74.00 74 SiFiveP800VEXQ1[2],SiFiveP800VFloatDiv[74],SiFiveP800VectorArith[2] VFDIV_VV vfdiv.vv v8, v16, v24459# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m4, tu, mu460# CHECK-NEXT: 1 148 148.00 148 SiFiveP800VEXQ1[4],SiFiveP800VFloatDiv[148],SiFiveP800VectorArith[4] VFDIV_VV vfdiv.vv v8, v16, v24461# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m8, tu, mu462# CHECK-NEXT: 1 296 296.00 296 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[296],SiFiveP800VectorArith[8] VFDIV_VV vfdiv.vv v8, v16, v24463# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf8, tu, mu464# CHECK-NEXT: 1 232 232.00 232 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[232],SiFiveP800VectorArith[8] VFDIV_VF vfdiv.vf v8, v16, fa0465# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf4, tu, mu466# CHECK-NEXT: 1 232 232.00 232 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[232],SiFiveP800VectorArith[8] VFDIV_VF vfdiv.vf v8, v16, fa0467# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf2, tu, mu468# CHECK-NEXT: 1 232 232.00 232 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[232],SiFiveP800VectorArith[8] VFDIV_VF vfdiv.vf v8, v16, fa0469# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m1, tu, mu470# CHECK-NEXT: 1 232 232.00 232 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[232],SiFiveP800VectorArith[8] VFDIV_VF vfdiv.vf v8, v16, fa0471# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m1, tu, mu472# CHECK-NEXT: 1 232 232.00 232 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[232],SiFiveP800VectorArith[8] VFDIV_VF vfdiv.vf v8, v16, fa0473# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m2, tu, mu474# CHECK-NEXT: 1 232 232.00 232 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[232],SiFiveP800VectorArith[8] VFDIV_VF vfdiv.vf v8, v16, fa0475# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m4, tu, mu476# CHECK-NEXT: 1 232 232.00 232 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[232],SiFiveP800VectorArith[8] VFDIV_VF vfdiv.vf v8, v16, fa0477# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m8, tu, mu478# CHECK-NEXT: 1 232 232.00 232 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[232],SiFiveP800VectorArith[8] VFDIV_VF vfdiv.vf v8, v16, fa0479# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, mf4, tu, mu480# CHECK-NEXT: 1 29 29.00 29 SiFiveP800VEXQ1,SiFiveP800VFloatDiv[29],SiFiveP800VectorArith VFDIV_VF vfdiv.vf v8, v16, fa0481# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, mf2, tu, mu482# CHECK-NEXT: 1 29 29.00 29 SiFiveP800VEXQ1,SiFiveP800VFloatDiv[29],SiFiveP800VectorArith VFDIV_VF vfdiv.vf v8, v16, fa0483# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m1, tu, mu484# CHECK-NEXT: 1 29 29.00 29 SiFiveP800VEXQ1,SiFiveP800VFloatDiv[29],SiFiveP800VectorArith VFDIV_VF vfdiv.vf v8, v16, fa0485# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m1, tu, mu486# CHECK-NEXT: 1 29 29.00 29 SiFiveP800VEXQ1,SiFiveP800VFloatDiv[29],SiFiveP800VectorArith VFDIV_VF vfdiv.vf v8, v16, fa0487# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m2, tu, mu488# CHECK-NEXT: 1 58 58.00 58 SiFiveP800VEXQ1[2],SiFiveP800VFloatDiv[58],SiFiveP800VectorArith[2] VFDIV_VF vfdiv.vf v8, v16, fa0489# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m4, tu, mu490# CHECK-NEXT: 1 116 116.00 116 SiFiveP800VEXQ1[4],SiFiveP800VFloatDiv[116],SiFiveP800VectorArith[4] VFDIV_VF vfdiv.vf v8, v16, fa0491# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m8, tu, mu492# CHECK-NEXT: 1 232 232.00 232 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[232],SiFiveP800VectorArith[8] VFDIV_VF vfdiv.vf v8, v16, fa0493# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, mf2, tu, mu494# CHECK-NEXT: 1 25 25.00 25 SiFiveP800VEXQ1,SiFiveP800VFloatDiv[25],SiFiveP800VectorArith VFDIV_VF vfdiv.vf v8, v16, fa0495# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m1, tu, mu496# CHECK-NEXT: 1 25 25.00 25 SiFiveP800VEXQ1,SiFiveP800VFloatDiv[25],SiFiveP800VectorArith VFDIV_VF vfdiv.vf v8, v16, fa0497# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m1, tu, mu498# CHECK-NEXT: 1 25 25.00 25 SiFiveP800VEXQ1,SiFiveP800VFloatDiv[25],SiFiveP800VectorArith VFDIV_VF vfdiv.vf v8, v16, fa0499# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m2, tu, mu500# CHECK-NEXT: 1 50 50.00 50 SiFiveP800VEXQ1[2],SiFiveP800VFloatDiv[50],SiFiveP800VectorArith[2] VFDIV_VF vfdiv.vf v8, v16, fa0501# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m4, tu, mu502# CHECK-NEXT: 1 100 100.00 100 SiFiveP800VEXQ1[4],SiFiveP800VFloatDiv[100],SiFiveP800VectorArith[4] VFDIV_VF vfdiv.vf v8, v16, fa0503# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m8, tu, mu504# CHECK-NEXT: 1 200 200.00 200 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[200],SiFiveP800VectorArith[8] VFDIV_VF vfdiv.vf v8, v16, fa0505# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m1, tu, mu506# CHECK-NEXT: 1 37 37.00 37 SiFiveP800VEXQ1,SiFiveP800VFloatDiv[37],SiFiveP800VectorArith VFDIV_VF vfdiv.vf v8, v16, fa0507# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m1, tu, mu508# CHECK-NEXT: 1 37 37.00 37 SiFiveP800VEXQ1,SiFiveP800VFloatDiv[37],SiFiveP800VectorArith VFDIV_VF vfdiv.vf v8, v16, fa0509# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m2, tu, mu510# CHECK-NEXT: 1 74 74.00 74 SiFiveP800VEXQ1[2],SiFiveP800VFloatDiv[74],SiFiveP800VectorArith[2] VFDIV_VF vfdiv.vf v8, v16, fa0511# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m4, tu, mu512# CHECK-NEXT: 1 148 148.00 148 SiFiveP800VEXQ1[4],SiFiveP800VFloatDiv[148],SiFiveP800VectorArith[4] VFDIV_VF vfdiv.vf v8, v16, fa0513# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m8, tu, mu514# CHECK-NEXT: 1 296 296.00 296 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[296],SiFiveP800VectorArith[8] VFDIV_VF vfdiv.vf v8, v16, fa0515# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf8, tu, mu516# CHECK-NEXT: 1 232 232.00 232 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[232],SiFiveP800VectorArith[8] VFSQRT_V vfsqrt.v v8, v16517# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf4, tu, mu518# CHECK-NEXT: 1 232 232.00 232 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[232],SiFiveP800VectorArith[8] VFSQRT_V vfsqrt.v v8, v16519# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf2, tu, mu520# CHECK-NEXT: 1 232 232.00 232 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[232],SiFiveP800VectorArith[8] VFSQRT_V vfsqrt.v v8, v16521# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m1, tu, mu522# CHECK-NEXT: 1 232 232.00 232 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[232],SiFiveP800VectorArith[8] VFSQRT_V vfsqrt.v v8, v16523# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m1, tu, mu524# CHECK-NEXT: 1 232 232.00 232 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[232],SiFiveP800VectorArith[8] VFSQRT_V vfsqrt.v v8, v16525# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m2, tu, mu526# CHECK-NEXT: 1 232 232.00 232 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[232],SiFiveP800VectorArith[8] VFSQRT_V vfsqrt.v v8, v16527# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m4, tu, mu528# CHECK-NEXT: 1 232 232.00 232 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[232],SiFiveP800VectorArith[8] VFSQRT_V vfsqrt.v v8, v16529# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m8, tu, mu530# CHECK-NEXT: 1 232 232.00 232 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[232],SiFiveP800VectorArith[8] VFSQRT_V vfsqrt.v v8, v16531# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, mf4, tu, mu532# CHECK-NEXT: 1 29 29.00 29 SiFiveP800VEXQ1,SiFiveP800VFloatDiv[29],SiFiveP800VectorArith VFSQRT_V vfsqrt.v v8, v16533# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, mf2, tu, mu534# CHECK-NEXT: 1 29 29.00 29 SiFiveP800VEXQ1,SiFiveP800VFloatDiv[29],SiFiveP800VectorArith VFSQRT_V vfsqrt.v v8, v16535# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m1, tu, mu536# CHECK-NEXT: 1 29 29.00 29 SiFiveP800VEXQ1,SiFiveP800VFloatDiv[29],SiFiveP800VectorArith VFSQRT_V vfsqrt.v v8, v16537# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m1, tu, mu538# CHECK-NEXT: 1 29 29.00 29 SiFiveP800VEXQ1,SiFiveP800VFloatDiv[29],SiFiveP800VectorArith VFSQRT_V vfsqrt.v v8, v16539# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m2, tu, mu540# CHECK-NEXT: 1 58 58.00 58 SiFiveP800VEXQ1[2],SiFiveP800VFloatDiv[58],SiFiveP800VectorArith[2] VFSQRT_V vfsqrt.v v8, v16541# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m4, tu, mu542# CHECK-NEXT: 1 116 116.00 116 SiFiveP800VEXQ1[4],SiFiveP800VFloatDiv[116],SiFiveP800VectorArith[4] VFSQRT_V vfsqrt.v v8, v16543# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m8, tu, mu544# CHECK-NEXT: 1 232 232.00 232 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[232],SiFiveP800VectorArith[8] VFSQRT_V vfsqrt.v v8, v16545# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, mf2, tu, mu546# CHECK-NEXT: 1 25 25.00 25 SiFiveP800VEXQ1,SiFiveP800VFloatDiv[25],SiFiveP800VectorArith VFSQRT_V vfsqrt.v v8, v16547# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m1, tu, mu548# CHECK-NEXT: 1 25 25.00 25 SiFiveP800VEXQ1,SiFiveP800VFloatDiv[25],SiFiveP800VectorArith VFSQRT_V vfsqrt.v v8, v16549# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m1, tu, mu550# CHECK-NEXT: 1 25 25.00 25 SiFiveP800VEXQ1,SiFiveP800VFloatDiv[25],SiFiveP800VectorArith VFSQRT_V vfsqrt.v v8, v16551# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m2, tu, mu552# CHECK-NEXT: 1 50 50.00 50 SiFiveP800VEXQ1[2],SiFiveP800VFloatDiv[50],SiFiveP800VectorArith[2] VFSQRT_V vfsqrt.v v8, v16553# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m4, tu, mu554# CHECK-NEXT: 1 100 100.00 100 SiFiveP800VEXQ1[4],SiFiveP800VFloatDiv[100],SiFiveP800VectorArith[4] VFSQRT_V vfsqrt.v v8, v16555# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m8, tu, mu556# CHECK-NEXT: 1 200 200.00 200 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[200],SiFiveP800VectorArith[8] VFSQRT_V vfsqrt.v v8, v16557# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m1, tu, mu558# CHECK-NEXT: 1 37 37.00 37 SiFiveP800VEXQ1,SiFiveP800VFloatDiv[37],SiFiveP800VectorArith VFSQRT_V vfsqrt.v v8, v16559# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m1, tu, mu560# CHECK-NEXT: 1 37 37.00 37 SiFiveP800VEXQ1,SiFiveP800VFloatDiv[37],SiFiveP800VectorArith VFSQRT_V vfsqrt.v v8, v16561# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m2, tu, mu562# CHECK-NEXT: 1 74 74.00 74 SiFiveP800VEXQ1[2],SiFiveP800VFloatDiv[74],SiFiveP800VectorArith[2] VFSQRT_V vfsqrt.v v8, v16563# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m4, tu, mu564# CHECK-NEXT: 1 148 148.00 148 SiFiveP800VEXQ1[4],SiFiveP800VFloatDiv[148],SiFiveP800VectorArith[4] VFSQRT_V vfsqrt.v v8, v16565# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m8, tu, mu566# CHECK-NEXT: 1 296 296.00 296 SiFiveP800VEXQ1[8],SiFiveP800VFloatDiv[296],SiFiveP800VectorArith[8] VFSQRT_V vfsqrt.v v8, v16567 568# CHECK: Resources:569# CHECK-NEXT: [0] - SiFiveP800Div570# CHECK-NEXT: [1] - SiFiveP800FEXQ0571# CHECK-NEXT: [2] - SiFiveP800FEXQ1572# CHECK-NEXT: [3] - SiFiveP800FloatDiv573# CHECK-NEXT: [4] - SiFiveP800IEXQ0574# CHECK-NEXT: [5] - SiFiveP800IEXQ1575# CHECK-NEXT: [6] - SiFiveP800IEXQ2576# CHECK-NEXT: [7] - SiFiveP800IEXQ3577# CHECK-NEXT: [8] - SiFiveP800IEXQ4578# CHECK-NEXT: [9] - SiFiveP800IEXQ5579# CHECK-NEXT: [10] - SiFiveP800LD580# CHECK-NEXT: [11.0] - SiFiveP800LDST581# CHECK-NEXT: [11.1] - SiFiveP800LDST582# CHECK-NEXT: [12] - SiFiveP800VDiv583# CHECK-NEXT: [13] - SiFiveP800VEXQ0584# CHECK-NEXT: [14] - SiFiveP800VEXQ1585# CHECK-NEXT: [15] - SiFiveP800VFloatDiv586# CHECK-NEXT: [16] - SiFiveP800VLD587# CHECK-NEXT: [17] - SiFiveP800VST588 589# CHECK: Resource pressure per iteration:590# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11.0] [11.1] [12] [13] [14] [15] [16] [17]591# CHECK-NEXT: - - - - - 130.00 - - - - - - - 7290.00 - 485.00 10185.00 - -592 593# CHECK: Resource pressure by instruction:594# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11.0] [11.1] [12] [13] [14] [15] [16] [17] Instructions:595# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf8, tu, mu596# CHECK-NEXT: - - - - - - - - - - - - - 51.00 - 1.00 - - - vdiv.vv v8, v16, v24597# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf4, tu, mu598# CHECK-NEXT: - - - - - - - - - - - - - 51.00 - 1.00 - - - vdiv.vv v8, v16, v24599# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf2, tu, mu600# CHECK-NEXT: - - - - - - - - - - - - - 51.00 - 1.00 - - - vdiv.vv v8, v16, v24601# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m1, tu, mu602# CHECK-NEXT: - - - - - - - - - - - - - 51.00 - 1.00 - - - vdiv.vv v8, v16, v24603# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m1, tu, mu604# CHECK-NEXT: - - - - - - - - - - - - - 51.00 - 1.00 - - - vdiv.vv v8, v16, v24605# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m2, tu, mu606# CHECK-NEXT: - - - - - - - - - - - - - 102.00 - 2.00 - - - vdiv.vv v8, v16, v24607# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m4, tu, mu608# CHECK-NEXT: - - - - - - - - - - - - - 204.00 - 4.00 - - - vdiv.vv v8, v16, v24609# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m8, tu, mu610# CHECK-NEXT: - - - - - - - - - - - - - 408.00 - 8.00 - - - vdiv.vv v8, v16, v24611# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, mf4, tu, mu612# CHECK-NEXT: - - - - - - - - - - - - - 45.00 - 1.00 - - - vdiv.vv v8, v16, v24613# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, mf2, tu, mu614# CHECK-NEXT: - - - - - - - - - - - - - 45.00 - 1.00 - - - vdiv.vv v8, v16, v24615# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m1, tu, mu616# CHECK-NEXT: - - - - - - - - - - - - - 45.00 - 1.00 - - - vdiv.vv v8, v16, v24617# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m1, tu, mu618# CHECK-NEXT: - - - - - - - - - - - - - 45.00 - 1.00 - - - vdiv.vv v8, v16, v24619# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m2, tu, mu620# CHECK-NEXT: - - - - - - - - - - - - - 90.00 - 2.00 - - - vdiv.vv v8, v16, v24621# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m4, tu, mu622# CHECK-NEXT: - - - - - - - - - - - - - 180.00 - 4.00 - - - vdiv.vv v8, v16, v24623# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m8, tu, mu624# CHECK-NEXT: - - - - - - - - - - - - - 360.00 - 8.00 - - - vdiv.vv v8, v16, v24625# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, mf2, tu, mu626# CHECK-NEXT: - - - - - - - - - - - - - 42.00 - 1.00 - - - vdiv.vv v8, v16, v24627# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m1, tu, mu628# CHECK-NEXT: - - - - - - - - - - - - - 42.00 - 1.00 - - - vdiv.vv v8, v16, v24629# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m1, tu, mu630# CHECK-NEXT: - - - - - - - - - - - - - 42.00 - 1.00 - - - vdiv.vv v8, v16, v24631# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m2, tu, mu632# CHECK-NEXT: - - - - - - - - - - - - - 84.00 - 2.00 - - - vdiv.vv v8, v16, v24633# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m4, tu, mu634# CHECK-NEXT: - - - - - - - - - - - - - 168.00 - 4.00 - - - vdiv.vv v8, v16, v24635# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m8, tu, mu636# CHECK-NEXT: - - - - - - - - - - - - - 336.00 - 8.00 - - - vdiv.vv v8, v16, v24637# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m1, tu, mu638# CHECK-NEXT: - - - - - - - - - - - - - 72.00 - 1.00 - - - vdiv.vv v8, v16, v24639# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m1, tu, mu640# CHECK-NEXT: - - - - - - - - - - - - - 72.00 - 1.00 - - - vdiv.vv v8, v16, v24641# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m2, tu, mu642# CHECK-NEXT: - - - - - - - - - - - - - 144.00 - 2.00 - - - vdiv.vv v8, v16, v24643# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m4, tu, mu644# CHECK-NEXT: - - - - - - - - - - - - - 288.00 - 4.00 - - - vdiv.vv v8, v16, v24645# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m8, tu, mu646# CHECK-NEXT: - - - - - - - - - - - - - 576.00 - 8.00 - - - vdiv.vv v8, v16, v24647# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf8, tu, mu648# CHECK-NEXT: - - - - - - - - - - - - - 51.00 - 1.00 - - - vdiv.vx v8, v16, a0649# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf4, tu, mu650# CHECK-NEXT: - - - - - - - - - - - - - 51.00 - 1.00 - - - vdiv.vx v8, v16, a0651# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf2, tu, mu652# CHECK-NEXT: - - - - - - - - - - - - - 51.00 - 1.00 - - - vdiv.vx v8, v16, a0653# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m1, tu, mu654# CHECK-NEXT: - - - - - - - - - - - - - 51.00 - 1.00 - - - vdiv.vx v8, v16, a0655# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m1, tu, mu656# CHECK-NEXT: - - - - - - - - - - - - - 51.00 - 1.00 - - - vdiv.vx v8, v16, a0657# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m2, tu, mu658# CHECK-NEXT: - - - - - - - - - - - - - 102.00 - 2.00 - - - vdiv.vx v8, v16, a0659# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m4, tu, mu660# CHECK-NEXT: - - - - - - - - - - - - - 204.00 - 4.00 - - - vdiv.vx v8, v16, a0661# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m8, tu, mu662# CHECK-NEXT: - - - - - - - - - - - - - 408.00 - 8.00 - - - vdiv.vx v8, v16, a0663# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, mf4, tu, mu664# CHECK-NEXT: - - - - - - - - - - - - - 45.00 - 1.00 - - - vdiv.vx v8, v16, a0665# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, mf2, tu, mu666# CHECK-NEXT: - - - - - - - - - - - - - 45.00 - 1.00 - - - vdiv.vx v8, v16, a0667# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m1, tu, mu668# CHECK-NEXT: - - - - - - - - - - - - - 45.00 - 1.00 - - - vdiv.vx v8, v16, a0669# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m1, tu, mu670# CHECK-NEXT: - - - - - - - - - - - - - 45.00 - 1.00 - - - vdiv.vx v8, v16, a0671# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m2, tu, mu672# CHECK-NEXT: - - - - - - - - - - - - - 90.00 - 2.00 - - - vdiv.vx v8, v16, a0673# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m4, tu, mu674# CHECK-NEXT: - - - - - - - - - - - - - 180.00 - 4.00 - - - vdiv.vx v8, v16, a0675# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m8, tu, mu676# CHECK-NEXT: - - - - - - - - - - - - - 360.00 - 8.00 - - - vdiv.vx v8, v16, a0677# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, mf2, tu, mu678# CHECK-NEXT: - - - - - - - - - - - - - 42.00 - 1.00 - - - vdiv.vx v8, v16, a0679# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m1, tu, mu680# CHECK-NEXT: - - - - - - - - - - - - - 42.00 - 1.00 - - - vdiv.vx v8, v16, a0681# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m1, tu, mu682# CHECK-NEXT: - - - - - - - - - - - - - 42.00 - 1.00 - - - vdiv.vx v8, v16, a0683# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m2, tu, mu684# CHECK-NEXT: - - - - - - - - - - - - - 84.00 - 2.00 - - - vdiv.vx v8, v16, a0685# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m4, tu, mu686# CHECK-NEXT: - - - - - - - - - - - - - 168.00 - 4.00 - - - vdiv.vx v8, v16, a0687# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m8, tu, mu688# CHECK-NEXT: - - - - - - - - - - - - - 336.00 - 8.00 - - - vdiv.vx v8, v16, a0689# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m1, tu, mu690# CHECK-NEXT: - - - - - - - - - - - - - 72.00 - 1.00 - - - vdiv.vx v8, v16, a0691# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m1, tu, mu692# CHECK-NEXT: - - - - - - - - - - - - - 72.00 - 1.00 - - - vdiv.vx v8, v16, a0693# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m2, tu, mu694# CHECK-NEXT: - - - - - - - - - - - - - 144.00 - 2.00 - - - vdiv.vx v8, v16, a0695# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m4, tu, mu696# CHECK-NEXT: - - - - - - - - - - - - - 288.00 - 4.00 - - - vdiv.vx v8, v16, a0697# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m8, tu, mu698# CHECK-NEXT: - - - - - - - - - - - - - 576.00 - 8.00 - - - vdiv.vx v8, v16, a0699# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf8, tu, mu700# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vv v8, v16, v24701# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf4, tu, mu702# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vv v8, v16, v24703# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf2, tu, mu704# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vv v8, v16, v24705# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m1, tu, mu706# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vv v8, v16, v24707# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m1, tu, mu708# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vv v8, v16, v24709# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m2, tu, mu710# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vv v8, v16, v24711# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m4, tu, mu712# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vv v8, v16, v24713# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m8, tu, mu714# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vv v8, v16, v24715# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, mf4, tu, mu716# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 29.00 - - vfdiv.vv v8, v16, v24717# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, mf2, tu, mu718# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 29.00 - - vfdiv.vv v8, v16, v24719# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m1, tu, mu720# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 29.00 - - vfdiv.vv v8, v16, v24721# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m1, tu, mu722# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 29.00 - - vfdiv.vv v8, v16, v24723# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m2, tu, mu724# CHECK-NEXT: - - - - - - - - - - - - - - - 2.00 58.00 - - vfdiv.vv v8, v16, v24725# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m4, tu, mu726# CHECK-NEXT: - - - - - - - - - - - - - - - 4.00 116.00 - - vfdiv.vv v8, v16, v24727# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m8, tu, mu728# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vv v8, v16, v24729# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, mf2, tu, mu730# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 25.00 - - vfdiv.vv v8, v16, v24731# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m1, tu, mu732# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 25.00 - - vfdiv.vv v8, v16, v24733# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m1, tu, mu734# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 25.00 - - vfdiv.vv v8, v16, v24735# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m2, tu, mu736# CHECK-NEXT: - - - - - - - - - - - - - - - 2.00 50.00 - - vfdiv.vv v8, v16, v24737# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m4, tu, mu738# CHECK-NEXT: - - - - - - - - - - - - - - - 4.00 100.00 - - vfdiv.vv v8, v16, v24739# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m8, tu, mu740# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 200.00 - - vfdiv.vv v8, v16, v24741# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m1, tu, mu742# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 37.00 - - vfdiv.vv v8, v16, v24743# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m1, tu, mu744# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 37.00 - - vfdiv.vv v8, v16, v24745# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m2, tu, mu746# CHECK-NEXT: - - - - - - - - - - - - - - - 2.00 74.00 - - vfdiv.vv v8, v16, v24747# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m4, tu, mu748# CHECK-NEXT: - - - - - - - - - - - - - - - 4.00 148.00 - - vfdiv.vv v8, v16, v24749# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m8, tu, mu750# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 296.00 - - vfdiv.vv v8, v16, v24751# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf8, tu, mu752# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vf v8, v16, fa0753# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf4, tu, mu754# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vf v8, v16, fa0755# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf2, tu, mu756# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vf v8, v16, fa0757# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m1, tu, mu758# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vf v8, v16, fa0759# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m1, tu, mu760# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vf v8, v16, fa0761# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m2, tu, mu762# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vf v8, v16, fa0763# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m4, tu, mu764# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vf v8, v16, fa0765# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m8, tu, mu766# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vf v8, v16, fa0767# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, mf4, tu, mu768# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 29.00 - - vfdiv.vf v8, v16, fa0769# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, mf2, tu, mu770# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 29.00 - - vfdiv.vf v8, v16, fa0771# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m1, tu, mu772# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 29.00 - - vfdiv.vf v8, v16, fa0773# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m1, tu, mu774# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 29.00 - - vfdiv.vf v8, v16, fa0775# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m2, tu, mu776# CHECK-NEXT: - - - - - - - - - - - - - - - 2.00 58.00 - - vfdiv.vf v8, v16, fa0777# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m4, tu, mu778# CHECK-NEXT: - - - - - - - - - - - - - - - 4.00 116.00 - - vfdiv.vf v8, v16, fa0779# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m8, tu, mu780# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vf v8, v16, fa0781# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, mf2, tu, mu782# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 25.00 - - vfdiv.vf v8, v16, fa0783# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m1, tu, mu784# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 25.00 - - vfdiv.vf v8, v16, fa0785# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m1, tu, mu786# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 25.00 - - vfdiv.vf v8, v16, fa0787# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m2, tu, mu788# CHECK-NEXT: - - - - - - - - - - - - - - - 2.00 50.00 - - vfdiv.vf v8, v16, fa0789# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m4, tu, mu790# CHECK-NEXT: - - - - - - - - - - - - - - - 4.00 100.00 - - vfdiv.vf v8, v16, fa0791# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m8, tu, mu792# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 200.00 - - vfdiv.vf v8, v16, fa0793# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m1, tu, mu794# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 37.00 - - vfdiv.vf v8, v16, fa0795# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m1, tu, mu796# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 37.00 - - vfdiv.vf v8, v16, fa0797# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m2, tu, mu798# CHECK-NEXT: - - - - - - - - - - - - - - - 2.00 74.00 - - vfdiv.vf v8, v16, fa0799# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m4, tu, mu800# CHECK-NEXT: - - - - - - - - - - - - - - - 4.00 148.00 - - vfdiv.vf v8, v16, fa0801# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m8, tu, mu802# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 296.00 - - vfdiv.vf v8, v16, fa0803# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf8, tu, mu804# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 232.00 - - vfsqrt.v v8, v16805# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf4, tu, mu806# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 232.00 - - vfsqrt.v v8, v16807# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf2, tu, mu808# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 232.00 - - vfsqrt.v v8, v16809# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m1, tu, mu810# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 232.00 - - vfsqrt.v v8, v16811# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m1, tu, mu812# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 232.00 - - vfsqrt.v v8, v16813# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m2, tu, mu814# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 232.00 - - vfsqrt.v v8, v16815# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m4, tu, mu816# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 232.00 - - vfsqrt.v v8, v16817# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m8, tu, mu818# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 232.00 - - vfsqrt.v v8, v16819# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, mf4, tu, mu820# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 29.00 - - vfsqrt.v v8, v16821# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, mf2, tu, mu822# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 29.00 - - vfsqrt.v v8, v16823# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m1, tu, mu824# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 29.00 - - vfsqrt.v v8, v16825# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m1, tu, mu826# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 29.00 - - vfsqrt.v v8, v16827# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m2, tu, mu828# CHECK-NEXT: - - - - - - - - - - - - - - - 2.00 58.00 - - vfsqrt.v v8, v16829# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m4, tu, mu830# CHECK-NEXT: - - - - - - - - - - - - - - - 4.00 116.00 - - vfsqrt.v v8, v16831# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m8, tu, mu832# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 232.00 - - vfsqrt.v v8, v16833# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, mf2, tu, mu834# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 25.00 - - vfsqrt.v v8, v16835# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m1, tu, mu836# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 25.00 - - vfsqrt.v v8, v16837# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m1, tu, mu838# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 25.00 - - vfsqrt.v v8, v16839# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m2, tu, mu840# CHECK-NEXT: - - - - - - - - - - - - - - - 2.00 50.00 - - vfsqrt.v v8, v16841# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m4, tu, mu842# CHECK-NEXT: - - - - - - - - - - - - - - - 4.00 100.00 - - vfsqrt.v v8, v16843# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m8, tu, mu844# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 200.00 - - vfsqrt.v v8, v16845# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m1, tu, mu846# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 37.00 - - vfsqrt.v v8, v16847# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m1, tu, mu848# CHECK-NEXT: - - - - - - - - - - - - - - - 1.00 37.00 - - vfsqrt.v v8, v16849# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m2, tu, mu850# CHECK-NEXT: - - - - - - - - - - - - - - - 2.00 74.00 - - vfsqrt.v v8, v16851# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m4, tu, mu852# CHECK-NEXT: - - - - - - - - - - - - - - - 4.00 148.00 - - vfsqrt.v v8, v16853# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m8, tu, mu854# CHECK-NEXT: - - - - - - - - - - - - - - - 8.00 296.00 - - vfsqrt.v v8, v16855