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1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py2# RUN: llvm-mca -mtriple=riscv64 -mcpu=sifive-p870 -iterations=1 -instruction-tables=full < %s | FileCheck %s3 4vsetvli zero, zero, e8, mf8, ta, ma5vluxei8.v v8, (a0), v06vsetvli zero, zero, e8, mf4, ta, ma7vluxei8.v v8, (a0), v08vsetvli zero, zero, e8, mf2, ta, ma9vluxei8.v v8, (a0), v010vsetvli zero, zero, e8, m1, ta, ma11vluxei8.v v8, (a0), v012vsetvli zero, zero, e8, m2, ta, ma13vluxei8.v v8, (a0), v014vsetvli zero, zero, e8, m4, ta, ma15vluxei8.v v8, (a0), v016vsetvli zero, zero, e8, m8, ta, ma17vluxei8.v v8, (a0), v018 19vsetvli zero, zero, e16, mf4, ta, ma20vluxei16.v v8, (a0), v021vsetvli zero, zero, e16, mf2, ta, ma22vluxei16.v v8, (a0), v023vsetvli zero, zero, e16, m1, ta, ma24vluxei16.v v8, (a0), v025vsetvli zero, zero, e16, m2, ta, ma26vluxei16.v v8, (a0), v027vsetvli zero, zero, e16, m4, ta, ma28vluxei16.v v8, (a0), v029vsetvli zero, zero, e16, m8, ta, ma30vluxei16.v v8, (a0), v031 32vsetvli zero, zero, e32, mf2, ta, ma33vluxei32.v v8, (a0), v034vsetvli zero, zero, e32, m1, ta, ma35vluxei32.v v8, (a0), v036vsetvli zero, zero, e32, m2, ta, ma37vluxei32.v v8, (a0), v038vsetvli zero, zero, e32, m4, ta, ma39vluxei32.v v8, (a0), v040vsetvli zero, zero, e32, m8, ta, ma41vluxei32.v v8, (a0), v042 43vsetvli zero, zero, e64, m1, ta, ma44vluxei64.v v8, (a0), v045vsetvli zero, zero, e64, m2, ta, ma46vluxei64.v v8, (a0), v047vsetvli zero, zero, e64, m4, ta, ma48vluxei64.v v8, (a0), v049vsetvli zero, zero, e64, m8, ta, ma50vluxei64.v v8, (a0), v051 52vsetvli zero, zero, e8, mf8, ta, ma53vloxei8.v v8, (a0), v054vsetvli zero, zero, e8, mf4, ta, ma55vloxei8.v v8, (a0), v056vsetvli zero, zero, e8, mf2, ta, ma57vloxei8.v v8, (a0), v058vsetvli zero, zero, e8, m1, ta, ma59vloxei8.v v8, (a0), v060vsetvli zero, zero, e8, m2, ta, ma61vloxei8.v v8, (a0), v062vsetvli zero, zero, e8, m4, ta, ma63vloxei8.v v8, (a0), v064vsetvli zero, zero, e8, m8, ta, ma65vloxei8.v v8, (a0), v066 67vsetvli zero, zero, e16, mf4, ta, ma68vloxei16.v v8, (a0), v069vsetvli zero, zero, e16, mf2, ta, ma70vloxei16.v v8, (a0), v071vsetvli zero, zero, e16, m1, ta, ma72vloxei16.v v8, (a0), v073vsetvli zero, zero, e16, m2, ta, ma74vloxei16.v v8, (a0), v075vsetvli zero, zero, e16, m4, ta, ma76vloxei16.v v8, (a0), v077vsetvli zero, zero, e16, m8, ta, ma78vloxei16.v v8, (a0), v079 80vsetvli zero, zero, e32, mf2, ta, ma81vloxei32.v v8, (a0), v082vsetvli zero, zero, e32, m1, ta, ma83vloxei32.v v8, (a0), v084vsetvli zero, zero, e32, m2, ta, ma85vloxei32.v v8, (a0), v086vsetvli zero, zero, e32, m4, ta, ma87vloxei32.v v8, (a0), v088vsetvli zero, zero, e32, m8, ta, ma89vloxei32.v v8, (a0), v090 91vsetvli zero, zero, e64, m1, ta, ma92vloxei64.v v8, (a0), v093vsetvli zero, zero, e64, m2, ta, ma94vloxei64.v v8, (a0), v095vsetvli zero, zero, e64, m4, ta, ma96vloxei64.v v8, (a0), v097vsetvli zero, zero, e64, m8, ta, ma98vloxei64.v v8, (a0), v099 100vsetvli zero, zero, e8, mf8, ta, ma101vsuxei8.v v8, (a0), v0102vsetvli zero, zero, e8, mf4, ta, ma103vsuxei8.v v8, (a0), v0104vsetvli zero, zero, e8, mf2, ta, ma105vsuxei8.v v8, (a0), v0106vsetvli zero, zero, e8, m1, ta, ma107vsuxei8.v v8, (a0), v0108vsetvli zero, zero, e8, m2, ta, ma109vsuxei8.v v8, (a0), v0110vsetvli zero, zero, e8, m4, ta, ma111vsuxei8.v v8, (a0), v0112vsetvli zero, zero, e8, m8, ta, ma113vsuxei8.v v8, (a0), v0114 115vsetvli zero, zero, e16, mf4, ta, ma116vsuxei16.v v8, (a0), v0117vsetvli zero, zero, e16, mf2, ta, ma118vsuxei16.v v8, (a0), v0119vsetvli zero, zero, e16, m1, ta, ma120vsuxei16.v v8, (a0), v0121vsetvli zero, zero, e16, m2, ta, ma122vsuxei16.v v8, (a0), v0123vsetvli zero, zero, e16, m4, ta, ma124vsuxei16.v v8, (a0), v0125vsetvli zero, zero, e16, m8, ta, ma126vsuxei16.v v8, (a0), v0127 128vsetvli zero, zero, e32, mf2, ta, ma129vsuxei32.v v8, (a0), v0130vsetvli zero, zero, e32, m1, ta, ma131vsuxei32.v v8, (a0), v0132vsetvli zero, zero, e32, m2, ta, ma133vsuxei32.v v8, (a0), v0134vsetvli zero, zero, e32, m4, ta, ma135vsuxei32.v v8, (a0), v0136vsetvli zero, zero, e32, m8, ta, ma137vsuxei32.v v8, (a0), v0138 139vsetvli zero, zero, e64, m1, ta, ma140vsuxei64.v v8, (a0), v0141vsetvli zero, zero, e64, m2, ta, ma142vsuxei64.v v8, (a0), v0143vsetvli zero, zero, e64, m4, ta, ma144vsuxei64.v v8, (a0), v0145vsetvli zero, zero, e64, m8, ta, ma146vsuxei64.v v8, (a0), v0147 148vsetvli zero, zero, e8, mf8, ta, ma149vsoxei8.v v8, (a0), v0150vsetvli zero, zero, e8, mf4, ta, ma151vsoxei8.v v8, (a0), v0152vsetvli zero, zero, e8, mf2, ta, ma153vsoxei8.v v8, (a0), v0154vsetvli zero, zero, e8, m1, ta, ma155vsoxei8.v v8, (a0), v0156vsetvli zero, zero, e8, m2, ta, ma157vsoxei8.v v8, (a0), v0158vsetvli zero, zero, e8, m4, ta, ma159vsoxei8.v v8, (a0), v0160vsetvli zero, zero, e8, m8, ta, ma161vsoxei8.v v8, (a0), v0162 163vsetvli zero, zero, e16, mf4, ta, ma164vsoxei16.v v8, (a0), v0165vsetvli zero, zero, e16, mf2, ta, ma166vsoxei16.v v8, (a0), v0167vsetvli zero, zero, e16, m1, ta, ma168vsoxei16.v v8, (a0), v0169vsetvli zero, zero, e16, m2, ta, ma170vsoxei16.v v8, (a0), v0171vsetvli zero, zero, e16, m4, ta, ma172vsoxei16.v v8, (a0), v0173vsetvli zero, zero, e16, m8, ta, ma174vsoxei16.v v8, (a0), v0175 176vsetvli zero, zero, e32, mf2, ta, ma177vsoxei32.v v8, (a0), v0178vsetvli zero, zero, e32, m1, ta, ma179vsoxei32.v v8, (a0), v0180vsetvli zero, zero, e32, m2, ta, ma181vsoxei32.v v8, (a0), v0182vsetvli zero, zero, e32, m4, ta, ma183vsoxei32.v v8, (a0), v0184vsetvli zero, zero, e32, m8, ta, ma185vsoxei32.v v8, (a0), v0186 187vsetvli zero, zero, e64, m1, ta, ma188vsoxei64.v v8, (a0), v0189vsetvli zero, zero, e64, m2, ta, ma190vsoxei64.v v8, (a0), v0191vsetvli zero, zero, e64, m4, ta, ma192vsoxei64.v v8, (a0), v0193vsetvli zero, zero, e64, m8, ta, ma194vsoxei64.v v8, (a0), v0195 196# CHECK: Resources:197# CHECK-NEXT: [0] - SiFiveP800Branch:2 SiFiveP800IEXQ4, SiFiveP800IEXQ5198# CHECK-NEXT: [1] - SiFiveP800Div:1199# CHECK-NEXT: [2] - SiFiveP800FEXQ0:1200# CHECK-NEXT: [3] - SiFiveP800FEXQ1:1201# CHECK-NEXT: [4] - SiFiveP800FloatArith:2 SiFiveP800FEXQ0, SiFiveP800FEXQ1202# CHECK-NEXT: [5] - SiFiveP800FloatDiv:1203# CHECK-NEXT: [6] - SiFiveP800IEXQ0:1204# CHECK-NEXT: [7] - SiFiveP800IEXQ1:1205# CHECK-NEXT: [8] - SiFiveP800IEXQ2:1206# CHECK-NEXT: [9] - SiFiveP800IEXQ3:1207# CHECK-NEXT: [10] - SiFiveP800IEXQ4:1208# CHECK-NEXT: [11] - SiFiveP800IEXQ5:1209# CHECK-NEXT: [12] - SiFiveP800IntArith:4 SiFiveP800IEXQ0, SiFiveP800IEXQ1, SiFiveP800IEXQ2, SiFiveP800IEXQ3210# CHECK-NEXT: [13] - SiFiveP800LD:1211# CHECK-NEXT: [14] - SiFiveP800LDST:2212# CHECK-NEXT: [15] - SiFiveP800Load:3 SiFiveP800LDST, SiFiveP800LDST, SiFiveP800LD213# CHECK-NEXT: [16] - SiFiveP800Mul:2 SiFiveP800IEXQ1, SiFiveP800IEXQ3214# CHECK-NEXT: [17] - SiFiveP800VDiv:1215# CHECK-NEXT: [18] - SiFiveP800VEXQ0:1216# CHECK-NEXT: [19] - SiFiveP800VEXQ1:1217# CHECK-NEXT: [20] - SiFiveP800VFloatDiv:1218# CHECK-NEXT: [21] - SiFiveP800VLD:1219# CHECK-NEXT: [22] - SiFiveP800VST:1220# CHECK-NEXT: [23] - SiFiveP800VectorArith:2 SiFiveP800VEXQ0, SiFiveP800VEXQ1221 222# CHECK: Instruction Info:223# CHECK-NEXT: [1]: #uOps224# CHECK-NEXT: [2]: Latency225# CHECK-NEXT: [3]: RThroughput226# CHECK-NEXT: [4]: MayLoad227# CHECK-NEXT: [5]: MayStore228# CHECK-NEXT: [6]: HasSideEffects (U)229# CHECK-NEXT: [7]: Bypass Latency230# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])231# CHECK-NEXT: [9]: LLVM Opcode Name232 233# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:234# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf8, ta, ma235# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VLD VLUXEI8_V vluxei8.v v8, (a0), v0236# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf4, ta, ma237# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VLD VLUXEI8_V vluxei8.v v8, (a0), v0238# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf2, ta, ma239# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VLD VLUXEI8_V vluxei8.v v8, (a0), v0240# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m1, ta, ma241# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VLD VLUXEI8_V vluxei8.v v8, (a0), v0242# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m2, ta, ma243# CHECK-NEXT: 1 12 2.00 * 12 SiFiveP800VLD[2] VLUXEI8_V vluxei8.v v8, (a0), v0244# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m4, ta, ma245# CHECK-NEXT: 1 12 4.00 * 12 SiFiveP800VLD[4] VLUXEI8_V vluxei8.v v8, (a0), v0246# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m8, ta, ma247# CHECK-NEXT: 1 12 8.00 * 12 SiFiveP800VLD[8] VLUXEI8_V vluxei8.v v8, (a0), v0248# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, mf4, ta, ma249# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VLD VLUXEI16_V vluxei16.v v8, (a0), v0250# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, mf2, ta, ma251# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VLD VLUXEI16_V vluxei16.v v8, (a0), v0252# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m1, ta, ma253# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VLD VLUXEI16_V vluxei16.v v8, (a0), v0254# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m2, ta, ma255# CHECK-NEXT: 1 12 2.00 * 12 SiFiveP800VLD[2] VLUXEI16_V vluxei16.v v8, (a0), v0256# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m4, ta, ma257# CHECK-NEXT: 1 12 4.00 * 12 SiFiveP800VLD[4] VLUXEI16_V vluxei16.v v8, (a0), v0258# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m8, ta, ma259# CHECK-NEXT: 1 12 8.00 * 12 SiFiveP800VLD[8] VLUXEI16_V vluxei16.v v8, (a0), v0260# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, mf2, ta, ma261# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VLD VLUXEI32_V vluxei32.v v8, (a0), v0262# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m1, ta, ma263# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VLD VLUXEI32_V vluxei32.v v8, (a0), v0264# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m2, ta, ma265# CHECK-NEXT: 1 12 2.00 * 12 SiFiveP800VLD[2] VLUXEI32_V vluxei32.v v8, (a0), v0266# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m4, ta, ma267# CHECK-NEXT: 1 12 4.00 * 12 SiFiveP800VLD[4] VLUXEI32_V vluxei32.v v8, (a0), v0268# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m8, ta, ma269# CHECK-NEXT: 1 12 8.00 * 12 SiFiveP800VLD[8] VLUXEI32_V vluxei32.v v8, (a0), v0270# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m1, ta, ma271# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VLD VLUXEI64_V vluxei64.v v8, (a0), v0272# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m2, ta, ma273# CHECK-NEXT: 1 12 2.00 * 12 SiFiveP800VLD[2] VLUXEI64_V vluxei64.v v8, (a0), v0274# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m4, ta, ma275# CHECK-NEXT: 1 12 4.00 * 12 SiFiveP800VLD[4] VLUXEI64_V vluxei64.v v8, (a0), v0276# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m8, ta, ma277# CHECK-NEXT: 1 12 8.00 * 12 SiFiveP800VLD[8] VLUXEI64_V vluxei64.v v8, (a0), v0278# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf8, ta, ma279# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VLD VLOXEI8_V vloxei8.v v8, (a0), v0280# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf4, ta, ma281# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VLD VLOXEI8_V vloxei8.v v8, (a0), v0282# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf2, ta, ma283# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VLD VLOXEI8_V vloxei8.v v8, (a0), v0284# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m1, ta, ma285# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VLD VLOXEI8_V vloxei8.v v8, (a0), v0286# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m2, ta, ma287# CHECK-NEXT: 1 12 2.00 * 12 SiFiveP800VLD[2] VLOXEI8_V vloxei8.v v8, (a0), v0288# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m4, ta, ma289# CHECK-NEXT: 1 12 4.00 * 12 SiFiveP800VLD[4] VLOXEI8_V vloxei8.v v8, (a0), v0290# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m8, ta, ma291# CHECK-NEXT: 1 12 8.00 * 12 SiFiveP800VLD[8] VLOXEI8_V vloxei8.v v8, (a0), v0292# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, mf4, ta, ma293# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VLD VLOXEI16_V vloxei16.v v8, (a0), v0294# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, mf2, ta, ma295# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VLD VLOXEI16_V vloxei16.v v8, (a0), v0296# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m1, ta, ma297# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VLD VLOXEI16_V vloxei16.v v8, (a0), v0298# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m2, ta, ma299# CHECK-NEXT: 1 12 2.00 * 12 SiFiveP800VLD[2] VLOXEI16_V vloxei16.v v8, (a0), v0300# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m4, ta, ma301# CHECK-NEXT: 1 12 4.00 * 12 SiFiveP800VLD[4] VLOXEI16_V vloxei16.v v8, (a0), v0302# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m8, ta, ma303# CHECK-NEXT: 1 12 8.00 * 12 SiFiveP800VLD[8] VLOXEI16_V vloxei16.v v8, (a0), v0304# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, mf2, ta, ma305# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VLD VLOXEI32_V vloxei32.v v8, (a0), v0306# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m1, ta, ma307# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VLD VLOXEI32_V vloxei32.v v8, (a0), v0308# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m2, ta, ma309# CHECK-NEXT: 1 12 2.00 * 12 SiFiveP800VLD[2] VLOXEI32_V vloxei32.v v8, (a0), v0310# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m4, ta, ma311# CHECK-NEXT: 1 12 4.00 * 12 SiFiveP800VLD[4] VLOXEI32_V vloxei32.v v8, (a0), v0312# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m8, ta, ma313# CHECK-NEXT: 1 12 8.00 * 12 SiFiveP800VLD[8] VLOXEI32_V vloxei32.v v8, (a0), v0314# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m1, ta, ma315# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VLD VLOXEI64_V vloxei64.v v8, (a0), v0316# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m2, ta, ma317# CHECK-NEXT: 1 12 2.00 * 12 SiFiveP800VLD[2] VLOXEI64_V vloxei64.v v8, (a0), v0318# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m4, ta, ma319# CHECK-NEXT: 1 12 4.00 * 12 SiFiveP800VLD[4] VLOXEI64_V vloxei64.v v8, (a0), v0320# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m8, ta, ma321# CHECK-NEXT: 1 12 8.00 * 12 SiFiveP800VLD[8] VLOXEI64_V vloxei64.v v8, (a0), v0322# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf8, ta, ma323# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VST VSUXEI8_V vsuxei8.v v8, (a0), v0324# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf4, ta, ma325# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VST VSUXEI8_V vsuxei8.v v8, (a0), v0326# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf2, ta, ma327# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VST VSUXEI8_V vsuxei8.v v8, (a0), v0328# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m1, ta, ma329# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VST VSUXEI8_V vsuxei8.v v8, (a0), v0330# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m2, ta, ma331# CHECK-NEXT: 1 12 2.00 * 12 SiFiveP800VST[2] VSUXEI8_V vsuxei8.v v8, (a0), v0332# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m4, ta, ma333# CHECK-NEXT: 1 12 4.00 * 12 SiFiveP800VST[4] VSUXEI8_V vsuxei8.v v8, (a0), v0334# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m8, ta, ma335# CHECK-NEXT: 1 12 8.00 * 12 SiFiveP800VST[8] VSUXEI8_V vsuxei8.v v8, (a0), v0336# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, mf4, ta, ma337# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VST VSUXEI16_V vsuxei16.v v8, (a0), v0338# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, mf2, ta, ma339# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VST VSUXEI16_V vsuxei16.v v8, (a0), v0340# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m1, ta, ma341# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VST VSUXEI16_V vsuxei16.v v8, (a0), v0342# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m2, ta, ma343# CHECK-NEXT: 1 12 2.00 * 12 SiFiveP800VST[2] VSUXEI16_V vsuxei16.v v8, (a0), v0344# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m4, ta, ma345# CHECK-NEXT: 1 12 4.00 * 12 SiFiveP800VST[4] VSUXEI16_V vsuxei16.v v8, (a0), v0346# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m8, ta, ma347# CHECK-NEXT: 1 12 8.00 * 12 SiFiveP800VST[8] VSUXEI16_V vsuxei16.v v8, (a0), v0348# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, mf2, ta, ma349# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VST VSUXEI32_V vsuxei32.v v8, (a0), v0350# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m1, ta, ma351# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VST VSUXEI32_V vsuxei32.v v8, (a0), v0352# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m2, ta, ma353# CHECK-NEXT: 1 12 2.00 * 12 SiFiveP800VST[2] VSUXEI32_V vsuxei32.v v8, (a0), v0354# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m4, ta, ma355# CHECK-NEXT: 1 12 4.00 * 12 SiFiveP800VST[4] VSUXEI32_V vsuxei32.v v8, (a0), v0356# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m8, ta, ma357# CHECK-NEXT: 1 12 8.00 * 12 SiFiveP800VST[8] VSUXEI32_V vsuxei32.v v8, (a0), v0358# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m1, ta, ma359# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VST VSUXEI64_V vsuxei64.v v8, (a0), v0360# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m2, ta, ma361# CHECK-NEXT: 1 12 2.00 * 12 SiFiveP800VST[2] VSUXEI64_V vsuxei64.v v8, (a0), v0362# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m4, ta, ma363# CHECK-NEXT: 1 12 4.00 * 12 SiFiveP800VST[4] VSUXEI64_V vsuxei64.v v8, (a0), v0364# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m8, ta, ma365# CHECK-NEXT: 1 12 8.00 * 12 SiFiveP800VST[8] VSUXEI64_V vsuxei64.v v8, (a0), v0366# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf8, ta, ma367# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VST VSOXEI8_V vsoxei8.v v8, (a0), v0368# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf4, ta, ma369# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VST VSOXEI8_V vsoxei8.v v8, (a0), v0370# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf2, ta, ma371# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VST VSOXEI8_V vsoxei8.v v8, (a0), v0372# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m1, ta, ma373# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VST VSOXEI8_V vsoxei8.v v8, (a0), v0374# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m2, ta, ma375# CHECK-NEXT: 1 12 2.00 * 12 SiFiveP800VST[2] VSOXEI8_V vsoxei8.v v8, (a0), v0376# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m4, ta, ma377# CHECK-NEXT: 1 12 4.00 * 12 SiFiveP800VST[4] VSOXEI8_V vsoxei8.v v8, (a0), v0378# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m8, ta, ma379# CHECK-NEXT: 1 12 8.00 * 12 SiFiveP800VST[8] VSOXEI8_V vsoxei8.v v8, (a0), v0380# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, mf4, ta, ma381# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VST VSOXEI16_V vsoxei16.v v8, (a0), v0382# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, mf2, ta, ma383# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VST VSOXEI16_V vsoxei16.v v8, (a0), v0384# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m1, ta, ma385# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VST VSOXEI16_V vsoxei16.v v8, (a0), v0386# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m2, ta, ma387# CHECK-NEXT: 1 12 2.00 * 12 SiFiveP800VST[2] VSOXEI16_V vsoxei16.v v8, (a0), v0388# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m4, ta, ma389# CHECK-NEXT: 1 12 4.00 * 12 SiFiveP800VST[4] VSOXEI16_V vsoxei16.v v8, (a0), v0390# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m8, ta, ma391# CHECK-NEXT: 1 12 8.00 * 12 SiFiveP800VST[8] VSOXEI16_V vsoxei16.v v8, (a0), v0392# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, mf2, ta, ma393# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VST VSOXEI32_V vsoxei32.v v8, (a0), v0394# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m1, ta, ma395# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VST VSOXEI32_V vsoxei32.v v8, (a0), v0396# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m2, ta, ma397# CHECK-NEXT: 1 12 2.00 * 12 SiFiveP800VST[2] VSOXEI32_V vsoxei32.v v8, (a0), v0398# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m4, ta, ma399# CHECK-NEXT: 1 12 4.00 * 12 SiFiveP800VST[4] VSOXEI32_V vsoxei32.v v8, (a0), v0400# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m8, ta, ma401# CHECK-NEXT: 1 12 8.00 * 12 SiFiveP800VST[8] VSOXEI32_V vsoxei32.v v8, (a0), v0402# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m1, ta, ma403# CHECK-NEXT: 1 12 1.00 * 12 SiFiveP800VST VSOXEI64_V vsoxei64.v v8, (a0), v0404# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m2, ta, ma405# CHECK-NEXT: 1 12 2.00 * 12 SiFiveP800VST[2] VSOXEI64_V vsoxei64.v v8, (a0), v0406# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m4, ta, ma407# CHECK-NEXT: 1 12 4.00 * 12 SiFiveP800VST[4] VSOXEI64_V vsoxei64.v v8, (a0), v0408# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m8, ta, ma409# CHECK-NEXT: 1 12 8.00 * 12 SiFiveP800VST[8] VSOXEI64_V vsoxei64.v v8, (a0), v0410 411# CHECK: Resources:412# CHECK-NEXT: [0] - SiFiveP800Div413# CHECK-NEXT: [1] - SiFiveP800FEXQ0414# CHECK-NEXT: [2] - SiFiveP800FEXQ1415# CHECK-NEXT: [3] - SiFiveP800FloatDiv416# CHECK-NEXT: [4] - SiFiveP800IEXQ0417# CHECK-NEXT: [5] - SiFiveP800IEXQ1418# CHECK-NEXT: [6] - SiFiveP800IEXQ2419# CHECK-NEXT: [7] - SiFiveP800IEXQ3420# CHECK-NEXT: [8] - SiFiveP800IEXQ4421# CHECK-NEXT: [9] - SiFiveP800IEXQ5422# CHECK-NEXT: [10] - SiFiveP800LD423# CHECK-NEXT: [11.0] - SiFiveP800LDST424# CHECK-NEXT: [11.1] - SiFiveP800LDST425# CHECK-NEXT: [12] - SiFiveP800VDiv426# CHECK-NEXT: [13] - SiFiveP800VEXQ0427# CHECK-NEXT: [14] - SiFiveP800VEXQ1428# CHECK-NEXT: [15] - SiFiveP800VFloatDiv429# CHECK-NEXT: [16] - SiFiveP800VLD430# CHECK-NEXT: [17] - SiFiveP800VST431 432# CHECK: Resource pressure per iteration:433# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11.0] [11.1] [12] [13] [14] [15] [16] [17]434# CHECK-NEXT: - - - - - 88.00 - - - - - - - - - - - 132.00 132.00435 436# CHECK: Resource pressure by instruction:437# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11.0] [11.1] [12] [13] [14] [15] [16] [17] Instructions:438# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf8, ta, ma439# CHECK-NEXT: - - - - - - - - - - - - - - - - - 1.00 - vluxei8.v v8, (a0), v0440# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf4, ta, ma441# CHECK-NEXT: - - - - - - - - - - - - - - - - - 1.00 - vluxei8.v v8, (a0), v0442# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf2, ta, ma443# CHECK-NEXT: - - - - - - - - - - - - - - - - - 1.00 - vluxei8.v v8, (a0), v0444# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m1, ta, ma445# CHECK-NEXT: - - - - - - - - - - - - - - - - - 1.00 - vluxei8.v v8, (a0), v0446# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m2, ta, ma447# CHECK-NEXT: - - - - - - - - - - - - - - - - - 2.00 - vluxei8.v v8, (a0), v0448# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m4, ta, ma449# CHECK-NEXT: - - - - - - - - - - - - - - - - - 4.00 - vluxei8.v v8, (a0), v0450# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m8, ta, ma451# CHECK-NEXT: - - - - - - - - - - - - - - - - - 8.00 - vluxei8.v v8, (a0), v0452# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, mf4, ta, ma453# CHECK-NEXT: - - - - - - - - - - - - - - - - - 1.00 - vluxei16.v v8, (a0), v0454# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, mf2, ta, ma455# CHECK-NEXT: - - - - - - - - - - - - - - - - - 1.00 - vluxei16.v v8, (a0), v0456# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m1, ta, ma457# CHECK-NEXT: - - - - - - - - - - - - - - - - - 1.00 - vluxei16.v v8, (a0), v0458# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m2, ta, ma459# CHECK-NEXT: - - - - - - - - - - - - - - - - - 2.00 - vluxei16.v v8, (a0), v0460# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m4, ta, ma461# CHECK-NEXT: - - - - - - - - - - - - - - - - - 4.00 - vluxei16.v v8, (a0), v0462# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m8, ta, ma463# CHECK-NEXT: - - - - - - - - - - - - - - - - - 8.00 - vluxei16.v v8, (a0), v0464# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, mf2, ta, ma465# CHECK-NEXT: - - - - - - - - - - - - - - - - - 1.00 - vluxei32.v v8, (a0), v0466# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m1, ta, ma467# CHECK-NEXT: - - - - - - - - - - - - - - - - - 1.00 - vluxei32.v v8, (a0), v0468# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m2, ta, ma469# CHECK-NEXT: - - - - - - - - - - - - - - - - - 2.00 - vluxei32.v v8, (a0), v0470# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m4, ta, ma471# CHECK-NEXT: - - - - - - - - - - - - - - - - - 4.00 - vluxei32.v v8, (a0), v0472# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m8, ta, ma473# CHECK-NEXT: - - - - - - - - - - - - - - - - - 8.00 - vluxei32.v v8, (a0), v0474# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m1, ta, ma475# CHECK-NEXT: - - - - - - - - - - - - - - - - - 1.00 - vluxei64.v v8, (a0), v0476# CHECK-NEXT: - - - - - 1.00 - - - - - - - - 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