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1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py2# RUN: llvm-mca -mtriple=riscv64 -mcpu=sifive-p870 -iterations=1 -instruction-tables=full < %s | FileCheck %s3 4vsetvli zero, zero, e8, mf8, tu, mu5vmv1r.v v8, v166vsetvli zero, zero, e8, mf4, tu, mu7vmv1r.v v8, v168vsetvli zero, zero, e8, mf2, tu, mu9vmv1r.v v8, v1610vsetvli zero, zero, e8, m1, tu, mu11vmv1r.v v8, v1612vsetvli zero, zero, e8, m1, tu, mu13vmv1r.v v8, v1614vsetvli zero, zero, e8, m2, tu, mu15vmv1r.v v8, v1616vsetvli zero, zero, e8, m4, tu, mu17vmv1r.v v8, v1618vsetvli zero, zero, e8, m8, tu, mu19vmv1r.v v8, v1620vsetvli zero, zero, e16, mf4, tu, mu21vmv1r.v v8, v1622vsetvli zero, zero, e16, mf2, tu, mu23vmv1r.v v8, v1624vsetvli zero, zero, e16, m1, tu, mu25vmv1r.v v8, v1626vsetvli zero, zero, e16, m1, tu, mu27vmv1r.v v8, v1628vsetvli zero, zero, e16, m2, tu, mu29vmv1r.v v8, v1630vsetvli zero, zero, e16, m4, tu, mu31vmv1r.v v8, v1632vsetvli zero, zero, e16, m8, tu, mu33vmv1r.v v8, v1634vsetvli zero, zero, e32, mf2, tu, mu35vmv1r.v v8, v1636vsetvli zero, zero, e32, m1, tu, mu37vmv1r.v v8, v1638vsetvli zero, zero, e32, m1, tu, mu39vmv1r.v v8, v1640vsetvli zero, zero, e32, m2, tu, mu41vmv1r.v v8, v1642vsetvli zero, zero, e32, m4, tu, mu43vmv1r.v v8, v1644vsetvli zero, zero, e32, m8, tu, mu45vmv1r.v v8, v1646vsetvli zero, zero, e64, m1, tu, mu47vmv1r.v v8, v1648vsetvli zero, zero, e64, m1, tu, mu49vmv1r.v v8, v1650vsetvli zero, zero, e64, m2, tu, mu51vmv1r.v v8, v1652vsetvli zero, zero, e64, m4, tu, mu53vmv1r.v v8, v1654vsetvli zero, zero, e64, m8, tu, mu55vmv1r.v v8, v1656vsetvli zero, zero, e8, mf8, tu, mu57vmv2r.v v8, v1658vsetvli zero, zero, e8, mf4, tu, mu59vmv2r.v v8, v1660vsetvli zero, zero, e8, mf2, tu, mu61vmv2r.v v8, v1662vsetvli zero, zero, e8, m1, tu, mu63vmv2r.v v8, v1664vsetvli zero, zero, e8, m1, tu, mu65vmv2r.v v8, v1666vsetvli zero, zero, e8, m2, tu, mu67vmv2r.v v8, v1668vsetvli zero, zero, e8, m4, tu, mu69vmv2r.v v8, v1670vsetvli zero, zero, e8, m8, tu, mu71vmv2r.v v8, v1672vsetvli zero, zero, e16, mf4, tu, mu73vmv2r.v v8, v1674vsetvli zero, zero, e16, mf2, tu, mu75vmv2r.v v8, v1676vsetvli zero, zero, e16, m1, tu, mu77vmv2r.v v8, v1678vsetvli zero, zero, e16, m1, tu, mu79vmv2r.v v8, v1680vsetvli zero, zero, e16, m2, tu, mu81vmv2r.v v8, v1682vsetvli zero, zero, e16, m4, tu, mu83vmv2r.v v8, v1684vsetvli zero, zero, e16, m8, tu, mu85vmv2r.v v8, v1686vsetvli zero, zero, e32, mf2, tu, mu87vmv2r.v v8, v1688vsetvli zero, zero, e32, m1, tu, mu89vmv2r.v v8, v1690vsetvli zero, zero, e32, m1, tu, mu91vmv2r.v v8, v1692vsetvli zero, zero, e32, m2, tu, mu93vmv2r.v v8, v1694vsetvli zero, zero, e32, m4, tu, mu95vmv2r.v v8, v1696vsetvli zero, zero, e32, m8, tu, mu97vmv2r.v v8, v1698vsetvli zero, zero, e64, m1, tu, mu99vmv2r.v v8, v16100vsetvli zero, zero, e64, m1, tu, mu101vmv2r.v v8, v16102vsetvli zero, zero, e64, m2, tu, mu103vmv2r.v v8, v16104vsetvli zero, zero, e64, m4, tu, mu105vmv2r.v v8, v16106vsetvli zero, zero, e64, m8, tu, mu107vmv2r.v v8, v16108vsetvli zero, zero, e8, mf8, tu, mu109vmv4r.v v8, v16110vsetvli zero, zero, e8, mf4, tu, mu111vmv4r.v v8, v16112vsetvli zero, zero, e8, mf2, tu, mu113vmv4r.v v8, v16114vsetvli zero, zero, e8, m1, tu, mu115vmv4r.v v8, v16116vsetvli zero, zero, e8, m1, tu, mu117vmv4r.v v8, v16118vsetvli zero, zero, e8, m2, tu, mu119vmv4r.v v8, v16120vsetvli zero, zero, e8, m4, tu, mu121vmv4r.v v8, v16122vsetvli zero, zero, e8, m8, tu, mu123vmv4r.v v8, v16124vsetvli zero, zero, e16, mf4, tu, mu125vmv4r.v v8, v16126vsetvli zero, zero, e16, mf2, tu, mu127vmv4r.v v8, v16128vsetvli zero, zero, e16, m1, tu, mu129vmv4r.v v8, v16130vsetvli zero, zero, e16, m1, tu, mu131vmv4r.v v8, v16132vsetvli zero, zero, e16, m2, tu, mu133vmv4r.v v8, v16134vsetvli zero, zero, e16, m4, tu, mu135vmv4r.v v8, v16136vsetvli zero, zero, e16, m8, tu, mu137vmv4r.v v8, v16138vsetvli zero, zero, e32, mf2, tu, mu139vmv4r.v v8, v16140vsetvli zero, zero, e32, m1, tu, mu141vmv4r.v v8, v16142vsetvli zero, zero, e32, m1, tu, mu143vmv4r.v v8, v16144vsetvli zero, zero, e32, m2, tu, mu145vmv4r.v v8, v16146vsetvli zero, zero, e32, m4, tu, mu147vmv4r.v v8, v16148vsetvli zero, zero, e32, m8, tu, mu149vmv4r.v v8, v16150vsetvli zero, zero, e64, m1, tu, mu151vmv4r.v v8, v16152vsetvli zero, zero, e64, m1, tu, mu153vmv4r.v v8, v16154vsetvli zero, zero, e64, m2, tu, mu155vmv4r.v v8, v16156vsetvli zero, zero, e64, m4, tu, mu157vmv4r.v v8, v16158vsetvli zero, zero, e64, m8, tu, mu159vmv4r.v v8, v16160vsetvli zero, zero, e8, mf8, tu, mu161vmv8r.v v8, v16162vsetvli zero, zero, e8, mf4, tu, mu163vmv8r.v v8, v16164vsetvli zero, zero, e8, mf2, tu, mu165vmv8r.v v8, v16166vsetvli zero, zero, e8, m1, tu, mu167vmv8r.v v8, v16168vsetvli zero, zero, e8, m1, tu, mu169vmv8r.v v8, v16170vsetvli zero, zero, e8, m2, tu, mu171vmv8r.v v8, v16172vsetvli zero, zero, e8, m4, tu, mu173vmv8r.v v8, v16174vsetvli zero, zero, e8, m8, tu, mu175vmv8r.v v8, v16176vsetvli zero, zero, e16, mf4, tu, mu177vmv8r.v v8, v16178vsetvli zero, zero, e16, mf2, tu, mu179vmv8r.v v8, v16180vsetvli zero, zero, e16, m1, tu, mu181vmv8r.v v8, v16182vsetvli zero, zero, e16, m1, tu, mu183vmv8r.v v8, v16184vsetvli zero, zero, e16, m2, tu, mu185vmv8r.v v8, v16186vsetvli zero, zero, e16, m4, tu, mu187vmv8r.v v8, v16188vsetvli zero, zero, e16, m8, tu, mu189vmv8r.v v8, v16190vsetvli zero, zero, e32, mf2, tu, mu191vmv8r.v v8, v16192vsetvli zero, zero, e32, m1, tu, mu193vmv8r.v v8, v16194vsetvli zero, zero, e32, m1, tu, mu195vmv8r.v v8, v16196vsetvli zero, zero, e32, m2, tu, mu197vmv8r.v v8, v16198vsetvli zero, zero, e32, m4, tu, mu199vmv8r.v v8, v16200vsetvli zero, zero, e32, m8, tu, mu201vmv8r.v v8, v16202vsetvli zero, zero, e64, m1, tu, mu203vmv8r.v v8, v16204vsetvli zero, zero, e64, m1, tu, mu205vmv8r.v v8, v16206vsetvli zero, zero, e64, m2, tu, mu207vmv8r.v v8, v16208vsetvli zero, zero, e64, m4, tu, mu209vmv8r.v v8, v16210vsetvli zero, zero, e64, m8, tu, mu211vmv8r.v v8, v16212 213# CHECK: Resources:214# CHECK-NEXT: [0] - SiFiveP800Branch:2 SiFiveP800IEXQ4, SiFiveP800IEXQ5215# CHECK-NEXT: [1] - SiFiveP800Div:1216# CHECK-NEXT: [2] - SiFiveP800FEXQ0:1217# CHECK-NEXT: [3] - SiFiveP800FEXQ1:1218# CHECK-NEXT: [4] - SiFiveP800FloatArith:2 SiFiveP800FEXQ0, SiFiveP800FEXQ1219# CHECK-NEXT: [5] - SiFiveP800FloatDiv:1220# CHECK-NEXT: [6] - SiFiveP800IEXQ0:1221# CHECK-NEXT: [7] - SiFiveP800IEXQ1:1222# CHECK-NEXT: [8] - SiFiveP800IEXQ2:1223# CHECK-NEXT: [9] - SiFiveP800IEXQ3:1224# CHECK-NEXT: [10] - SiFiveP800IEXQ4:1225# CHECK-NEXT: [11] - SiFiveP800IEXQ5:1226# CHECK-NEXT: [12] - SiFiveP800IntArith:4 SiFiveP800IEXQ0, SiFiveP800IEXQ1, SiFiveP800IEXQ2, SiFiveP800IEXQ3227# CHECK-NEXT: [13] - SiFiveP800LD:1228# CHECK-NEXT: [14] - SiFiveP800LDST:2229# CHECK-NEXT: [15] - SiFiveP800Load:3 SiFiveP800LDST, SiFiveP800LDST, SiFiveP800LD230# CHECK-NEXT: [16] - SiFiveP800Mul:2 SiFiveP800IEXQ1, SiFiveP800IEXQ3231# CHECK-NEXT: [17] - SiFiveP800VDiv:1232# CHECK-NEXT: [18] - SiFiveP800VEXQ0:1233# CHECK-NEXT: [19] - SiFiveP800VEXQ1:1234# CHECK-NEXT: [20] - SiFiveP800VFloatDiv:1235# CHECK-NEXT: [21] - SiFiveP800VLD:1236# CHECK-NEXT: [22] - SiFiveP800VST:1237# CHECK-NEXT: [23] - SiFiveP800VectorArith:2 SiFiveP800VEXQ0, SiFiveP800VEXQ1238 239# CHECK: Instruction Info:240# CHECK-NEXT: [1]: #uOps241# CHECK-NEXT: [2]: Latency242# CHECK-NEXT: [3]: RThroughput243# CHECK-NEXT: [4]: MayLoad244# CHECK-NEXT: [5]: MayStore245# CHECK-NEXT: [6]: HasSideEffects (U)246# CHECK-NEXT: [7]: Bypass Latency247# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])248# CHECK-NEXT: [9]: LLVM Opcode Name249 250# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:251# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf8, tu, mu252# CHECK-NEXT: 1 2 0.50 2 SiFiveP800VectorArith VMV1R_V vmv1r.v v8, v16253# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf4, tu, mu254# CHECK-NEXT: 1 2 0.50 2 SiFiveP800VectorArith VMV1R_V vmv1r.v v8, v16255# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf2, tu, mu256# CHECK-NEXT: 1 2 0.50 2 SiFiveP800VectorArith VMV1R_V vmv1r.v v8, v16257# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m1, tu, mu258# CHECK-NEXT: 1 2 0.50 2 SiFiveP800VectorArith VMV1R_V vmv1r.v v8, v16259# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m1, tu, mu260# CHECK-NEXT: 1 2 0.50 2 SiFiveP800VectorArith VMV1R_V vmv1r.v v8, v16261# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m2, tu, mu262# CHECK-NEXT: 1 2 0.50 2 SiFiveP800VectorArith VMV1R_V vmv1r.v v8, v16263# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m4, tu, mu264# CHECK-NEXT: 1 2 0.50 2 SiFiveP800VectorArith VMV1R_V vmv1r.v v8, v16265# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m8, tu, mu266# CHECK-NEXT: 1 2 0.50 2 SiFiveP800VectorArith VMV1R_V vmv1r.v v8, v16267# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, mf4, tu, mu268# CHECK-NEXT: 1 2 0.50 2 SiFiveP800VectorArith VMV1R_V vmv1r.v v8, v16269# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, mf2, tu, mu270# CHECK-NEXT: 1 2 0.50 2 SiFiveP800VectorArith VMV1R_V vmv1r.v v8, v16271# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m1, tu, mu272# CHECK-NEXT: 1 2 0.50 2 SiFiveP800VectorArith VMV1R_V vmv1r.v v8, v16273# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m1, tu, mu274# CHECK-NEXT: 1 2 0.50 2 SiFiveP800VectorArith VMV1R_V vmv1r.v v8, v16275# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m2, tu, mu276# CHECK-NEXT: 1 2 0.50 2 SiFiveP800VectorArith VMV1R_V vmv1r.v v8, v16277# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m4, tu, mu278# CHECK-NEXT: 1 2 0.50 2 SiFiveP800VectorArith VMV1R_V vmv1r.v v8, v16279# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m8, tu, mu280# CHECK-NEXT: 1 2 0.50 2 SiFiveP800VectorArith VMV1R_V vmv1r.v v8, v16281# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, mf2, tu, mu282# CHECK-NEXT: 1 2 0.50 2 SiFiveP800VectorArith VMV1R_V vmv1r.v v8, v16283# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m1, tu, mu284# CHECK-NEXT: 1 2 0.50 2 SiFiveP800VectorArith VMV1R_V vmv1r.v v8, v16285# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m1, tu, mu286# CHECK-NEXT: 1 2 0.50 2 SiFiveP800VectorArith VMV1R_V vmv1r.v v8, v16287# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m2, tu, mu288# CHECK-NEXT: 1 2 0.50 2 SiFiveP800VectorArith VMV1R_V vmv1r.v v8, v16289# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m4, tu, mu290# CHECK-NEXT: 1 2 0.50 2 SiFiveP800VectorArith VMV1R_V vmv1r.v v8, v16291# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m8, tu, mu292# CHECK-NEXT: 1 2 0.50 2 SiFiveP800VectorArith VMV1R_V vmv1r.v v8, v16293# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m1, tu, mu294# CHECK-NEXT: 1 2 0.50 2 SiFiveP800VectorArith VMV1R_V vmv1r.v v8, v16295# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m1, tu, mu296# CHECK-NEXT: 1 2 0.50 2 SiFiveP800VectorArith VMV1R_V vmv1r.v v8, v16297# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m2, tu, mu298# CHECK-NEXT: 1 2 0.50 2 SiFiveP800VectorArith VMV1R_V vmv1r.v v8, v16299# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m4, tu, mu300# CHECK-NEXT: 1 2 0.50 2 SiFiveP800VectorArith VMV1R_V vmv1r.v v8, v16301# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m8, tu, mu302# CHECK-NEXT: 1 2 0.50 2 SiFiveP800VectorArith VMV1R_V vmv1r.v v8, v16303# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf8, tu, mu304# CHECK-NEXT: 1 2 1.00 2 SiFiveP800VectorArith[2] VMV2R_V vmv2r.v v8, v16305# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf4, tu, mu306# CHECK-NEXT: 1 2 1.00 2 SiFiveP800VectorArith[2] VMV2R_V vmv2r.v v8, v16307# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf2, tu, mu308# CHECK-NEXT: 1 2 1.00 2 SiFiveP800VectorArith[2] VMV2R_V vmv2r.v v8, v16309# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m1, tu, mu310# CHECK-NEXT: 1 2 1.00 2 SiFiveP800VectorArith[2] VMV2R_V vmv2r.v v8, v16311# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m1, tu, mu312# CHECK-NEXT: 1 2 1.00 2 SiFiveP800VectorArith[2] VMV2R_V vmv2r.v v8, v16313# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m2, tu, mu314# CHECK-NEXT: 1 2 1.00 2 SiFiveP800VectorArith[2] VMV2R_V vmv2r.v v8, v16315# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m4, tu, mu316# CHECK-NEXT: 1 2 1.00 2 SiFiveP800VectorArith[2] VMV2R_V vmv2r.v v8, v16317# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m8, tu, mu318# CHECK-NEXT: 1 2 1.00 2 SiFiveP800VectorArith[2] VMV2R_V vmv2r.v v8, v16319# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, mf4, tu, mu320# CHECK-NEXT: 1 2 1.00 2 SiFiveP800VectorArith[2] VMV2R_V vmv2r.v v8, v16321# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, mf2, tu, mu322# CHECK-NEXT: 1 2 1.00 2 SiFiveP800VectorArith[2] VMV2R_V vmv2r.v v8, v16323# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m1, tu, mu324# CHECK-NEXT: 1 2 1.00 2 SiFiveP800VectorArith[2] VMV2R_V vmv2r.v v8, v16325# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m1, tu, mu326# CHECK-NEXT: 1 2 1.00 2 SiFiveP800VectorArith[2] VMV2R_V vmv2r.v v8, v16327# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m2, tu, mu328# CHECK-NEXT: 1 2 1.00 2 SiFiveP800VectorArith[2] VMV2R_V vmv2r.v v8, v16329# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m4, tu, mu330# CHECK-NEXT: 1 2 1.00 2 SiFiveP800VectorArith[2] VMV2R_V vmv2r.v v8, v16331# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m8, tu, mu332# CHECK-NEXT: 1 2 1.00 2 SiFiveP800VectorArith[2] VMV2R_V vmv2r.v v8, v16333# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, mf2, tu, mu334# CHECK-NEXT: 1 2 1.00 2 SiFiveP800VectorArith[2] VMV2R_V vmv2r.v v8, v16335# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m1, tu, mu336# CHECK-NEXT: 1 2 1.00 2 SiFiveP800VectorArith[2] VMV2R_V vmv2r.v v8, v16337# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m1, tu, mu338# CHECK-NEXT: 1 2 1.00 2 SiFiveP800VectorArith[2] VMV2R_V vmv2r.v v8, v16339# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m2, tu, mu340# CHECK-NEXT: 1 2 1.00 2 SiFiveP800VectorArith[2] VMV2R_V vmv2r.v v8, v16341# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m4, tu, mu342# CHECK-NEXT: 1 2 1.00 2 SiFiveP800VectorArith[2] VMV2R_V vmv2r.v v8, v16343# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m8, tu, mu344# CHECK-NEXT: 1 2 1.00 2 SiFiveP800VectorArith[2] VMV2R_V vmv2r.v v8, v16345# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m1, tu, mu346# CHECK-NEXT: 1 2 1.00 2 SiFiveP800VectorArith[2] VMV2R_V vmv2r.v v8, v16347# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m1, tu, mu348# CHECK-NEXT: 1 2 1.00 2 SiFiveP800VectorArith[2] VMV2R_V vmv2r.v v8, v16349# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m2, tu, mu350# CHECK-NEXT: 1 2 1.00 2 SiFiveP800VectorArith[2] VMV2R_V vmv2r.v v8, v16351# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m4, tu, mu352# CHECK-NEXT: 1 2 1.00 2 SiFiveP800VectorArith[2] VMV2R_V vmv2r.v v8, v16353# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m8, tu, mu354# CHECK-NEXT: 1 2 1.00 2 SiFiveP800VectorArith[2] VMV2R_V vmv2r.v v8, v16355# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf8, tu, mu356# CHECK-NEXT: 1 2 2.00 2 SiFiveP800VectorArith[4] VMV4R_V vmv4r.v v8, v16357# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf4, tu, mu358# CHECK-NEXT: 1 2 2.00 2 SiFiveP800VectorArith[4] VMV4R_V vmv4r.v v8, v16359# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf2, tu, mu360# CHECK-NEXT: 1 2 2.00 2 SiFiveP800VectorArith[4] VMV4R_V vmv4r.v v8, v16361# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m1, tu, mu362# CHECK-NEXT: 1 2 2.00 2 SiFiveP800VectorArith[4] VMV4R_V vmv4r.v v8, v16363# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m1, tu, mu364# CHECK-NEXT: 1 2 2.00 2 SiFiveP800VectorArith[4] VMV4R_V vmv4r.v v8, v16365# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m2, tu, mu366# CHECK-NEXT: 1 2 2.00 2 SiFiveP800VectorArith[4] VMV4R_V vmv4r.v v8, v16367# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m4, tu, mu368# CHECK-NEXT: 1 2 2.00 2 SiFiveP800VectorArith[4] VMV4R_V vmv4r.v v8, v16369# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m8, tu, mu370# CHECK-NEXT: 1 2 2.00 2 SiFiveP800VectorArith[4] VMV4R_V vmv4r.v v8, v16371# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, mf4, tu, mu372# CHECK-NEXT: 1 2 2.00 2 SiFiveP800VectorArith[4] VMV4R_V vmv4r.v v8, v16373# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, mf2, tu, mu374# CHECK-NEXT: 1 2 2.00 2 SiFiveP800VectorArith[4] VMV4R_V vmv4r.v v8, v16375# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m1, tu, mu376# CHECK-NEXT: 1 2 2.00 2 SiFiveP800VectorArith[4] VMV4R_V vmv4r.v v8, v16377# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m1, tu, mu378# CHECK-NEXT: 1 2 2.00 2 SiFiveP800VectorArith[4] VMV4R_V vmv4r.v v8, v16379# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m2, tu, mu380# CHECK-NEXT: 1 2 2.00 2 SiFiveP800VectorArith[4] VMV4R_V vmv4r.v v8, v16381# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m4, tu, mu382# CHECK-NEXT: 1 2 2.00 2 SiFiveP800VectorArith[4] VMV4R_V vmv4r.v v8, v16383# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m8, tu, mu384# CHECK-NEXT: 1 2 2.00 2 SiFiveP800VectorArith[4] VMV4R_V vmv4r.v v8, v16385# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, mf2, tu, mu386# CHECK-NEXT: 1 2 2.00 2 SiFiveP800VectorArith[4] VMV4R_V vmv4r.v v8, v16387# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m1, tu, mu388# CHECK-NEXT: 1 2 2.00 2 SiFiveP800VectorArith[4] VMV4R_V vmv4r.v v8, v16389# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m1, tu, mu390# CHECK-NEXT: 1 2 2.00 2 SiFiveP800VectorArith[4] VMV4R_V vmv4r.v v8, v16391# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m2, tu, mu392# CHECK-NEXT: 1 2 2.00 2 SiFiveP800VectorArith[4] VMV4R_V vmv4r.v v8, v16393# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m4, tu, mu394# CHECK-NEXT: 1 2 2.00 2 SiFiveP800VectorArith[4] VMV4R_V vmv4r.v v8, v16395# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m8, tu, mu396# CHECK-NEXT: 1 2 2.00 2 SiFiveP800VectorArith[4] VMV4R_V vmv4r.v v8, v16397# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m1, tu, mu398# CHECK-NEXT: 1 2 2.00 2 SiFiveP800VectorArith[4] VMV4R_V vmv4r.v v8, v16399# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m1, tu, mu400# CHECK-NEXT: 1 2 2.00 2 SiFiveP800VectorArith[4] VMV4R_V vmv4r.v v8, v16401# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m2, tu, mu402# CHECK-NEXT: 1 2 2.00 2 SiFiveP800VectorArith[4] VMV4R_V vmv4r.v v8, v16403# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m4, tu, mu404# CHECK-NEXT: 1 2 2.00 2 SiFiveP800VectorArith[4] VMV4R_V vmv4r.v v8, v16405# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m8, tu, mu406# CHECK-NEXT: 1 2 2.00 2 SiFiveP800VectorArith[4] VMV4R_V vmv4r.v v8, v16407# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf8, tu, mu408# CHECK-NEXT: 1 2 4.00 2 SiFiveP800VectorArith[8] VMV8R_V vmv8r.v v8, v16409# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf4, tu, mu410# CHECK-NEXT: 1 2 4.00 2 SiFiveP800VectorArith[8] VMV8R_V vmv8r.v v8, v16411# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, mf2, tu, mu412# CHECK-NEXT: 1 2 4.00 2 SiFiveP800VectorArith[8] VMV8R_V vmv8r.v v8, v16413# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m1, tu, mu414# CHECK-NEXT: 1 2 4.00 2 SiFiveP800VectorArith[8] VMV8R_V vmv8r.v v8, v16415# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m1, tu, mu416# CHECK-NEXT: 1 2 4.00 2 SiFiveP800VectorArith[8] VMV8R_V vmv8r.v v8, v16417# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m2, tu, mu418# CHECK-NEXT: 1 2 4.00 2 SiFiveP800VectorArith[8] VMV8R_V vmv8r.v v8, v16419# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m4, tu, mu420# CHECK-NEXT: 1 2 4.00 2 SiFiveP800VectorArith[8] VMV8R_V vmv8r.v v8, v16421# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e8, m8, tu, mu422# CHECK-NEXT: 1 2 4.00 2 SiFiveP800VectorArith[8] VMV8R_V vmv8r.v v8, v16423# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, mf4, tu, mu424# CHECK-NEXT: 1 2 4.00 2 SiFiveP800VectorArith[8] VMV8R_V vmv8r.v v8, v16425# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, mf2, tu, mu426# CHECK-NEXT: 1 2 4.00 2 SiFiveP800VectorArith[8] VMV8R_V vmv8r.v v8, v16427# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m1, tu, mu428# CHECK-NEXT: 1 2 4.00 2 SiFiveP800VectorArith[8] VMV8R_V vmv8r.v v8, v16429# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m1, tu, mu430# CHECK-NEXT: 1 2 4.00 2 SiFiveP800VectorArith[8] VMV8R_V vmv8r.v v8, v16431# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m2, tu, mu432# CHECK-NEXT: 1 2 4.00 2 SiFiveP800VectorArith[8] VMV8R_V vmv8r.v v8, v16433# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m4, tu, mu434# CHECK-NEXT: 1 2 4.00 2 SiFiveP800VectorArith[8] VMV8R_V vmv8r.v v8, v16435# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e16, m8, tu, mu436# CHECK-NEXT: 1 2 4.00 2 SiFiveP800VectorArith[8] VMV8R_V vmv8r.v v8, v16437# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, mf2, tu, mu438# CHECK-NEXT: 1 2 4.00 2 SiFiveP800VectorArith[8] VMV8R_V vmv8r.v v8, v16439# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m1, tu, mu440# CHECK-NEXT: 1 2 4.00 2 SiFiveP800VectorArith[8] VMV8R_V vmv8r.v v8, v16441# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m1, tu, mu442# CHECK-NEXT: 1 2 4.00 2 SiFiveP800VectorArith[8] VMV8R_V vmv8r.v v8, v16443# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m2, tu, mu444# CHECK-NEXT: 1 2 4.00 2 SiFiveP800VectorArith[8] VMV8R_V vmv8r.v v8, v16445# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m4, tu, mu446# CHECK-NEXT: 1 2 4.00 2 SiFiveP800VectorArith[8] VMV8R_V vmv8r.v v8, v16447# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m8, tu, mu448# CHECK-NEXT: 1 2 4.00 2 SiFiveP800VectorArith[8] VMV8R_V vmv8r.v v8, v16449# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m1, tu, mu450# CHECK-NEXT: 1 2 4.00 2 SiFiveP800VectorArith[8] VMV8R_V vmv8r.v v8, v16451# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m1, tu, mu452# CHECK-NEXT: 1 2 4.00 2 SiFiveP800VectorArith[8] VMV8R_V vmv8r.v v8, v16453# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m2, tu, mu454# CHECK-NEXT: 1 2 4.00 2 SiFiveP800VectorArith[8] VMV8R_V vmv8r.v v8, v16455# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m4, tu, mu456# CHECK-NEXT: 1 2 4.00 2 SiFiveP800VectorArith[8] VMV8R_V vmv8r.v v8, v16457# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e64, m8, tu, mu458# CHECK-NEXT: 1 2 4.00 2 SiFiveP800VectorArith[8] VMV8R_V vmv8r.v v8, v16459 460# CHECK: Resources:461# CHECK-NEXT: [0] - SiFiveP800Div462# CHECK-NEXT: [1] - SiFiveP800FEXQ0463# CHECK-NEXT: [2] - SiFiveP800FEXQ1464# CHECK-NEXT: [3] - SiFiveP800FloatDiv465# CHECK-NEXT: [4] - SiFiveP800IEXQ0466# CHECK-NEXT: [5] - SiFiveP800IEXQ1467# CHECK-NEXT: [6] - SiFiveP800IEXQ2468# CHECK-NEXT: [7] - SiFiveP800IEXQ3469# CHECK-NEXT: [8] - SiFiveP800IEXQ4470# CHECK-NEXT: [9] - SiFiveP800IEXQ5471# CHECK-NEXT: [10] - SiFiveP800LD472# CHECK-NEXT: [11.0] - SiFiveP800LDST473# CHECK-NEXT: [11.1] - SiFiveP800LDST474# CHECK-NEXT: [12] - SiFiveP800VDiv475# CHECK-NEXT: [13] - SiFiveP800VEXQ0476# CHECK-NEXT: [14] - SiFiveP800VEXQ1477# CHECK-NEXT: [15] - SiFiveP800VFloatDiv478# CHECK-NEXT: [16] - SiFiveP800VLD479# CHECK-NEXT: [17] - SiFiveP800VST480 481# CHECK: Resource pressure per iteration:482# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11.0] [11.1] [12] [13] [14] [15] [16] [17]483# CHECK-NEXT: - - - - - 104.00 - - - - - - - - 195.00 195.00 - - -484 485# CHECK: Resource pressure by instruction:486# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11.0] [11.1] [12] [13] [14] [15] [16] [17] Instructions:487# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf8, tu, mu488# CHECK-NEXT: - - - - - - - - - - - - - - 0.50 0.50 - - - vmv1r.v v8, v16489# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf4, tu, mu490# CHECK-NEXT: - - - - - - - - - - - - - - 0.50 0.50 - - - vmv1r.v v8, v16491# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf2, tu, mu492# CHECK-NEXT: - - - - - - - - - - - - - - 0.50 0.50 - - - vmv1r.v v8, v16493# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m1, tu, mu494# CHECK-NEXT: - - - - - - - - - - - - - - 0.50 0.50 - - - vmv1r.v v8, v16495# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m1, tu, mu496# CHECK-NEXT: - - - - - - - - - - - - - - 0.50 0.50 - - - vmv1r.v v8, v16497# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m2, tu, mu498# CHECK-NEXT: - - - - - - - - - - - - - - 0.50 0.50 - - - vmv1r.v v8, v16499# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m4, tu, mu500# CHECK-NEXT: - - - - - - - - - - - - - - 0.50 0.50 - - - vmv1r.v v8, v16501# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m8, tu, mu502# CHECK-NEXT: - - - - - - - - - - - - - - 0.50 0.50 - - - vmv1r.v v8, v16503# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, mf4, tu, mu504# CHECK-NEXT: - - - - - - - - - - - - - - 0.50 0.50 - - - vmv1r.v v8, v16505# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, mf2, tu, mu506# CHECK-NEXT: - - - - - - - - - - - - - - 0.50 0.50 - - - vmv1r.v v8, v16507# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m1, tu, mu508# CHECK-NEXT: - - - - - - - - - - - - - - 0.50 0.50 - - - vmv1r.v v8, v16509# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m1, tu, mu510# CHECK-NEXT: - - - - - - - - - - - - - - 0.50 0.50 - - - vmv1r.v v8, v16511# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m2, tu, mu512# CHECK-NEXT: - - - - - - - - - - - - - - 0.50 0.50 - - - vmv1r.v v8, v16513# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m4, tu, mu514# CHECK-NEXT: - - - - - - - - - - - - - - 0.50 0.50 - - - vmv1r.v v8, v16515# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m8, tu, mu516# CHECK-NEXT: - - - - - - - - - - - - - - 0.50 0.50 - - - vmv1r.v v8, v16517# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, mf2, tu, mu518# CHECK-NEXT: - - - - - - - - - - - - - - 0.50 0.50 - - - vmv1r.v v8, v16519# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m1, tu, mu520# CHECK-NEXT: - - - - - - - - - - - - - - 0.50 0.50 - - - vmv1r.v v8, v16521# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m1, tu, mu522# CHECK-NEXT: - - - - - - - - - - - - - - 0.50 0.50 - - - vmv1r.v v8, v16523# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m2, tu, mu524# CHECK-NEXT: - - - - - - - - - - - - - - 0.50 0.50 - - - vmv1r.v v8, v16525# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m4, tu, mu526# CHECK-NEXT: - - - - - - - - - - - - - - 0.50 0.50 - - - vmv1r.v v8, v16527# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m8, tu, mu528# CHECK-NEXT: - - - - - - - - - - - - - - 0.50 0.50 - - - vmv1r.v v8, v16529# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m1, tu, mu530# CHECK-NEXT: - - - - - - - - - - - - - - 0.50 0.50 - - - vmv1r.v v8, v16531# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m1, tu, mu532# CHECK-NEXT: - - - - - - - - - - - - - - 0.50 0.50 - - - vmv1r.v v8, v16533# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m2, tu, mu534# CHECK-NEXT: - - - - - - - - - - - - - - 0.50 0.50 - - - vmv1r.v v8, v16535# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m4, tu, mu536# CHECK-NEXT: - - - - - - - - - - - - - - 0.50 0.50 - - - vmv1r.v v8, v16537# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m8, tu, mu538# CHECK-NEXT: - - - - - - - - - - - - - - 0.50 0.50 - - - vmv1r.v v8, v16539# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf8, tu, mu540# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 1.00 - - - vmv2r.v v8, v16541# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf4, tu, mu542# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 1.00 - - - vmv2r.v v8, v16543# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf2, tu, mu544# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 1.00 - - - vmv2r.v v8, v16545# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m1, tu, mu546# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 1.00 - - - vmv2r.v v8, v16547# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m1, tu, mu548# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 1.00 - - - vmv2r.v v8, v16549# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m2, tu, mu550# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 1.00 - - - vmv2r.v v8, v16551# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m4, tu, mu552# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 1.00 - - - vmv2r.v v8, v16553# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m8, tu, mu554# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 1.00 - - - vmv2r.v v8, v16555# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, mf4, tu, mu556# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 1.00 - - - vmv2r.v v8, v16557# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, mf2, tu, mu558# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 1.00 - - - vmv2r.v v8, v16559# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m1, tu, mu560# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 1.00 - - - vmv2r.v v8, v16561# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m1, tu, mu562# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 1.00 - - - vmv2r.v v8, v16563# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m2, tu, mu564# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 1.00 - - - vmv2r.v v8, v16565# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m4, tu, mu566# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 1.00 - - - vmv2r.v v8, v16567# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m8, tu, mu568# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 1.00 - - - vmv2r.v v8, v16569# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, mf2, tu, mu570# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 1.00 - - - vmv2r.v v8, v16571# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m1, tu, mu572# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 1.00 - - - vmv2r.v v8, v16573# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m1, tu, mu574# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 1.00 - - - vmv2r.v v8, v16575# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m2, tu, mu576# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 1.00 - - - vmv2r.v v8, v16577# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m4, tu, mu578# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 1.00 - - - vmv2r.v v8, v16579# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m8, tu, mu580# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 1.00 - - - vmv2r.v v8, v16581# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m1, tu, mu582# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 1.00 - - - vmv2r.v v8, v16583# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m1, tu, mu584# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 1.00 - - - vmv2r.v v8, v16585# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m2, tu, mu586# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 1.00 - - - vmv2r.v v8, v16587# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m4, tu, mu588# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 1.00 - - - vmv2r.v v8, v16589# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m8, tu, mu590# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 1.00 - - - vmv2r.v v8, v16591# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf8, tu, mu592# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 2.00 - - - vmv4r.v v8, v16593# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf4, tu, mu594# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 2.00 - - - vmv4r.v v8, v16595# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf2, tu, mu596# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 2.00 - - - vmv4r.v v8, v16597# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m1, tu, mu598# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 2.00 - - - vmv4r.v v8, v16599# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m1, tu, mu600# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 2.00 - - - vmv4r.v v8, v16601# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m2, tu, mu602# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 2.00 - - - vmv4r.v v8, v16603# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m4, tu, mu604# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 2.00 - - - vmv4r.v v8, v16605# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m8, tu, mu606# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 2.00 - - - vmv4r.v v8, v16607# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, mf4, tu, mu608# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 2.00 - - - vmv4r.v v8, v16609# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, mf2, tu, mu610# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 2.00 - - - vmv4r.v v8, v16611# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m1, tu, mu612# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 2.00 - - - vmv4r.v v8, v16613# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m1, tu, mu614# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 2.00 - - - vmv4r.v v8, v16615# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m2, tu, mu616# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 2.00 - - - vmv4r.v v8, v16617# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m4, tu, mu618# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 2.00 - - - vmv4r.v v8, v16619# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e16, m8, tu, mu620# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 2.00 - - - vmv4r.v v8, v16621# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, mf2, tu, mu622# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 2.00 - - - vmv4r.v v8, v16623# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m1, tu, mu624# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 2.00 - - - vmv4r.v v8, v16625# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m1, tu, mu626# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 2.00 - - - vmv4r.v v8, v16627# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m2, tu, mu628# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 2.00 - - - vmv4r.v v8, v16629# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m4, tu, mu630# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 2.00 - - - vmv4r.v v8, v16631# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m8, tu, mu632# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 2.00 - - - vmv4r.v v8, v16633# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m1, tu, mu634# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 2.00 - - - vmv4r.v v8, v16635# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m1, tu, mu636# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 2.00 - - - vmv4r.v v8, v16637# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m2, tu, mu638# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 2.00 - - - vmv4r.v v8, v16639# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m4, tu, mu640# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 2.00 - - - vmv4r.v v8, v16641# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e64, m8, tu, mu642# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 2.00 - - - vmv4r.v v8, v16643# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf8, tu, mu644# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 4.00 - - - vmv8r.v v8, v16645# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf4, tu, mu646# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 4.00 - - - vmv8r.v v8, v16647# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, mf2, tu, mu648# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 4.00 - - - vmv8r.v v8, v16649# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m1, tu, mu650# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 4.00 - - - vmv8r.v v8, v16651# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m1, tu, mu652# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 4.00 - - - vmv8r.v v8, v16653# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m2, tu, mu654# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 4.00 - - - vmv8r.v v8, v16655# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m4, tu, mu656# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 4.00 - - - vmv8r.v v8, v16657# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e8, m8, tu, mu658# CHECK-NEXT: - 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