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1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py2# RUN: llvm-mca -mtriple=riscv64 -mcpu=sifive-p870 -iterations=1 -instruction-tables=full < %s | FileCheck %s3 4# These instructions only support e325 6vsetvli zero, zero, e32, mf2, tu, mu7vsm3me.vv v4, v8, v128vsm3c.vi v4, v8, 89 10vsetvli zero, zero, e32, m1, tu, mu11vsm3me.vv v4, v8, v1212vsm3c.vi v4, v8, 813 14vsetvli zero, zero, e32, m2, tu, mu15vsm3me.vv v4, v8, v1216vsm3c.vi v4, v8, 817 18vsetvli zero, zero, e32, m4, tu, mu19vsm3me.vv v4, v8, v1220vsm3c.vi v4, v8, 821 22vsetvli zero, zero, e32, m8, tu, mu23vsm3me.vv v8, v16, v2424vsm3c.vi v8, v16, 825 26# CHECK: Resources:27# CHECK-NEXT: [0] - SiFiveP800Branch:2 SiFiveP800IEXQ4, SiFiveP800IEXQ528# CHECK-NEXT: [1] - SiFiveP800Div:129# CHECK-NEXT: [2] - SiFiveP800FEXQ0:130# CHECK-NEXT: [3] - SiFiveP800FEXQ1:131# CHECK-NEXT: [4] - SiFiveP800FloatArith:2 SiFiveP800FEXQ0, SiFiveP800FEXQ132# CHECK-NEXT: [5] - SiFiveP800FloatDiv:133# CHECK-NEXT: [6] - SiFiveP800IEXQ0:134# CHECK-NEXT: [7] - SiFiveP800IEXQ1:135# CHECK-NEXT: [8] - SiFiveP800IEXQ2:136# CHECK-NEXT: [9] - SiFiveP800IEXQ3:137# CHECK-NEXT: [10] - SiFiveP800IEXQ4:138# CHECK-NEXT: [11] - SiFiveP800IEXQ5:139# CHECK-NEXT: [12] - SiFiveP800IntArith:4 SiFiveP800IEXQ0, SiFiveP800IEXQ1, SiFiveP800IEXQ2, SiFiveP800IEXQ340# CHECK-NEXT: [13] - SiFiveP800LD:141# CHECK-NEXT: [14] - SiFiveP800LDST:242# CHECK-NEXT: [15] - SiFiveP800Load:3 SiFiveP800LDST, SiFiveP800LDST, SiFiveP800LD43# CHECK-NEXT: [16] - SiFiveP800Mul:2 SiFiveP800IEXQ1, SiFiveP800IEXQ344# CHECK-NEXT: [17] - SiFiveP800VDiv:145# CHECK-NEXT: [18] - SiFiveP800VEXQ0:146# CHECK-NEXT: [19] - SiFiveP800VEXQ1:147# CHECK-NEXT: [20] - SiFiveP800VFloatDiv:148# CHECK-NEXT: [21] - SiFiveP800VLD:149# CHECK-NEXT: [22] - SiFiveP800VST:150# CHECK-NEXT: [23] - SiFiveP800VectorArith:2 SiFiveP800VEXQ0, SiFiveP800VEXQ151 52# CHECK: Instruction Info:53# CHECK-NEXT: [1]: #uOps54# CHECK-NEXT: [2]: Latency55# CHECK-NEXT: [3]: RThroughput56# CHECK-NEXT: [4]: MayLoad57# CHECK-NEXT: [5]: MayStore58# CHECK-NEXT: [6]: HasSideEffects (U)59# CHECK-NEXT: [7]: Bypass Latency60# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])61# CHECK-NEXT: [9]: LLVM Opcode Name62 63# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:64# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, mf2, tu, mu65# CHECK-NEXT: 1 6 1.00 6 SiFiveP800VEXQ0,SiFiveP800VectorArith VSM3ME_VV vsm3me.vv v4, v8, v1266# CHECK-NEXT: 1 3 1.00 3 SiFiveP800VEXQ0,SiFiveP800VectorArith VSM3C_VI vsm3c.vi v4, v8, 867# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m1, tu, mu68# CHECK-NEXT: 1 6 1.00 6 SiFiveP800VEXQ0,SiFiveP800VectorArith VSM3ME_VV vsm3me.vv v4, v8, v1269# CHECK-NEXT: 1 3 1.00 3 SiFiveP800VEXQ0,SiFiveP800VectorArith VSM3C_VI vsm3c.vi v4, v8, 870# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m2, tu, mu71# CHECK-NEXT: 1 6 2.00 6 SiFiveP800VEXQ0[2],SiFiveP800VectorArith[2] VSM3ME_VV vsm3me.vv v4, v8, v1272# CHECK-NEXT: 1 3 1.00 3 SiFiveP800VEXQ0,SiFiveP800VectorArith VSM3C_VI vsm3c.vi v4, v8, 873# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m4, tu, mu74# CHECK-NEXT: 1 6 4.00 6 SiFiveP800VEXQ0[4],SiFiveP800VectorArith[4] VSM3ME_VV vsm3me.vv v4, v8, v1275# CHECK-NEXT: 1 3 2.00 3 SiFiveP800VEXQ0[2],SiFiveP800VectorArith[2] VSM3C_VI vsm3c.vi v4, v8, 876# CHECK-NEXT: 1 1 1.00 U 1 SiFiveP800IEXQ1,SiFiveP800IntArith,SiFiveP800Mul VSETVLI vsetvli zero, zero, e32, m8, tu, mu77# CHECK-NEXT: 1 6 8.00 6 SiFiveP800VEXQ0[8],SiFiveP800VectorArith[8] VSM3ME_VV vsm3me.vv v8, v16, v2478# CHECK-NEXT: 1 3 4.00 3 SiFiveP800VEXQ0[4],SiFiveP800VectorArith[4] VSM3C_VI vsm3c.vi v8, v16, 879 80# CHECK: Resources:81# CHECK-NEXT: [0] - SiFiveP800Div82# CHECK-NEXT: [1] - SiFiveP800FEXQ083# CHECK-NEXT: [2] - SiFiveP800FEXQ184# CHECK-NEXT: [3] - SiFiveP800FloatDiv85# CHECK-NEXT: [4] - SiFiveP800IEXQ086# CHECK-NEXT: [5] - SiFiveP800IEXQ187# CHECK-NEXT: [6] - SiFiveP800IEXQ288# CHECK-NEXT: [7] - SiFiveP800IEXQ389# CHECK-NEXT: [8] - SiFiveP800IEXQ490# CHECK-NEXT: [9] - SiFiveP800IEXQ591# CHECK-NEXT: [10] - SiFiveP800LD92# CHECK-NEXT: [11.0] - SiFiveP800LDST93# CHECK-NEXT: [11.1] - SiFiveP800LDST94# CHECK-NEXT: [12] - SiFiveP800VDiv95# CHECK-NEXT: [13] - SiFiveP800VEXQ096# CHECK-NEXT: [14] - SiFiveP800VEXQ197# CHECK-NEXT: [15] - SiFiveP800VFloatDiv98# CHECK-NEXT: [16] - SiFiveP800VLD99# CHECK-NEXT: [17] - SiFiveP800VST100 101# CHECK: Resource pressure per iteration:102# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11.0] [11.1] [12] [13] [14] [15] [16] [17]103# CHECK-NEXT: - - - - - 5.00 - - - - - - - - 25.00 - - - -104 105# CHECK: Resource pressure by instruction:106# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11.0] [11.1] [12] [13] [14] [15] [16] [17] Instructions:107# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, mf2, tu, mu108# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - - - vsm3me.vv v4, v8, v12109# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - - - vsm3c.vi v4, v8, 8110# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m1, tu, mu111# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - - - vsm3me.vv v4, v8, v12112# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - - - vsm3c.vi v4, v8, 8113# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m2, tu, mu114# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - - - vsm3me.vv v4, v8, v12115# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - - - vsm3c.vi v4, v8, 8116# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m4, tu, mu117# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - - - vsm3me.vv v4, v8, v12118# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - - - vsm3c.vi v4, v8, 8119# CHECK-NEXT: - - - - - 1.00 - - - - - - - - - - - - - vsetvli zero, zero, e32, m8, tu, mu120# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - - - vsm3me.vv v8, v16, v24121# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - - - vsm3c.vi v8, v16, 8122