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1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py2# RUN: llvm-mca -mtriple=riscv64 -mcpu=sifive-x390 -instruction-tables=full -iterations=1 < %s | FileCheck %s3 4# The legal (SEW, LMUL) pairs are:5# (e8, mf8) (e8, mf4) (e8, mf2) (e8, m1) (e8, m2) (e8, m4) (e8, m8)6# (e16, mf4) (e16, mf2) (e16, m1) (e16, m2) (e16, m4) (e16, m8)7# (e32, mf2) (e32, m1) (e32, m2) (e32, m4) (e32, m8)8# (e64, m1) (e64, m2) (e64, m4) (e64, m8)9# Widening instructions do not have e6410# Narrowing instructions do not have e811 12# Vector Single-Width Integer Add and Subtract13vsetvli zero, zero, e8, mf8, tu, mu14vadd.vv v4, v8, v1215vsetvli zero, zero, e8, mf4, tu, mu16vadd.vx v4, v8, x1017vsetvli zero, zero, e8, mf2, tu, mu18vadd.vi v4, v8, 019vsetvli zero, zero, e8, m1, tu, mu20vsub.vv v4, v8, v1221vsetvli zero, zero, e8, m2, tu, mu22vsub.vx v4, v8, x1023vsetvli zero, zero, e8, m4, tu, mu24vrsub.vx v4, v8, x1025vsetvli zero, zero, e8, m8, tu, mu26vrsub.vi v4, v8, 027vsetvli zero, zero, e16, mf4, tu, mu28vadd.vv v4, v8, v1229vsetvli zero, zero, e16, mf2, tu, mu30vadd.vx v4, v8, x1031vsetvli zero, zero, e16, m1, tu, mu32vadd.vi v4, v8, 033vsetvli zero, zero, e16, m2, tu, mu34vsub.vv v4, v8, v1235vsetvli zero, zero, e16, m4, tu, mu36vsub.vx v4, v8, x1037vsetvli zero, zero, e16, m8, tu, mu38vrsub.vx v4, v8, x1039vsetvli zero, zero, e32, mf2, tu, mu40vrsub.vi v4, v8, 041vsetvli zero, zero, e32, m1, tu, mu42vadd.vv v4, v8, v1243vsetvli zero, zero, e32, m2, tu, mu44vadd.vx v4, v8, x1045vsetvli zero, zero, e32, m4, tu, mu46vadd.vi v4, v8, 047vsetvli zero, zero, e32, m8, tu, mu48vsub.vv v4, v8, v1249vsetvli zero, zero, e64, m1, tu, mu50vsub.vx v4, v8, x1051vsetvli zero, zero, e64, m2, tu, mu52vrsub.vx v4, v8, x1053vsetvli zero, zero, e64, m4, tu, mu54vrsub.vi v4, v8, 055vsetvli zero, zero, e64, m8, tu, mu56vadd.vv v4, v8, v1257 58# Vector Widening Integer Add/Subtract59# no e6460vsetvli zero, zero, e8, mf8, tu, mu61vwaddu.vv v4, v8, v1262vsetvli zero, zero, e8, mf4, tu, mu63vwaddu.vx v4, v8, x1064vsetvli zero, zero, e8, mf2, tu, mu65vwsubu.vv v4, v8, v1266vsetvli zero, zero, e8, m1, tu, mu67vwsubu.vx v4, v8, x1068vsetvli zero, zero, e8, m2, tu, mu69vwadd.vv v4, v8, v1270vsetvli zero, zero, e8, m4, tu, mu71vwadd.vx v4, v8, x1072vsetvli zero, zero, e8, m8, tu, mu73vwsub.vv v4, v8, v1274vsetvli zero, zero, e16, mf4, tu, mu75vwsub.vx v4, v8, x1076vsetvli zero, zero, e16, mf2, tu, mu77vwaddu.wv v4, v8, v1278vsetvli zero, zero, e16, m1, tu, mu79vwaddu.wx v4, v8, x1080vsetvli zero, zero, e16, m2, tu, mu81vwsubu.wv v4, v8, v1282vsetvli zero, zero, e16, m4, tu, mu83vwsubu.wx v4, v8, x1084vsetvli zero, zero, e16, m8, tu, mu85vwadd.wv v4, v8, v1286vsetvli zero, zero, e32, mf2, tu, mu87vwadd.wx v4, v8, x1088vsetvli zero, zero, e32, m1, tu, mu89vwsub.wv v4, v8, v1290vsetvli zero, zero, e32, m2, tu, mu91vwsub.wx v4, v8, x1092vsetvli zero, zero, e32, m4, tu, mu93vwaddu.vv v4, v8, v1294vsetvli zero, zero, e32, m8, tu, mu95vwaddu.vx v4, v8, x1096 97# Vector Integer Extension98# no e899vsetvli zero, zero, e16, mf4, tu, mu100vzext.vf2 v4, v8101vsext.vf2 v4, v8102vsetvli zero, zero, e16, mf2, tu, mu103vzext.vf2 v4, v8104vsext.vf2 v4, v8105vsetvli zero, zero, e16, m1, tu, mu106vzext.vf2 v4, v8107vsext.vf2 v4, v8108vsetvli zero, zero, e16, m2, tu, mu109vzext.vf2 v4, v8110vsext.vf2 v4, v8111vsetvli zero, zero, e16, m4, tu, mu112vzext.vf2 v4, v8113vsext.vf2 v4, v8114vsetvli zero, zero, e16, m8, tu, mu115vzext.vf2 v4, v8116vsext.vf2 v4, v8117vsetvli zero, zero, e32, mf2, tu, mu118vzext.vf2 v4, v8119vsext.vf2 v4, v8120vzext.vf4 v4, v8121vsext.vf4 v4, v8122vsetvli zero, zero, e32, m1, tu, mu123vzext.vf2 v4, v8124vsext.vf2 v4, v8125vzext.vf4 v4, v8126vsext.vf4 v4, v8127vsetvli zero, zero, e32, m2, tu, mu128vzext.vf2 v4, v8129vsext.vf2 v4, v8130vzext.vf4 v4, v8131vsext.vf4 v4, v8132vsetvli zero, zero, e32, m4, tu, mu133vzext.vf2 v4, v8134vsext.vf2 v4, v8135vzext.vf4 v4, v8136vsext.vf4 v4, v8137vsetvli zero, zero, e32, m8, tu, mu138vzext.vf2 v4, v8139vsext.vf2 v4, v8140vzext.vf4 v4, v8141vsext.vf4 v4, v8142vsetvli zero, zero, e64, m1, tu, mu143vzext.vf2 v4, v8144vsext.vf2 v4, v8145vzext.vf4 v4, v8146vsext.vf4 v4, v8147vzext.vf8 v4, v8148vsext.vf8 v4, v8149vsetvli zero, zero, e64, m2, tu, mu150vzext.vf2 v4, v8151vsext.vf2 v4, v8152vzext.vf4 v4, v8153vsext.vf4 v4, v8154vzext.vf8 v4, v8155vsext.vf8 v4, v8156vsetvli zero, zero, e64, m4, tu, mu157vzext.vf2 v4, v8158vsext.vf2 v4, v8159vzext.vf4 v4, v8160vsext.vf4 v4, v8161vzext.vf8 v4, v8162vsext.vf8 v4, v8163vsetvli zero, zero, e64, m8, tu, mu164vzext.vf2 v4, v8165vsext.vf2 v4, v8166vzext.vf4 v4, v8167vsext.vf4 v4, v8168vzext.vf8 v4, v8169vsext.vf8 v4, v8170 171# Vector Integer Add-with-Carry / Subtract-with-Borrow Instructions172vsetvli zero, zero, e8, mf8, tu, mu173vadc.vvm v4, v8, v12, v0174vsetvli zero, zero, e8, mf4, tu, mu175vadc.vxm v4, v8, x10, v0176vsetvli zero, zero, e8, mf2, tu, mu177vadc.vim v4, v8, 0, v0178vsetvli zero, zero, e8, m1, tu, mu179vmadc.vvm v4, v8, v12, v0180vsetvli zero, zero, e8, m2, tu, mu181vmadc.vxm v4, v8, x10, v0182vsetvli zero, zero, e8, m4, tu, mu183vmadc.vim v4, v8, 0, v0184vsetvli zero, zero, e8, m8, tu, mu185vmadc.vv v4, v8, v12186vsetvli zero, zero, e16, mf4, tu, mu187vmadc.vx v4, v8, x10188vsetvli zero, zero, e16, mf2, tu, mu189vmadc.vi v4, v8, 0190vsetvli zero, zero, e16, m1, tu, mu191vsbc.vvm v4, v8, v12, v0192vsetvli zero, zero, e16, m2, tu, mu193vsbc.vxm v4, v8, x10, v0194vsetvli zero, zero, e16, m4, tu, mu195vmsbc.vvm v4, v8, v12, v0196vsetvli zero, zero, e16, m8, tu, mu197vmsbc.vxm v4, v8, x10, v0198vsetvli zero, zero, e32, mf2, tu, mu199vmsbc.vv v4, v8, v12200vsetvli zero, zero, e32, m1, tu, mu201vmsbc.vx v4, v8, x10202vsetvli zero, zero, e32, m2, tu, mu203vadc.vvm v4, v8, v12, v0204vsetvli zero, zero, e32, m4, tu, mu205vadc.vxm v4, v8, x10, v0206vsetvli zero, zero, e32, m8, tu, mu207vadc.vim v4, v8, 0, v0208vsetvli zero, zero, e64, m1, tu, mu209vmadc.vvm v4, v8, v12, v0210vsetvli zero, zero, e64, m2, tu, mu211vmadc.vxm v4, v8, x10, v0212vsetvli zero, zero, e64, m4, tu, mu213vmadc.vim v4, v8, 0, v0214vsetvli zero, zero, e64, m8, tu, mu215vmadc.vv v4, v8, v12216 217# Vector Bitwise Logical Instructions218vsetvli zero, zero, e8, mf8, tu, mu219vand.vv v4, v8, v12220vsetvli zero, zero, e8, mf4, tu, mu221vand.vx v4, v8, x10222vsetvli zero, zero, e8, mf2, tu, mu223vand.vi v4, v8, 0224vsetvli zero, zero, e8, m1, tu, mu225vor.vv v4, v8, v12226vsetvli zero, zero, e8, m2, tu, mu227vor.vx v4, v8, x10228vsetvli zero, zero, e8, m4, tu, mu229vor.vi v4, v8, 0230vsetvli zero, zero, e8, m8, tu, mu231vxor.vv v4, v8, v12232vsetvli zero, zero, e16, mf4, tu, mu233vxor.vx v4, v8, x10234vsetvli zero, zero, e16, mf2, tu, mu235vxor.vi v4, v8, 0236vsetvli zero, zero, e16, m1, tu, mu237vand.vv v4, v8, v12238vsetvli zero, zero, e16, m2, tu, mu239vand.vx v4, v8, x10240vsetvli zero, zero, e16, m4, tu, mu241vand.vi v4, v8, 0242vsetvli zero, zero, e16, m8, tu, mu243vor.vv v4, v8, v12244vsetvli zero, zero, e32, mf2, tu, mu245vor.vx v4, v8, x10246vsetvli zero, zero, e32, m1, tu, mu247vor.vi v4, v8, 0248vsetvli zero, zero, e32, m2, tu, mu249vxor.vv v4, v8, v12250vsetvli zero, zero, e32, m4, tu, mu251vxor.vx v4, v8, x10252vsetvli zero, zero, e32, m8, tu, mu253vxor.vi v4, v8, 0254vsetvli zero, zero, e64, m1, tu, mu255vand.vv v4, v8, v12256vsetvli zero, zero, e64, m2, tu, mu257vand.vx v4, v8, x10258vsetvli zero, zero, e64, m4, tu, mu259vand.vi v4, v8, 0260vsetvli zero, zero, e64, m8, tu, mu261vor.vv v4, v8, v12262 263# Vector Single-Width Shift Instructions264vsetvli zero, zero, e8, mf8, tu, mu265vsll.vv v4, v8, v12266vsetvli zero, zero, e8, mf4, tu, mu267vsll.vx v4, v8, x10268vsetvli zero, zero, e8, mf2, tu, mu269vsll.vi v4, v8, 0270vsetvli zero, zero, e8, m1, tu, mu271vsrl.vv v4, v8, v12272vsetvli zero, zero, e8, m2, tu, mu273vsrl.vx v4, v8, x10274vsetvli zero, zero, e8, m4, tu, mu275vsrl.vi v4, v8, 0276vsetvli zero, zero, e8, m8, tu, mu277vsra.vv v4, v8, v12278vsetvli zero, zero, e16, mf4, tu, mu279vsra.vx v4, v8, x10280vsetvli zero, zero, e16, mf2, tu, mu281vsra.vi v4, v8, 0282vsetvli zero, zero, e16, m1, tu, mu283vsll.vv v4, v8, v12284vsetvli zero, zero, e16, m2, tu, mu285vsll.vx v4, v8, x10286vsetvli zero, zero, e16, m4, tu, mu287vsll.vi v4, v8, 0288vsetvli zero, zero, e16, m8, tu, mu289vsrl.vv v4, v8, v12290vsetvli zero, zero, e32, mf2, tu, mu291vsrl.vx v4, v8, x10292vsetvli zero, zero, e32, m1, tu, mu293vsrl.vi v4, v8, 0294vsetvli zero, zero, e32, m2, tu, mu295vsra.vv v4, v8, v12296vsetvli zero, zero, e32, m4, tu, mu297vsra.vx v4, v8, x10298vsetvli zero, zero, e32, m8, tu, mu299vsra.vi v4, v8, 0300vsetvli zero, zero, e64, m1, tu, mu301vsll.vv v4, v8, v12302vsetvli zero, zero, e64, m2, tu, mu303vsll.vx v4, v8, x10304vsetvli zero, zero, e64, m4, tu, mu305vsll.vi v4, v8, 0306vsetvli zero, zero, e64, m8, tu, mu307vsrl.vv v4, v8, v12308 309# Vector Narrowing Integer Right Shift Instructions310# no e8311vsetvli zero, zero, e8, mf8, tu, mu312vnsrl.wv v4, v8, v12313vsetvli zero, zero, e8, mf4, tu, mu314vnsrl.wx v4, v8, x10315vsetvli zero, zero, e8, mf2, tu, mu316vnsrl.wi v4, v8, 0317vsetvli zero, zero, e8, m1, tu, mu318vnsra.wv v4, v8, v12319vsetvli zero, zero, e8, m2, tu, mu320vnsra.wx v4, v8, x10321vsetvli zero, zero, e8, m4, tu, mu322vnsra.wi v4, v8, 0323vsetvli zero, zero, e8, m8, tu, mu324vnsrl.wv v4, v8, v12325vsetvli zero, zero, e16, mf4, tu, mu326vnsrl.wx v4, v8, x10327vsetvli zero, zero, e16, mf2, tu, mu328vnsrl.wi v4, v8, 0329vsetvli zero, zero, e16, m1, tu, mu330vnsra.wv v4, v8, v12331vsetvli zero, zero, e16, m2, tu, mu332vnsra.wx v4, v8, x10333vsetvli zero, zero, e16, m4, tu, mu334vnsra.wi v4, v8, 0335vsetvli zero, zero, e16, m8, tu, mu336vnsrl.wv v4, v8, v12337vsetvli zero, zero, e32, mf2, tu, mu338vnsrl.wx v4, v8, x10339vsetvli zero, zero, e32, m1, tu, mu340vnsrl.wi v4, v8, 0341vsetvli zero, zero, e32, m2, tu, mu342vnsra.wv v4, v8, v12343vsetvli zero, zero, e32, m4, tu, mu344vnsra.wx v4, v8, x10345vsetvli zero, zero, e32, m8, tu, mu346vnsra.wi v4, v8, 0347vsetvli zero, zero, e64, m1, tu, mu348vnsrl.wv v4, v8, v12349vsetvli zero, zero, e64, m2, tu, mu350vnsrl.wx v4, v8, x10351vsetvli zero, zero, e64, m4, tu, mu352vnsrl.wi v4, v8, 0353vsetvli zero, zero, e64, m8, tu, mu354vnsra.wv v4, v8, v12355 356# Vector Integer Compare Instructions357vsetvli zero, zero, e8, mf8, tu, mu358vmseq.vv v4, v8, v12359vsetvli zero, zero, e8, mf4, tu, mu360vmseq.vx v4, v8, x10361vsetvli zero, zero, e8, mf2, tu, mu362vmseq.vi v4, v8, 0363vsetvli zero, zero, e8, m1, tu, mu364vmsne.vv v4, v8, v12365vsetvli zero, zero, e8, m2, tu, mu366vmsne.vx v4, v8, x10367vsetvli zero, zero, e8, m4, tu, mu368vmsne.vi v4, v8, 0369vsetvli zero, zero, e8, m8, tu, mu370vmsltu.vv v4, v8, v12371vsetvli zero, zero, e16, mf4, tu, mu372vmsltu.vx v4, v8, x10373vsetvli zero, zero, e16, mf2, tu, mu374vmslt.vv v4, v8, v12375vsetvli zero, zero, e16, m1, tu, mu376vmslt.vx v4, v8, x10377vsetvli zero, zero, e16, m2, tu, mu378vmsleu.vv v4, v8, v12379vsetvli zero, zero, e16, m4, tu, mu380vmsleu.vx v4, v8, x10381vsetvli zero, zero, e16, m8, tu, mu382vmsleu.vi v4, v8, 0383vsetvli zero, zero, e32, mf2, tu, mu384vmsle.vv v4, v8, v12385vsetvli zero, zero, e32, m1, tu, mu386vmsle.vx v4, v8, x10387vsetvli zero, zero, e32, m2, tu, mu388vmsle.vi v4, v8, 0389vsetvli zero, zero, e32, m4, tu, mu390vmsgtu.vx v4, v8, x10391vsetvli zero, zero, e32, m8, tu, mu392vmsgtu.vi v4, v8, 0393vsetvli zero, zero, e64, m1, tu, mu394vmsgt.vx v4, v8, x10395vsetvli zero, zero, e64, m2, tu, mu396vmsgt.vi v4, v8, 0397vsetvli zero, zero, e64, m4, tu, mu398vmseq.vv v4, v8, v12399vsetvli zero, zero, e64, m8, tu, mu400vmseq.vx v4, v8, x10401 402# Pseudo instructions403vsetvli zero, zero, e8, mf8, tu, mu404vmslt.vi v4, v8, 1405vsetvli zero, zero, e8, mf4, tu, mu406vmsltu.vi v4, v8, 1407vsetvli zero, zero, e8, mf2, tu, mu408vmsltu.vi v4, v8, 0409vsetvli zero, zero, e8, m1, tu, mu410vmsgeu.vi v4, v8, 1411vsetvli zero, zero, e8, m2, tu, mu412vmsge.vi v4, v8, 1413vsetvli zero, zero, e8, m4, tu, mu414vmsgeu.vi v4, v8, 0415vsetvli zero, zero, e16, mf4, tu, mu416vmsge.vi v4, v8, 0417vsetvli zero, zero, e16, mf2, tu, mu418vmsge.vx v4, v8, x10419vsetvli zero, zero, e16, m1, tu, mu420vmsgeu.vx v4, v8, x11421 422# Vector Integer Min/Max Instructions423vsetvli zero, zero, e8, mf8, tu, mu424vminu.vv v4, v8, v12425vsetvli zero, zero, e8, mf4, tu, mu426vminu.vx v4, v8, x10427vsetvli zero, zero, e8, mf2, tu, mu428vmin.vv v4, v8, v12429vsetvli zero, zero, e8, m1, tu, mu430vmin.vx v4, v8, x10431vsetvli zero, zero, e8, m2, tu, mu432vmaxu.vv v4, v8, v12433vsetvli zero, zero, e8, m4, tu, mu434vmaxu.vx v4, v8, x10435vsetvli zero, zero, e8, m8, tu, mu436vmax.vv v4, v8, v12437vsetvli zero, zero, e16, mf4, tu, mu438vmax.vx v4, v8, x10439vsetvli zero, zero, e16, mf2, tu, mu440vminu.vv v4, v8, v12441vsetvli zero, zero, e16, m1, tu, mu442vminu.vx v4, v8, x10443vsetvli zero, zero, e16, m2, tu, mu444vmin.vv v4, v8, v12445vsetvli zero, zero, e16, m4, tu, mu446vmin.vx v4, v8, x10447vsetvli zero, zero, e16, m8, tu, mu448vmaxu.vv v4, v8, v12449vsetvli zero, zero, e32, mf2, tu, mu450vmaxu.vx v4, v8, x10451vsetvli zero, zero, e32, m1, tu, mu452vmax.vv v4, v8, v12453vsetvli zero, zero, e32, m2, tu, mu454vmax.vx v4, v8, x10455vsetvli zero, zero, e32, m4, tu, mu456vminu.vv v4, v8, v12457vsetvli zero, zero, e32, m8, tu, mu458vminu.vx v4, v8, x10459vsetvli zero, zero, e64, m1, tu, mu460vmin.vv v4, v8, v12461vsetvli zero, zero, e64, m2, tu, mu462vmin.vx v4, v8, x10463vsetvli zero, zero, e64, m4, tu, mu464vmaxu.vv v4, v8, v12465vsetvli zero, zero, e64, m8, tu, mu466vmaxu.vx v4, v8, x10467 468# Vector Single-Width Integer Multiply Instructions469vsetvli zero, zero, e8, mf8, tu, mu470vmul.vv v4, v8, v12471vsetvli zero, zero, e8, mf4, tu, mu472vmul.vx v4, v8, x10473vsetvli zero, zero, e8, mf2, tu, mu474vmulh.vv v4, v8, v12475vsetvli zero, zero, e8, m1, tu, mu476vmulh.vx v4, v8, x10477vsetvli zero, zero, e8, m2, tu, mu478vmulhu.vv v4, v8, v12479vsetvli zero, zero, e8, m4, tu, mu480vmulhu.vx v4, v8, x10481vsetvli zero, zero, e8, m8, tu, mu482vmulhsu.vv v4, v8, v12483vsetvli zero, zero, e16, mf4, tu, mu484vmulhsu.vx v4, v8, x10485vsetvli zero, zero, e16, mf2, tu, mu486vmul.vv v4, v8, v12487vsetvli zero, zero, e16, m1, tu, mu488vmul.vx v4, v8, x10489vsetvli zero, zero, e16, m2, tu, mu490vmulh.vv v4, v8, v12491vsetvli zero, zero, e16, m4, tu, mu492vmulh.vx v4, v8, x10493vsetvli zero, zero, e16, m8, tu, mu494vmulhu.vv v4, v8, v12495vsetvli zero, zero, e32, mf2, tu, mu496vmulhu.vx v4, v8, x10497vsetvli zero, zero, e32, m1, tu, mu498vmulhsu.vv v4, v8, v12499vsetvli zero, zero, e32, m2, tu, mu500vmulhsu.vx v4, v8, x10501vsetvli zero, zero, e32, m4, tu, mu502vmul.vv v4, v8, v12503vsetvli zero, zero, e32, m8, tu, mu504vmul.vx v4, v8, x10505vsetvli zero, zero, e64, m1, tu, mu506vmulh.vv v4, v8, v12507vsetvli zero, zero, e64, m2, tu, mu508vmulh.vx v4, v8, x10509vsetvli zero, zero, e64, m4, tu, mu510vmulhu.vv v4, v8, v12511vsetvli zero, zero, e64, m8, tu, mu512vmulhu.vx v4, v8, x10513 514# Vector Integer Divide Instructions515vsetvli zero, zero, e8, mf8, tu, mu516vdivu.vv v4, v8, v12517vsetvli zero, zero, e8, mf4, tu, mu518vdivu.vx v4, v8, x10519vsetvli zero, zero, e8, mf2, tu, mu520vdiv.vv v4, v8, v12521vsetvli zero, zero, e8, m1, tu, mu522vdiv.vx v4, v8, x10523vsetvli zero, zero, e8, m2, tu, mu524vremu.vv v4, v8, v12525vsetvli zero, zero, e8, m4, tu, mu526vremu.vx v4, v8, x10527vsetvli zero, zero, e8, m8, tu, mu528vrem.vv v4, v8, v12529vsetvli zero, zero, e16, mf4, tu, mu530vrem.vx v4, v8, x10531vsetvli zero, zero, e16, mf2, tu, mu532vdivu.vv v4, v8, v12533vsetvli zero, zero, e16, m1, tu, mu534vdivu.vx v4, v8, x10535vsetvli zero, zero, e16, m2, tu, mu536vdiv.vv v4, v8, v12537vsetvli zero, zero, e16, m4, tu, mu538vdiv.vx v4, v8, x10539vsetvli zero, zero, e16, m8, tu, mu540vremu.vv v4, v8, v12541vsetvli zero, zero, e32, mf2, tu, mu542vremu.vx v4, v8, x10543vsetvli zero, zero, e32, m1, tu, mu544vrem.vv v4, v8, v12545vsetvli zero, zero, e32, m2, tu, mu546vrem.vx v4, v8, x10547vsetvli zero, zero, e32, m4, tu, mu548vdivu.vv v4, v8, v12549vsetvli zero, zero, e32, m8, tu, mu550vdivu.vx v4, v8, x10551vsetvli zero, zero, e64, m1, tu, mu552vdiv.vv v4, v8, v12553vsetvli zero, zero, e64, m2, tu, mu554vdiv.vx v4, v8, x10555vsetvli zero, zero, e64, m4, tu, mu556vremu.vv v4, v8, v12557vsetvli zero, zero, e64, m8, tu, mu558vremu.vx v4, v8, x10559 560# Vector Widening Integer Multiply Instructions561# no e64562vsetvli zero, zero, e8, mf8, tu, mu563vwmul.vv v4, v8, v12564vsetvli zero, zero, e8, mf4, tu, mu565vwmul.vx v4, v8, x10566vsetvli zero, zero, e8, mf2, tu, mu567vwmulu.vv v4, v8, v12568vsetvli zero, zero, e8, m1, tu, mu569vwmulu.vx v4, v8, x10570vsetvli zero, zero, e8, m2, tu, mu571vwmulsu.vv v4, v8, v12572vsetvli zero, zero, e8, m4, tu, mu573vwmulsu.vx v4, v8, x10574vsetvli zero, zero, e8, m8, tu, mu575vwmul.vv v4, v8, v12576vsetvli zero, zero, e16, mf4, tu, mu577vwmul.vx v4, v8, x10578vsetvli zero, zero, e16, mf2, tu, mu579vwmulu.vv v4, v8, v12580vsetvli zero, zero, e16, m1, tu, mu581vwmulu.vx v4, v8, x10582vsetvli zero, zero, e16, m2, tu, mu583vwmulsu.vv v4, v8, v12584vsetvli zero, zero, e16, m4, tu, mu585vwmulsu.vx v4, v8, x10586vsetvli zero, zero, e16, m8, tu, mu587vwmul.vv v4, v8, v12588vsetvli zero, zero, e32, mf2, tu, mu589vwmul.vx v4, v8, x10590vsetvli zero, zero, e32, m1, tu, mu591vwmulu.vv v4, v8, v12592vsetvli zero, zero, e32, m2, tu, mu593vwmulu.vx v4, v8, x10594vsetvli zero, zero, e32, m4, tu, mu595vwmulsu.vv v4, v8, v12596vsetvli zero, zero, e32, m8, tu, mu597vwmulsu.vx v4, v8, x10598 599# Vector Single-Width Integer Multiply-Add Instructions600vsetvli zero, zero, e8, mf8, tu, mu601vmacc.vv v4, v12, v8602vsetvli zero, zero, e8, mf4, tu, mu603vmacc.vx v4, x10, v8604vsetvli zero, zero, e8, mf2, tu, mu605vnmsac.vv v4, v12, v8606vsetvli zero, zero, e8, m1, tu, mu607vnmsac.vx v4, x10, v8608vsetvli zero, zero, e8, m2, tu, mu609vmadd.vv v4, v12, v8610vsetvli zero, zero, e8, m4, tu, mu611vmadd.vx v4, x10, v8612vsetvli zero, zero, e8, m8, tu, mu613vnmsub.vv v4, v12, v8614vsetvli zero, zero, e16, mf4, tu, mu615vnmsub.vx v4, x10, v8616vsetvli zero, zero, e16, mf2, tu, mu617vmacc.vv v4, v12, v8618vsetvli zero, zero, e16, m1, tu, mu619vmacc.vx v4, x10, v8620vsetvli zero, zero, e16, m2, tu, mu621vnmsac.vv v4, v12, v8622vsetvli zero, zero, e16, m4, tu, mu623vnmsac.vx v4, x10, v8624vsetvli zero, zero, e16, m8, tu, mu625vmadd.vv v4, v12, v8626vsetvli zero, zero, e32, mf2, tu, mu627vmadd.vx v4, x10, v8628vsetvli zero, zero, e32, m1, tu, mu629vnmsub.vv v4, v12, v8630vsetvli zero, zero, e32, m2, tu, mu631vnmsub.vx v4, x10, v8632vsetvli zero, zero, e32, m4, tu, mu633vmacc.vv v4, v12, v8634vsetvli zero, zero, e32, m8, tu, mu635vmacc.vx v4, x10, v8636vsetvli zero, zero, e64, m1, tu, mu637vnmsac.vv v4, v12, v8638vsetvli zero, zero, e64, m2, tu, mu639vnmsac.vx v4, x10, v8640vsetvli zero, zero, e64, m4, tu, mu641vmadd.vv v4, v12, v8642vsetvli zero, zero, e64, m8, tu, mu643vmadd.vx v4, x10, v8644 645# Vector Widening Integer Multiply-Add Instructions646# no e64647vsetvli zero, zero, e8, mf8, tu, mu648vwmaccu.vv v4, v12, v8649vsetvli zero, zero, e8, mf4, tu, mu650vwmaccu.vx v4, x10, v8651vsetvli zero, zero, e8, mf2, tu, mu652vwmacc.vv v4, v12, v8653vsetvli zero, zero, e8, m1, tu, mu654vwmacc.vx v4, x10, v8655vsetvli zero, zero, e8, m2, tu, mu656vwmaccsu.vv v4, v12, v8657vsetvli zero, zero, e8, m4, tu, mu658vwmaccsu.vx v4, x10, v8659vsetvli zero, zero, e8, m8, tu, mu660vwmaccus.vx v4, x10, v8661vsetvli zero, zero, e16, mf4, tu, mu662vwmaccu.vv v4, v12, v8663vsetvli zero, zero, e16, mf2, tu, mu664vwmaccu.vx v4, x10, v8665vsetvli zero, zero, e16, m1, tu, mu666vwmacc.vv v4, v12, v8667vsetvli zero, zero, e16, m2, tu, mu668vwmacc.vx v4, x10, v8669vsetvli zero, zero, e16, m4, tu, mu670vwmaccsu.vv v4, v12, v8671vsetvli zero, zero, e16, m8, tu, mu672vwmaccsu.vx v4, x10, v8673vsetvli zero, zero, e32, mf2, tu, mu674vwmaccus.vx v4, x10, v8675vsetvli zero, zero, e32, m1, tu, mu676vwmaccu.vv v4, v12, v8677vsetvli zero, zero, e32, m2, tu, mu678vwmaccu.vx v4, x10, v8679vsetvli zero, zero, e32, m4, tu, mu680vwmacc.vv v4, v12, v8681vsetvli zero, zero, e32, m8, tu, mu682vwmacc.vx v4, x10, v8683 684# Vector Integer Merge Instructions685vsetvli zero, zero, e8, mf8, tu, mu686vmerge.vvm v4, v8, v12, v0687vsetvli zero, zero, e8, mf4, tu, mu688vmerge.vxm v4, v8, x10, v0689vsetvli zero, zero, e8, mf2, tu, mu690vmerge.vim v4, v8, 0, v0691vsetvli zero, zero, e8, m1, tu, mu692vmerge.vvm v4, v8, v12, v0693vsetvli zero, zero, e8, m2, tu, mu694vmerge.vxm v4, v8, x10, v0695vsetvli zero, zero, e8, m4, tu, mu696vmerge.vim v4, v8, 0, v0697vsetvli zero, zero, e8, m8, tu, mu698vmerge.vvm v4, v8, v12, v0699vsetvli zero, zero, e16, mf4, tu, mu700vmerge.vxm v4, v8, x10, v0701vsetvli zero, zero, e16, mf2, tu, mu702vmerge.vim v4, v8, 0, v0703vsetvli zero, zero, e16, m1, tu, mu704vmerge.vvm v4, v8, v12, v0705vsetvli zero, zero, e16, m2, tu, mu706vmerge.vxm v4, v8, x10, v0707vsetvli zero, zero, e16, m4, tu, mu708vmerge.vim v4, v8, 0, v0709vsetvli zero, zero, e16, m8, tu, mu710vmerge.vvm v4, v8, v12, v0711vsetvli zero, zero, e32, mf2, tu, mu712vmerge.vxm v4, v8, x10, v0713vsetvli zero, zero, e32, m1, tu, mu714vmerge.vim v4, v8, 0, v0715vsetvli zero, zero, e32, m2, tu, mu716vmerge.vvm v4, v8, v12, v0717vsetvli zero, zero, e32, m4, tu, mu718vmerge.vxm v4, v8, x10, v0719vsetvli zero, zero, e32, m8, tu, mu720vmerge.vim v4, v8, 0, v0721vsetvli zero, zero, e64, m1, tu, mu722vmerge.vvm v4, v8, v12, v0723vsetvli zero, zero, e64, m2, tu, mu724vmerge.vxm v4, v8, x10, v0725vsetvli zero, zero, e64, m4, tu, mu726vmerge.vim v4, v8, 0, v0727vsetvli zero, zero, e64, m8, tu, mu728vmerge.vvm v4, v8, v12, v0729 730# Vector Integer Move Instructions731vsetvli zero, zero, e8, mf8, tu, mu732vmv.v.v v4, v12733vsetvli zero, zero, e8, mf4, tu, mu734vmv.v.x v4, x10735vsetvli zero, zero, e8, mf2, tu, mu736vmv.v.i v4, 0737vsetvli zero, zero, e8, m1, tu, mu738vmv.v.v v4, v12739vsetvli zero, zero, e8, m2, tu, mu740vmv.v.x v4, x10741vsetvli zero, zero, e8, m4, tu, mu742vmv.v.i v4, 0743vsetvli zero, zero, e8, m8, tu, mu744vmv.v.v v4, v12745vsetvli zero, zero, e16, mf4, tu, mu746vmv.v.x v4, x10747vsetvli zero, zero, e16, mf2, tu, mu748vmv.v.i v4, 0749vsetvli zero, zero, e16, m1, tu, mu750vmv.v.v v4, v12751vsetvli zero, zero, e16, m2, tu, mu752vmv.v.x v4, x10753vsetvli zero, zero, e16, m4, tu, mu754vmv.v.i v4, 0755vsetvli zero, zero, e16, m8, tu, mu756vmv.v.v v4, v12757vsetvli zero, zero, e32, mf2, tu, mu758vmv.v.x v4, x10759vsetvli zero, zero, e32, m1, tu, mu760vmv.v.i v4, 0761vsetvli zero, zero, e32, m2, tu, mu762vmv.v.v v4, v12763vsetvli zero, zero, e32, m4, tu, mu764vmv.v.x v4, x10765vsetvli zero, zero, e32, m8, tu, mu766vmv.v.i v4, 0767vsetvli zero, zero, e64, m1, tu, mu768vmv.v.v v4, v12769vsetvli zero, zero, e64, m2, tu, mu770vmv.v.x v4, x10771vsetvli zero, zero, e64, m4, tu, mu772vmv.v.i v4, 0773vsetvli zero, zero, e64, m8, tu, mu774vmv.v.v v4, v12775 776# CHECK: Resources:777# CHECK-NEXT: [0] - VLEN1024X300SiFive7FDiv:1778# CHECK-NEXT: [1] - VLEN1024X300SiFive7IDiv:1779# CHECK-NEXT: [2] - VLEN1024X300SiFive7PipeA:1780# CHECK-NEXT: [3] - VLEN1024X300SiFive7PipeAB:2 VLEN1024X300SiFive7PipeA, VLEN1024X300SiFive7PipeB781# CHECK-NEXT: [4] - VLEN1024X300SiFive7PipeB:1782# CHECK-NEXT: [5] - VLEN1024X300SiFive7VA1:1783# CHECK-NEXT: [6] - VLEN1024X300SiFive7VA1OrVA2:2 VLEN1024X300SiFive7VA1, VLEN1024X300SiFive7VA2784# CHECK-NEXT: [7] - VLEN1024X300SiFive7VA2:1785# CHECK-NEXT: [8] - VLEN1024X300SiFive7VCQ:1786# CHECK-NEXT: [9] - VLEN1024X300SiFive7VL:1787# CHECK-NEXT: [10] - VLEN1024X300SiFive7VS:1788 789# CHECK: Instruction Info:790# CHECK-NEXT: [1]: #uOps791# CHECK-NEXT: [2]: Latency792# CHECK-NEXT: [3]: RThroughput793# CHECK-NEXT: [4]: MayLoad794# CHECK-NEXT: [5]: MayStore795# CHECK-NEXT: [6]: HasSideEffects (U)796# CHECK-NEXT: [7]: Bypass Latency797# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])798# CHECK-NEXT: [9]: LLVM Opcode Name799 800# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:801# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf8, tu, mu802# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VADD_VV vadd.vv v4, v8, v12803# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf4, tu, mu804# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VADD_VX vadd.vx v4, v8, a0805# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf2, tu, mu806# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VADD_VI vadd.vi v4, v8, 0807# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m1, tu, mu808# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VSUB_VV vsub.vv v4, v8, v12809# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m2, tu, mu810# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VSUB_VX vsub.vx v4, v8, a0811# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m4, tu, mu812# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VRSUB_VX vrsub.vx v4, v8, a0813# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m8, tu, mu814# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VRSUB_VI vrsub.vi v4, v8, 0815# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf4, tu, mu816# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VADD_VV vadd.vv v4, v8, v12817# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf2, tu, mu818# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VADD_VX vadd.vx v4, v8, a0819# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m1, tu, mu820# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VADD_VI vadd.vi v4, v8, 0821# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m2, tu, mu822# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VSUB_VV vsub.vv v4, v8, v12823# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m4, tu, mu824# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VSUB_VX vsub.vx v4, v8, a0825# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m8, tu, mu826# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VRSUB_VX vrsub.vx v4, v8, a0827# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, mf2, tu, mu828# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VRSUB_VI vrsub.vi v4, v8, 0829# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m1, tu, mu830# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VADD_VV vadd.vv v4, v8, v12831# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m2, tu, mu832# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VADD_VX vadd.vx v4, v8, a0833# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m4, tu, mu834# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VADD_VI vadd.vi v4, v8, 0835# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m8, tu, mu836# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VSUB_VV vsub.vv v4, v8, v12837# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m1, tu, mu838# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VSUB_VX vsub.vx v4, v8, a0839# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m2, tu, mu840# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VRSUB_VX vrsub.vx v4, v8, a0841# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m4, tu, mu842# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VRSUB_VI vrsub.vi v4, v8, 0843# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m8, tu, mu844# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VADD_VV vadd.vv v4, v8, v12845# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf8, tu, mu846# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VWADDU_VV vwaddu.vv v4, v8, v12847# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf4, tu, mu848# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VWADDU_VX vwaddu.vx v4, v8, a0849# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf2, tu, mu850# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VWSUBU_VV vwsubu.vv v4, v8, v12851# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m1, tu, mu852# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VWSUBU_VX vwsubu.vx v4, v8, a0853# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m2, tu, mu854# CHECK-NEXT: 1 8 2.00 8 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VWADD_VV vwadd.vv v4, v8, v12855# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m4, tu, mu856# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VWADD_VX vwadd.vx v4, v8, a0857# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m8, tu, mu858# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VWSUB_VV vwsub.vv v4, v8, v12859# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf4, tu, mu860# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VWSUB_VX vwsub.vx v4, v8, a0861# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf2, tu, mu862# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VWADDU_WV vwaddu.wv v4, v8, v12863# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m1, tu, mu864# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VWADDU_WX vwaddu.wx v4, v8, a0865# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m2, tu, mu866# CHECK-NEXT: 1 8 2.00 8 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VWSUBU_WV vwsubu.wv v4, v8, v12867# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m4, tu, mu868# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VWSUBU_WX vwsubu.wx v4, v8, a0869# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m8, tu, mu870# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VWADD_WV vwadd.wv v4, v8, v12871# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, mf2, tu, mu872# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VWADD_WX vwadd.wx v4, v8, a0873# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m1, tu, mu874# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VWSUB_WV vwsub.wv v4, v8, v12875# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m2, tu, mu876# CHECK-NEXT: 1 8 2.00 8 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VWSUB_WX vwsub.wx v4, v8, a0877# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m4, tu, mu878# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VWADDU_VV vwaddu.vv v4, v8, v12879# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m8, tu, mu880# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VWADDU_VX vwaddu.vx v4, v8, a0881# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf4, tu, mu882# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VZEXT_VF2 vzext.vf2 v4, v8883# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VSEXT_VF2 vsext.vf2 v4, v8884# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf2, tu, mu885# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VZEXT_VF2 vzext.vf2 v4, v8886# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VSEXT_VF2 vsext.vf2 v4, v8887# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m1, tu, mu888# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VZEXT_VF2 vzext.vf2 v4, v8889# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VSEXT_VF2 vsext.vf2 v4, v8890# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m2, tu, mu891# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VZEXT_VF2 vzext.vf2 v4, v8892# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VSEXT_VF2 vsext.vf2 v4, v8893# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m4, tu, mu894# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VZEXT_VF2 vzext.vf2 v4, v8895# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VSEXT_VF2 vsext.vf2 v4, v8896# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m8, tu, mu897# CHECK-NEXT: 1 4 16.00 4 VLEN1024X300SiFive7VA1[1,17],VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VZEXT_VF2 vzext.vf2 v4, v8898# CHECK-NEXT: 1 4 16.00 4 VLEN1024X300SiFive7VA1[1,17],VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VSEXT_VF2 vsext.vf2 v4, v8899# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, mf2, tu, mu900# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VZEXT_VF2 vzext.vf2 v4, v8901# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VSEXT_VF2 vsext.vf2 v4, v8902# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VZEXT_VF4 vzext.vf4 v4, v8903# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VSEXT_VF4 vsext.vf4 v4, v8904# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m1, tu, mu905# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VZEXT_VF2 vzext.vf2 v4, v8906# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VSEXT_VF2 vsext.vf2 v4, v8907# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VZEXT_VF4 vzext.vf4 v4, v8908# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VSEXT_VF4 vsext.vf4 v4, v8909# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m2, tu, mu910# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VZEXT_VF2 vzext.vf2 v4, v8911# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VSEXT_VF2 vsext.vf2 v4, v8912# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VZEXT_VF4 vzext.vf4 v4, v8913# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VSEXT_VF4 vsext.vf4 v4, v8914# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m4, tu, mu915# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VZEXT_VF2 vzext.vf2 v4, v8916# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VSEXT_VF2 vsext.vf2 v4, v8917# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VZEXT_VF4 vzext.vf4 v4, v8918# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VSEXT_VF4 vsext.vf4 v4, v8919# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m8, tu, mu920# CHECK-NEXT: 1 4 16.00 4 VLEN1024X300SiFive7VA1[1,17],VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VZEXT_VF2 vzext.vf2 v4, v8921# CHECK-NEXT: 1 4 16.00 4 VLEN1024X300SiFive7VA1[1,17],VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VSEXT_VF2 vsext.vf2 v4, v8922# CHECK-NEXT: 1 4 16.00 4 VLEN1024X300SiFive7VA1[1,17],VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VZEXT_VF4 vzext.vf4 v4, v8923# CHECK-NEXT: 1 4 16.00 4 VLEN1024X300SiFive7VA1[1,17],VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VSEXT_VF4 vsext.vf4 v4, v8924# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m1, tu, mu925# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VZEXT_VF2 vzext.vf2 v4, v8926# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VSEXT_VF2 vsext.vf2 v4, v8927# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VZEXT_VF4 vzext.vf4 v4, v8928# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VSEXT_VF4 vsext.vf4 v4, v8929# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VZEXT_VF8 vzext.vf8 v4, v8930# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VSEXT_VF8 vsext.vf8 v4, v8931# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m2, tu, mu932# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VZEXT_VF2 vzext.vf2 v4, v8933# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VSEXT_VF2 vsext.vf2 v4, v8934# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VZEXT_VF4 vzext.vf4 v4, v8935# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VSEXT_VF4 vsext.vf4 v4, v8936# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VZEXT_VF8 vzext.vf8 v4, v8937# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VSEXT_VF8 vsext.vf8 v4, v8938# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m4, tu, mu939# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VZEXT_VF2 vzext.vf2 v4, v8940# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VSEXT_VF2 vsext.vf2 v4, v8941# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VZEXT_VF4 vzext.vf4 v4, v8942# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VSEXT_VF4 vsext.vf4 v4, v8943# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VZEXT_VF8 vzext.vf8 v4, v8944# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VSEXT_VF8 vsext.vf8 v4, v8945# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m8, tu, mu946# CHECK-NEXT: 1 4 16.00 4 VLEN1024X300SiFive7VA1[1,17],VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VZEXT_VF2 vzext.vf2 v4, v8947# CHECK-NEXT: 1 4 16.00 4 VLEN1024X300SiFive7VA1[1,17],VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VSEXT_VF2 vsext.vf2 v4, v8948# CHECK-NEXT: 1 4 16.00 4 VLEN1024X300SiFive7VA1[1,17],VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VZEXT_VF4 vzext.vf4 v4, v8949# CHECK-NEXT: 1 4 16.00 4 VLEN1024X300SiFive7VA1[1,17],VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VSEXT_VF4 vsext.vf4 v4, v8950# CHECK-NEXT: 1 4 16.00 4 VLEN1024X300SiFive7VA1[1,17],VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VZEXT_VF8 vzext.vf8 v4, v8951# CHECK-NEXT: 1 4 16.00 4 VLEN1024X300SiFive7VA1[1,17],VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VSEXT_VF8 vsext.vf8 v4, v8952# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf8, tu, mu953# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VADC_VVM vadc.vvm v4, v8, v12, v0954# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf4, tu, mu955# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VADC_VXM vadc.vxm v4, v8, a0, v0956# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf2, tu, mu957# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VADC_VIM vadc.vim v4, v8, 0, v0958# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m1, tu, mu959# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VMADC_VVM vmadc.vvm v4, v8, v12, v0960# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m2, tu, mu961# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VMADC_VXM vmadc.vxm v4, v8, a0, v0962# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m4, tu, mu963# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VMADC_VIM vmadc.vim v4, v8, 0, v0964# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m8, tu, mu965# CHECK-NEXT: 1 4 16.00 4 VLEN1024X300SiFive7VA1[1,17],VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VMADC_VV vmadc.vv v4, v8, v12966# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf4, tu, mu967# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMADC_VX vmadc.vx v4, v8, a0968# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf2, tu, mu969# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMADC_VI vmadc.vi v4, v8, 0970# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m1, tu, mu971# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VSBC_VVM vsbc.vvm v4, v8, v12, v0972# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m2, tu, mu973# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VSBC_VXM vsbc.vxm v4, v8, a0, v0974# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m4, tu, mu975# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VMSBC_VVM vmsbc.vvm v4, v8, v12, v0976# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m8, tu, mu977# CHECK-NEXT: 1 4 16.00 4 VLEN1024X300SiFive7VA1[1,17],VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VMSBC_VXM vmsbc.vxm v4, v8, a0, v0978# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, mf2, tu, mu979# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMSBC_VV vmsbc.vv v4, v8, v12980# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m1, tu, mu981# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VMSBC_VX vmsbc.vx v4, v8, a0982# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m2, tu, mu983# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VADC_VVM vadc.vvm v4, v8, v12, v0984# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m4, tu, mu985# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VADC_VXM vadc.vxm v4, v8, a0, v0986# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m8, tu, mu987# CHECK-NEXT: 1 4 16.00 4 VLEN1024X300SiFive7VA1[1,17],VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VADC_VIM vadc.vim v4, v8, 0, v0988# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m1, tu, mu989# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VMADC_VVM vmadc.vvm v4, v8, v12, v0990# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m2, tu, mu991# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VMADC_VXM vmadc.vxm v4, v8, a0, v0992# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m4, tu, mu993# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VMADC_VIM vmadc.vim v4, v8, 0, v0994# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m8, tu, mu995# CHECK-NEXT: 1 4 16.00 4 VLEN1024X300SiFive7VA1[1,17],VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VMADC_VV vmadc.vv v4, v8, v12996# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf8, tu, mu997# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VAND_VV vand.vv v4, v8, v12998# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf4, tu, mu999# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VAND_VX vand.vx v4, v8, a01000# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf2, tu, mu1001# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VAND_VI vand.vi v4, v8, 01002# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m1, tu, mu1003# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VOR_VV vor.vv v4, v8, v121004# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m2, tu, mu1005# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VOR_VX vor.vx v4, v8, a01006# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m4, tu, mu1007# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VOR_VI vor.vi v4, v8, 01008# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m8, tu, mu1009# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VXOR_VV vxor.vv v4, v8, v121010# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf4, tu, mu1011# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VXOR_VX vxor.vx v4, v8, a01012# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf2, tu, mu1013# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VXOR_VI vxor.vi v4, v8, 01014# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m1, tu, mu1015# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VAND_VV vand.vv v4, v8, v121016# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m2, tu, mu1017# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VAND_VX vand.vx v4, v8, a01018# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m4, tu, mu1019# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VAND_VI vand.vi v4, v8, 01020# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m8, tu, mu1021# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VOR_VV vor.vv v4, v8, v121022# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, mf2, tu, mu1023# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VOR_VX vor.vx v4, v8, a01024# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m1, tu, mu1025# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VOR_VI vor.vi v4, v8, 01026# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m2, tu, mu1027# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VXOR_VV vxor.vv v4, v8, v121028# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m4, tu, mu1029# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VXOR_VX vxor.vx v4, v8, a01030# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m8, tu, mu1031# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VXOR_VI vxor.vi v4, v8, 01032# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m1, tu, mu1033# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VAND_VV vand.vv v4, v8, v121034# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m2, tu, mu1035# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VAND_VX vand.vx v4, v8, a01036# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m4, tu, mu1037# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VAND_VI vand.vi v4, v8, 01038# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m8, tu, mu1039# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VOR_VV vor.vv v4, v8, v121040# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf8, tu, mu1041# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VSLL_VV vsll.vv v4, v8, v121042# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf4, tu, mu1043# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VSLL_VX vsll.vx v4, v8, a01044# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf2, tu, mu1045# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VSLL_VI vsll.vi v4, v8, 01046# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m1, tu, mu1047# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VSRL_VV vsrl.vv v4, v8, v121048# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m2, tu, mu1049# CHECK-NEXT: 1 8 2.00 8 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VSRL_VX vsrl.vx v4, v8, a01050# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m4, tu, mu1051# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VSRL_VI vsrl.vi v4, v8, 01052# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m8, tu, mu1053# CHECK-NEXT: 1 8 8.00 8 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VSRA_VV vsra.vv v4, v8, v121054# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf4, tu, mu1055# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VSRA_VX vsra.vx v4, v8, a01056# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf2, tu, mu1057# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VSRA_VI vsra.vi v4, v8, 01058# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m1, tu, mu1059# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VSLL_VV vsll.vv v4, v8, v121060# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m2, tu, mu1061# CHECK-NEXT: 1 8 2.00 8 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VSLL_VX vsll.vx v4, v8, a01062# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m4, tu, mu1063# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VSLL_VI vsll.vi v4, v8, 01064# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m8, tu, mu1065# CHECK-NEXT: 1 8 8.00 8 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VSRL_VV vsrl.vv v4, v8, v121066# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, mf2, tu, mu1067# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VSRL_VX vsrl.vx v4, v8, a01068# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m1, tu, mu1069# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VSRL_VI vsrl.vi v4, v8, 01070# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m2, tu, mu1071# CHECK-NEXT: 1 8 2.00 8 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VSRA_VV vsra.vv v4, v8, v121072# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m4, tu, mu1073# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VSRA_VX vsra.vx v4, v8, a01074# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m8, tu, mu1075# CHECK-NEXT: 1 8 8.00 8 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VSRA_VI vsra.vi v4, v8, 01076# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m1, tu, mu1077# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VSLL_VV vsll.vv v4, v8, v121078# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m2, tu, mu1079# CHECK-NEXT: 1 8 2.00 8 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VSLL_VX vsll.vx v4, v8, a01080# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m4, tu, mu1081# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VSLL_VI vsll.vi v4, v8, 01082# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m8, tu, mu1083# CHECK-NEXT: 1 8 8.00 8 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VSRL_VV vsrl.vv v4, v8, v121084# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf8, tu, mu1085# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VNSRL_WV vnsrl.wv v4, v8, v121086# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf4, tu, mu1087# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VNSRL_WX vnsrl.wx v4, v8, a01088# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf2, tu, mu1089# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VNSRL_WI vnsrl.wi v4, v8, 01090# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m1, tu, mu1091# CHECK-NEXT: 1 8 2.00 8 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VNSRA_WV vnsra.wv v4, v8, v121092# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m2, tu, mu1093# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VNSRA_WX vnsra.wx v4, v8, a01094# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m4, tu, mu1095# CHECK-NEXT: 1 8 8.00 8 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VNSRA_WI vnsra.wi v4, v8, 01096# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m8, tu, mu1097# CHECK-NEXT: 1 8 8.00 8 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VNSRL_WV vnsrl.wv v4, v8, v121098# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf4, tu, mu1099# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VNSRL_WX vnsrl.wx v4, v8, a01100# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf2, tu, mu1101# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VNSRL_WI vnsrl.wi v4, v8, 01102# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m1, tu, mu1103# CHECK-NEXT: 1 8 2.00 8 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VNSRA_WV vnsra.wv v4, v8, v121104# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m2, tu, mu1105# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VNSRA_WX vnsra.wx v4, v8, a01106# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m4, tu, mu1107# CHECK-NEXT: 1 8 8.00 8 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VNSRA_WI vnsra.wi v4, v8, 01108# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m8, tu, mu1109# CHECK-NEXT: 1 8 8.00 8 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VNSRL_WV vnsrl.wv v4, v8, v121110# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, mf2, tu, mu1111# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VNSRL_WX vnsrl.wx v4, v8, a01112# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m1, tu, mu1113# CHECK-NEXT: 1 8 2.00 8 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VNSRL_WI vnsrl.wi v4, v8, 01114# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m2, tu, mu1115# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VNSRA_WV vnsra.wv v4, v8, v121116# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m4, tu, mu1117# CHECK-NEXT: 1 8 8.00 8 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VNSRA_WX vnsra.wx v4, v8, a01118# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m8, tu, mu1119# CHECK-NEXT: 1 8 8.00 8 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VNSRA_WI vnsra.wi v4, v8, 01120# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m1, tu, mu1121# CHECK-NEXT: 1 8 2.00 8 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VNSRL_WV vnsrl.wv v4, v8, v121122# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m2, tu, mu1123# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VNSRL_WX vnsrl.wx v4, v8, a01124# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m4, tu, mu1125# CHECK-NEXT: 1 8 8.00 8 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VNSRL_WI vnsrl.wi v4, v8, 01126# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m8, tu, mu1127# CHECK-NEXT: 1 8 8.00 8 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VNSRA_WV vnsra.wv v4, v8, v121128# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf8, tu, mu1129# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMSEQ_VV vmseq.vv v4, v8, v121130# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf4, tu, mu1131# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMSEQ_VX vmseq.vx v4, v8, a01132# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf2, tu, mu1133# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMSEQ_VI vmseq.vi v4, v8, 01134# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m1, tu, mu1135# CHECK-NEXT: 1 5 2.00 5 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VMSNE_VV vmsne.vv v4, v8, v121136# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m2, tu, mu1137# CHECK-NEXT: 1 7 4.00 7 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VMSNE_VX vmsne.vx v4, v8, a01138# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m4, tu, mu1139# CHECK-NEXT: 1 11 8.00 11 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VMSNE_VI vmsne.vi v4, v8, 01140# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m8, tu, mu1141# CHECK-NEXT: 1 19 16.00 19 VLEN1024X300SiFive7VA1[1,17],VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VMSLTU_VV vmsltu.vv v4, v8, v121142# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf4, tu, mu1143# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMSLTU_VX vmsltu.vx v4, v8, a01144# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf2, tu, mu1145# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMSLT_VV vmslt.vv v4, v8, v121146# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m1, tu, mu1147# CHECK-NEXT: 1 5 2.00 5 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VMSLT_VX vmslt.vx v4, v8, a01148# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m2, tu, mu1149# CHECK-NEXT: 1 7 4.00 7 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VMSLEU_VV vmsleu.vv v4, v8, v121150# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m4, tu, mu1151# CHECK-NEXT: 1 11 8.00 11 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VMSLEU_VX vmsleu.vx v4, v8, a01152# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m8, tu, mu1153# CHECK-NEXT: 1 19 16.00 19 VLEN1024X300SiFive7VA1[1,17],VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VMSLEU_VI vmsleu.vi v4, v8, 01154# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, mf2, tu, mu1155# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMSLE_VV vmsle.vv v4, v8, v121156# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m1, tu, mu1157# CHECK-NEXT: 1 5 2.00 5 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VMSLE_VX vmsle.vx v4, v8, a01158# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m2, tu, mu1159# CHECK-NEXT: 1 7 4.00 7 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VMSLE_VI vmsle.vi v4, v8, 01160# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m4, tu, mu1161# CHECK-NEXT: 1 11 8.00 11 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VMSGTU_VX vmsgtu.vx v4, v8, a01162# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m8, tu, mu1163# CHECK-NEXT: 1 19 16.00 19 VLEN1024X300SiFive7VA1[1,17],VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VMSGTU_VI vmsgtu.vi v4, v8, 01164# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m1, tu, mu1165# CHECK-NEXT: 1 5 2.00 5 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VMSGT_VX vmsgt.vx v4, v8, a01166# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m2, tu, mu1167# CHECK-NEXT: 1 7 4.00 7 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VMSGT_VI vmsgt.vi v4, v8, 01168# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m4, tu, mu1169# CHECK-NEXT: 1 11 8.00 11 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VMSEQ_VV vmseq.vv v4, v8, v121170# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m8, tu, mu1171# CHECK-NEXT: 1 19 16.00 19 VLEN1024X300SiFive7VA1[1,17],VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VMSEQ_VX vmseq.vx v4, v8, a01172# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf8, tu, mu1173# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMSLE_VI vmsle.vi v4, v8, 01174# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf4, tu, mu1175# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMSLEU_VI vmsleu.vi v4, v8, 01176# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf2, tu, mu1177# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMSNE_VV vmsne.vv v4, v8, v81178# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m1, tu, mu1179# CHECK-NEXT: 1 5 2.00 5 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VMSGTU_VI vmsgtu.vi v4, v8, 01180# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m2, tu, mu1181# CHECK-NEXT: 1 7 4.00 7 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VMSGT_VI vmsgt.vi v4, v8, 01182# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m4, tu, mu1183# CHECK-NEXT: 1 11 8.00 11 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VMSEQ_VV vmseq.vv v4, v8, v81184# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf4, tu, mu1185# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMSGT_VI vmsgt.vi v4, v8, -11186# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf2, tu, mu1187# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMSLT_VX vmslt.vx v4, v8, a01188# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMNAND_MM vmnot.m v4, v41189# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m1, tu, mu1190# CHECK-NEXT: 1 5 2.00 5 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VMSLTU_VX vmsltu.vx v4, v8, a11191# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMNAND_MM vmnot.m v4, v41192# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf8, tu, mu1193# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMINU_VV vminu.vv v4, v8, v121194# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf4, tu, mu1195# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMINU_VX vminu.vx v4, v8, a01196# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf2, tu, mu1197# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMIN_VV vmin.vv v4, v8, v121198# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m1, tu, mu1199# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VMIN_VX vmin.vx v4, v8, a01200# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m2, tu, mu1201# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VMAXU_VV vmaxu.vv v4, v8, v121202# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m4, tu, mu1203# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VMAXU_VX vmaxu.vx v4, v8, a01204# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m8, tu, mu1205# CHECK-NEXT: 1 4 16.00 4 VLEN1024X300SiFive7VA1[1,17],VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VMAX_VV vmax.vv v4, v8, v121206# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf4, tu, mu1207# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMAX_VX vmax.vx v4, v8, a01208# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf2, tu, mu1209# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMINU_VV vminu.vv v4, v8, v121210# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m1, tu, mu1211# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VMINU_VX vminu.vx v4, v8, a01212# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m2, tu, mu1213# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VMIN_VV vmin.vv v4, v8, v121214# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m4, tu, mu1215# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VMIN_VX vmin.vx v4, v8, a01216# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m8, tu, mu1217# CHECK-NEXT: 1 4 16.00 4 VLEN1024X300SiFive7VA1[1,17],VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VMAXU_VV vmaxu.vv v4, v8, v121218# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, mf2, tu, mu1219# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMAXU_VX vmaxu.vx v4, v8, a01220# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m1, tu, mu1221# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VMAX_VV vmax.vv v4, v8, v121222# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m2, tu, mu1223# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VMAX_VX vmax.vx v4, v8, a01224# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m4, tu, mu1225# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VMINU_VV vminu.vv v4, v8, v121226# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m8, tu, mu1227# CHECK-NEXT: 1 4 16.00 4 VLEN1024X300SiFive7VA1[1,17],VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VMINU_VX vminu.vx v4, v8, a01228# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m1, tu, mu1229# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VMIN_VV vmin.vv v4, v8, v121230# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m2, tu, mu1231# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VMIN_VX vmin.vx v4, v8, a01232# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m4, tu, mu1233# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VMAXU_VV vmaxu.vv v4, v8, v121234# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m8, tu, mu1235# CHECK-NEXT: 1 4 16.00 4 VLEN1024X300SiFive7VA1[1,17],VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VMAXU_VX vmaxu.vx v4, v8, a01236# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf8, tu, mu1237# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMUL_VV vmul.vv v4, v8, v121238# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf4, tu, mu1239# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMUL_VX vmul.vx v4, v8, a01240# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf2, tu, mu1241# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMULH_VV vmulh.vv v4, v8, v121242# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m1, tu, mu1243# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VMULH_VX vmulh.vx v4, v8, a01244# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m2, tu, mu1245# CHECK-NEXT: 1 8 2.00 8 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VMULHU_VV vmulhu.vv v4, v8, v121246# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m4, tu, mu1247# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VMULHU_VX vmulhu.vx v4, v8, a01248# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m8, tu, mu1249# CHECK-NEXT: 1 8 8.00 8 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VMULHSU_VV vmulhsu.vv v4, v8, v121250# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf4, tu, mu1251# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMULHSU_VX vmulhsu.vx v4, v8, a01252# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf2, tu, mu1253# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMUL_VV vmul.vv v4, v8, v121254# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m1, tu, mu1255# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VMUL_VX vmul.vx v4, v8, a01256# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m2, tu, mu1257# CHECK-NEXT: 1 8 2.00 8 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VMULH_VV vmulh.vv v4, v8, v121258# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m4, tu, mu1259# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VMULH_VX vmulh.vx v4, v8, a01260# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m8, tu, mu1261# CHECK-NEXT: 1 8 8.00 8 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VMULHU_VV vmulhu.vv v4, v8, v121262# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, mf2, tu, mu1263# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMULHU_VX vmulhu.vx v4, v8, a01264# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m1, tu, mu1265# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VMULHSU_VV vmulhsu.vv v4, v8, v121266# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m2, tu, mu1267# CHECK-NEXT: 1 8 2.00 8 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VMULHSU_VX vmulhsu.vx v4, v8, a01268# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m4, tu, mu1269# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VMUL_VV vmul.vv v4, v8, v121270# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m8, tu, mu1271# CHECK-NEXT: 1 8 8.00 8 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VMUL_VX vmul.vx v4, v8, a01272# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m1, tu, mu1273# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VMULH_VV vmulh.vv v4, v8, v121274# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m2, tu, mu1275# CHECK-NEXT: 1 8 2.00 8 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VMULH_VX vmulh.vx v4, v8, a01276# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m4, tu, mu1277# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VMULHU_VV vmulhu.vv v4, v8, v121278# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m8, tu, mu1279# CHECK-NEXT: 1 8 8.00 8 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VMULHU_VX vmulhu.vx v4, v8, a01280# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf8, tu, mu1281# CHECK-NEXT: 1 32 32.00 32 VLEN1024X300SiFive7VA1[1,33],VLEN1024X300SiFive7VA1OrVA2[1,33],VLEN1024X300SiFive7VCQ VDIVU_VV vdivu.vv v4, v8, v121282# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf4, tu, mu1283# CHECK-NEXT: 1 64 64.00 64 VLEN1024X300SiFive7VA1[1,65],VLEN1024X300SiFive7VA1OrVA2[1,65],VLEN1024X300SiFive7VCQ VDIVU_VX vdivu.vx v4, v8, a01284# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf2, tu, mu1285# CHECK-NEXT: 1 128 128.00 128 VLEN1024X300SiFive7VA1[1,129],VLEN1024X300SiFive7VA1OrVA2[1,129],VLEN1024X300SiFive7VCQ VDIV_VV vdiv.vv v4, v8, v121286# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m1, tu, mu1287# CHECK-NEXT: 1 256 256.00 256 VLEN1024X300SiFive7VA1[1,257],VLEN1024X300SiFive7VA1OrVA2[1,257],VLEN1024X300SiFive7VCQ VDIV_VX vdiv.vx v4, v8, a01288# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m2, tu, mu1289# CHECK-NEXT: 1 512 512.00 512 VLEN1024X300SiFive7VA1[1,513],VLEN1024X300SiFive7VA1OrVA2[1,513],VLEN1024X300SiFive7VCQ VREMU_VV vremu.vv v4, v8, v121290# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m4, tu, mu1291# CHECK-NEXT: 1 1024 1024.00 1024 VLEN1024X300SiFive7VA1[1,1025],VLEN1024X300SiFive7VA1OrVA2[1,1025],VLEN1024X300SiFive7VCQ VREMU_VX vremu.vx v4, v8, a01292# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m8, tu, mu1293# CHECK-NEXT: 1 2048 2048.00 2048 VLEN1024X300SiFive7VA1[1,2049],VLEN1024X300SiFive7VA1OrVA2[1,2049],VLEN1024X300SiFive7VCQ VREM_VV vrem.vv v4, v8, v121294# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf4, tu, mu1295# CHECK-NEXT: 1 64 64.00 64 VLEN1024X300SiFive7VA1[1,65],VLEN1024X300SiFive7VA1OrVA2[1,65],VLEN1024X300SiFive7VCQ VREM_VX vrem.vx v4, v8, a01296# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf2, tu, mu1297# CHECK-NEXT: 1 128 128.00 128 VLEN1024X300SiFive7VA1[1,129],VLEN1024X300SiFive7VA1OrVA2[1,129],VLEN1024X300SiFive7VCQ VDIVU_VV vdivu.vv v4, v8, v121298# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m1, tu, mu1299# CHECK-NEXT: 1 256 256.00 256 VLEN1024X300SiFive7VA1[1,257],VLEN1024X300SiFive7VA1OrVA2[1,257],VLEN1024X300SiFive7VCQ VDIVU_VX vdivu.vx v4, v8, a01300# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m2, tu, mu1301# CHECK-NEXT: 1 512 512.00 512 VLEN1024X300SiFive7VA1[1,513],VLEN1024X300SiFive7VA1OrVA2[1,513],VLEN1024X300SiFive7VCQ VDIV_VV vdiv.vv v4, v8, v121302# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m4, tu, mu1303# CHECK-NEXT: 1 1024 1024.00 1024 VLEN1024X300SiFive7VA1[1,1025],VLEN1024X300SiFive7VA1OrVA2[1,1025],VLEN1024X300SiFive7VCQ VDIV_VX vdiv.vx v4, v8, a01304# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m8, tu, mu1305# CHECK-NEXT: 1 2048 2048.00 2048 VLEN1024X300SiFive7VA1[1,2049],VLEN1024X300SiFive7VA1OrVA2[1,2049],VLEN1024X300SiFive7VCQ VREMU_VV vremu.vv v4, v8, v121306# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, mf2, tu, mu1307# CHECK-NEXT: 1 128 128.00 128 VLEN1024X300SiFive7VA1[1,129],VLEN1024X300SiFive7VA1OrVA2[1,129],VLEN1024X300SiFive7VCQ VREMU_VX vremu.vx v4, v8, a01308# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m1, tu, mu1309# CHECK-NEXT: 1 256 256.00 256 VLEN1024X300SiFive7VA1[1,257],VLEN1024X300SiFive7VA1OrVA2[1,257],VLEN1024X300SiFive7VCQ VREM_VV vrem.vv v4, v8, v121310# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m2, tu, mu1311# CHECK-NEXT: 1 512 512.00 512 VLEN1024X300SiFive7VA1[1,513],VLEN1024X300SiFive7VA1OrVA2[1,513],VLEN1024X300SiFive7VCQ VREM_VX vrem.vx v4, v8, a01312# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m4, tu, mu1313# CHECK-NEXT: 1 1024 1024.00 1024 VLEN1024X300SiFive7VA1[1,1025],VLEN1024X300SiFive7VA1OrVA2[1,1025],VLEN1024X300SiFive7VCQ VDIVU_VV vdivu.vv v4, v8, v121314# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m8, tu, mu1315# CHECK-NEXT: 1 2048 2048.00 2048 VLEN1024X300SiFive7VA1[1,2049],VLEN1024X300SiFive7VA1OrVA2[1,2049],VLEN1024X300SiFive7VCQ VDIVU_VX vdivu.vx v4, v8, a01316# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m1, tu, mu1317# CHECK-NEXT: 1 256 256.00 256 VLEN1024X300SiFive7VA1[1,257],VLEN1024X300SiFive7VA1OrVA2[1,257],VLEN1024X300SiFive7VCQ VDIV_VV vdiv.vv v4, v8, v121318# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m2, tu, mu1319# CHECK-NEXT: 1 512 512.00 512 VLEN1024X300SiFive7VA1[1,513],VLEN1024X300SiFive7VA1OrVA2[1,513],VLEN1024X300SiFive7VCQ VDIV_VX vdiv.vx v4, v8, a01320# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m4, tu, mu1321# CHECK-NEXT: 1 1024 1024.00 1024 VLEN1024X300SiFive7VA1[1,1025],VLEN1024X300SiFive7VA1OrVA2[1,1025],VLEN1024X300SiFive7VCQ VREMU_VV vremu.vv v4, v8, v121322# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m8, tu, mu1323# CHECK-NEXT: 1 2048 2048.00 2048 VLEN1024X300SiFive7VA1[1,2049],VLEN1024X300SiFive7VA1OrVA2[1,2049],VLEN1024X300SiFive7VCQ VREMU_VX vremu.vx v4, v8, a01324# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf8, tu, mu1325# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VWMUL_VV vwmul.vv v4, v8, v121326# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf4, tu, mu1327# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VWMUL_VX vwmul.vx v4, v8, a01328# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf2, tu, mu1329# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VWMULU_VV vwmulu.vv v4, v8, v121330# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m1, tu, mu1331# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VWMULU_VX vwmulu.vx v4, v8, a01332# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m2, tu, mu1333# CHECK-NEXT: 1 8 2.00 8 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VWMULSU_VV vwmulsu.vv v4, v8, v121334# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m4, tu, mu1335# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VWMULSU_VX vwmulsu.vx v4, v8, a01336# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m8, tu, mu1337# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VWMUL_VV vwmul.vv v4, v8, v121338# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf4, tu, mu1339# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VWMUL_VX vwmul.vx v4, v8, a01340# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf2, tu, mu1341# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VWMULU_VV vwmulu.vv v4, v8, v121342# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m1, tu, mu1343# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VWMULU_VX vwmulu.vx v4, v8, a01344# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m2, tu, mu1345# CHECK-NEXT: 1 8 2.00 8 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VWMULSU_VV vwmulsu.vv v4, v8, v121346# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m4, tu, mu1347# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VWMULSU_VX vwmulsu.vx v4, v8, a01348# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m8, tu, mu1349# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VWMUL_VV vwmul.vv v4, v8, v121350# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, mf2, tu, mu1351# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VWMUL_VX vwmul.vx v4, v8, a01352# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m1, tu, mu1353# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VWMULU_VV vwmulu.vv v4, v8, v121354# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m2, tu, mu1355# CHECK-NEXT: 1 8 2.00 8 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VWMULU_VX vwmulu.vx v4, v8, a01356# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m4, tu, mu1357# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VWMULSU_VV vwmulsu.vv v4, v8, v121358# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m8, tu, mu1359# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VWMULSU_VX vwmulsu.vx v4, v8, a01360# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf8, tu, mu1361# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMACC_VV vmacc.vv v4, v12, v81362# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf4, tu, mu1363# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMACC_VX vmacc.vx v4, a0, v81364# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf2, tu, mu1365# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VNMSAC_VV vnmsac.vv v4, v12, v81366# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m1, tu, mu1367# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VNMSAC_VX vnmsac.vx v4, a0, v81368# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m2, tu, mu1369# CHECK-NEXT: 1 8 2.00 8 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VMADD_VV vmadd.vv v4, v12, v81370# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m4, tu, mu1371# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VMADD_VX vmadd.vx v4, a0, v81372# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m8, tu, mu1373# CHECK-NEXT: 1 8 8.00 8 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VNMSUB_VV vnmsub.vv v4, v12, v81374# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf4, tu, mu1375# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VNMSUB_VX vnmsub.vx v4, a0, v81376# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf2, tu, mu1377# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMACC_VV vmacc.vv v4, v12, v81378# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m1, tu, mu1379# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VMACC_VX vmacc.vx v4, a0, v81380# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m2, tu, mu1381# CHECK-NEXT: 1 8 2.00 8 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VNMSAC_VV vnmsac.vv v4, v12, v81382# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m4, tu, mu1383# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VNMSAC_VX vnmsac.vx v4, a0, v81384# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m8, tu, mu1385# CHECK-NEXT: 1 8 8.00 8 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VMADD_VV vmadd.vv v4, v12, v81386# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, mf2, tu, mu1387# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMADD_VX vmadd.vx v4, a0, v81388# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m1, tu, mu1389# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VNMSUB_VV vnmsub.vv v4, v12, v81390# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m2, tu, mu1391# CHECK-NEXT: 1 8 2.00 8 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VNMSUB_VX vnmsub.vx v4, a0, v81392# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m4, tu, mu1393# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VMACC_VV vmacc.vv v4, v12, v81394# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m8, tu, mu1395# CHECK-NEXT: 1 8 8.00 8 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VMACC_VX vmacc.vx v4, a0, v81396# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m1, tu, mu1397# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VNMSAC_VV vnmsac.vv v4, v12, v81398# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m2, tu, mu1399# CHECK-NEXT: 1 8 2.00 8 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VNMSAC_VX vnmsac.vx v4, a0, v81400# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m4, tu, mu1401# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VMADD_VV vmadd.vv v4, v12, v81402# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m8, tu, mu1403# CHECK-NEXT: 1 8 8.00 8 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VMADD_VX vmadd.vx v4, a0, v81404# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf8, tu, mu1405# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VWMACCU_VV vwmaccu.vv v4, v12, v81406# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf4, tu, mu1407# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VWMACCU_VX vwmaccu.vx v4, a0, v81408# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf2, tu, mu1409# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VWMACC_VV vwmacc.vv v4, v12, v81410# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m1, tu, mu1411# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VWMACC_VX vwmacc.vx v4, a0, v81412# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m2, tu, mu1413# CHECK-NEXT: 1 8 2.00 8 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VWMACCSU_VV vwmaccsu.vv v4, v12, v81414# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m4, tu, mu1415# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VWMACCSU_VX vwmaccsu.vx v4, a0, v81416# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m8, tu, mu1417# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VWMACCUS_VX vwmaccus.vx v4, a0, v81418# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf4, tu, mu1419# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VWMACCU_VV vwmaccu.vv v4, v12, v81420# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf2, tu, mu1421# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VWMACCU_VX vwmaccu.vx v4, a0, v81422# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m1, tu, mu1423# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VWMACC_VV vwmacc.vv v4, v12, v81424# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m2, tu, mu1425# CHECK-NEXT: 1 8 2.00 8 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VWMACC_VX vwmacc.vx v4, a0, v81426# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m4, tu, mu1427# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VWMACCSU_VV vwmaccsu.vv v4, v12, v81428# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m8, tu, mu1429# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VWMACCSU_VX vwmaccsu.vx v4, a0, v81430# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, mf2, tu, mu1431# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VWMACCUS_VX vwmaccus.vx v4, a0, v81432# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m1, tu, mu1433# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VWMACCU_VV vwmaccu.vv v4, v12, v81434# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m2, tu, mu1435# CHECK-NEXT: 1 8 2.00 8 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VWMACCU_VX vwmaccu.vx v4, a0, v81436# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m4, tu, mu1437# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VWMACC_VV vwmacc.vv v4, v12, v81438# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m8, tu, mu1439# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VWMACC_VX vwmacc.vx v4, a0, v81440# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf8, tu, mu1441# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMERGE_VVM vmerge.vvm v4, v8, v12, v01442# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf4, tu, mu1443# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMERGE_VXM vmerge.vxm v4, v8, a0, v01444# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf2, tu, mu1445# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMERGE_VIM vmerge.vim v4, v8, 0, v01446# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m1, tu, mu1447# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VMERGE_VVM vmerge.vvm v4, v8, v12, v01448# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m2, tu, mu1449# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VMERGE_VXM vmerge.vxm v4, v8, a0, v01450# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m4, tu, mu1451# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VMERGE_VIM vmerge.vim v4, v8, 0, v01452# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m8, tu, mu1453# CHECK-NEXT: 1 4 16.00 4 VLEN1024X300SiFive7VA1[1,17],VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VMERGE_VVM vmerge.vvm v4, v8, v12, v01454# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf4, tu, mu1455# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMERGE_VXM vmerge.vxm v4, v8, a0, v01456# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf2, tu, mu1457# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMERGE_VIM vmerge.vim v4, v8, 0, v01458# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m1, tu, mu1459# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VMERGE_VVM vmerge.vvm v4, v8, v12, v01460# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m2, tu, mu1461# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VMERGE_VXM vmerge.vxm v4, v8, a0, v01462# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m4, tu, mu1463# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VMERGE_VIM vmerge.vim v4, v8, 0, v01464# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m8, tu, mu1465# CHECK-NEXT: 1 4 16.00 4 VLEN1024X300SiFive7VA1[1,17],VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VMERGE_VVM vmerge.vvm v4, v8, v12, v01466# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, mf2, tu, mu1467# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMERGE_VXM vmerge.vxm v4, v8, a0, v01468# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m1, tu, mu1469# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VMERGE_VIM vmerge.vim v4, v8, 0, v01470# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m2, tu, mu1471# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VMERGE_VVM vmerge.vvm v4, v8, v12, v01472# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m4, tu, mu1473# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VMERGE_VXM vmerge.vxm v4, v8, a0, v01474# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m8, tu, mu1475# CHECK-NEXT: 1 4 16.00 4 VLEN1024X300SiFive7VA1[1,17],VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VMERGE_VIM vmerge.vim v4, v8, 0, v01476# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m1, tu, mu1477# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VMERGE_VVM vmerge.vvm v4, v8, v12, v01478# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m2, tu, mu1479# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VMERGE_VXM vmerge.vxm v4, v8, a0, v01480# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m4, tu, mu1481# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VMERGE_VIM vmerge.vim v4, v8, 0, v01482# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m8, tu, mu1483# CHECK-NEXT: 1 4 16.00 4 VLEN1024X300SiFive7VA1[1,17],VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VMERGE_VVM vmerge.vvm v4, v8, v12, v01484# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf8, tu, mu1485# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMV_V_V vmv.v.v v4, v121486# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf4, tu, mu1487# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMV_V_X vmv.v.x v4, a01488# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, mf2, tu, mu1489# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMV_V_I vmv.v.i v4, 01490# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m1, tu, mu1491# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VMV_V_V vmv.v.v v4, v121492# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m2, tu, mu1493# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VMV_V_X vmv.v.x v4, a01494# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m4, tu, mu1495# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VMV_V_I vmv.v.i v4, 01496# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e8, m8, tu, mu1497# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VMV_V_V vmv.v.v v4, v121498# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf4, tu, mu1499# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMV_V_X vmv.v.x v4, a01500# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf2, tu, mu1501# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMV_V_I vmv.v.i v4, 01502# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m1, tu, mu1503# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VMV_V_V vmv.v.v v4, v121504# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m2, tu, mu1505# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VMV_V_X vmv.v.x v4, a01506# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m4, tu, mu1507# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VMV_V_I vmv.v.i v4, 01508# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m8, tu, mu1509# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VMV_V_V vmv.v.v v4, v121510# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, mf2, tu, mu1511# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ VMV_V_X vmv.v.x v4, a01512# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m1, tu, mu1513# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VMV_V_I vmv.v.i v4, 01514# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m2, tu, mu1515# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VMV_V_V vmv.v.v v4, v121516# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m4, tu, mu1517# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VMV_V_X vmv.v.x v4, a01518# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e32, m8, tu, mu1519# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VMV_V_I vmv.v.i v4, 01520# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m1, tu, mu1521# CHECK-NEXT: 1 4 1.00 4 VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ VMV_V_V vmv.v.v v4, v121522# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m2, tu, mu1523# CHECK-NEXT: 1 4 2.00 4 VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ VMV_V_X vmv.v.x v4, a01524# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m4, tu, mu1525# CHECK-NEXT: 1 4 4.00 4 VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ VMV_V_I vmv.v.i v4, 01526# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e64, m8, tu, mu1527# CHECK-NEXT: 1 4 8.00 4 VLEN1024X300SiFive7VA1OrVA2[1,17],VLEN1024X300SiFive7VCQ VMV_V_V vmv.v.v v4, v121528 1529# CHECK: Resources:1530# CHECK-NEXT: [0] - VLEN1024X300SiFive7FDiv1531# CHECK-NEXT: [1] - VLEN1024X300SiFive7IDiv1532# CHECK-NEXT: [2] - VLEN1024X300SiFive7PipeA1533# CHECK-NEXT: [3] - VLEN1024X300SiFive7PipeB1534# CHECK-NEXT: [4] - VLEN1024X300SiFive7VA11535# CHECK-NEXT: [5] - VLEN1024X300SiFive7VA21536# CHECK-NEXT: [6] - VLEN1024X300SiFive7VCQ1537# CHECK-NEXT: [7] - VLEN1024X300SiFive7VL1538# CHECK-NEXT: [8] - VLEN1024X300SiFive7VS1539 1540# CHECK: Resource pressure per iteration:1541# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8]1542# CHECK-NEXT: - - 342.00 - 17658.50 682.50 385.00 - -1543 1544# CHECK: Resource pressure by instruction:1545# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] Instructions:1546# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu1547# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vadd.vv v4, v8, v121548# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu1549# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vadd.vx v4, v8, a01550# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu1551# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vadd.vi v4, v8, 01552# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu1553# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vsub.vv v4, v8, v121554# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m2, tu, mu1555# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vsub.vx v4, v8, a01556# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m4, tu, mu1557# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vrsub.vx v4, v8, a01558# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m8, tu, mu1559# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vrsub.vi v4, v8, 01560# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu1561# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vadd.vv v4, v8, v121562# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu1563# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vadd.vx v4, v8, a01564# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu1565# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vadd.vi v4, v8, 01566# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m2, tu, mu1567# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vsub.vv v4, v8, v121568# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m4, tu, mu1569# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vsub.vx v4, v8, a01570# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m8, tu, mu1571# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vrsub.vx v4, v8, a01572# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu1573# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vrsub.vi v4, v8, 01574# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu1575# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vadd.vv v4, v8, v121576# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m2, tu, mu1577# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vadd.vx v4, v8, a01578# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m4, tu, mu1579# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vadd.vi v4, v8, 01580# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m8, tu, mu1581# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vsub.vv v4, v8, v121582# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m1, tu, mu1583# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vsub.vx v4, v8, a01584# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m2, tu, mu1585# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vrsub.vx v4, v8, a01586# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m4, tu, mu1587# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vrsub.vi v4, v8, 01588# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m8, tu, mu1589# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vadd.vv v4, v8, v121590# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu1591# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vwaddu.vv v4, v8, v121592# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu1593# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vwaddu.vx v4, v8, a01594# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu1595# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vwsubu.vv v4, v8, v121596# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu1597# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vwsubu.vx v4, v8, a01598# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m2, tu, mu1599# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vwadd.vv v4, v8, v121600# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m4, tu, mu1601# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vwadd.vx v4, v8, a01602# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m8, tu, mu1603# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vwsub.vv v4, v8, v121604# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu1605# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vwsub.vx v4, v8, a01606# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu1607# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vwaddu.wv v4, v8, v121608# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu1609# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vwaddu.wx v4, v8, a01610# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m2, tu, mu1611# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vwsubu.wv v4, v8, v121612# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m4, tu, mu1613# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vwsubu.wx v4, v8, a01614# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m8, tu, mu1615# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vwadd.wv v4, v8, v121616# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu1617# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vwadd.wx v4, v8, a01618# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu1619# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vwsub.wv v4, v8, v121620# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m2, tu, mu1621# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vwsub.wx v4, v8, a01622# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m4, tu, mu1623# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vwaddu.vv v4, v8, v121624# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m8, tu, mu1625# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vwaddu.vx v4, v8, a01626# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu1627# CHECK-NEXT: - - - - 2.00 - 1.00 - - vzext.vf2 v4, v81628# CHECK-NEXT: - - - - 2.00 - 1.00 - - vsext.vf2 v4, v81629# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu1630# CHECK-NEXT: - - - - 2.00 - 1.00 - - vzext.vf2 v4, v81631# CHECK-NEXT: - - - - 2.00 - 1.00 - - vsext.vf2 v4, v81632# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu1633# CHECK-NEXT: - - - - 3.00 - 1.00 - - vzext.vf2 v4, v81634# CHECK-NEXT: - - - - 3.00 - 1.00 - - vsext.vf2 v4, v81635# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m2, tu, mu1636# CHECK-NEXT: - - - - 5.00 - 1.00 - - vzext.vf2 v4, v81637# CHECK-NEXT: - - - - 5.00 - 1.00 - - vsext.vf2 v4, v81638# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m4, tu, mu1639# CHECK-NEXT: - - - - 9.00 - 1.00 - - vzext.vf2 v4, v81640# CHECK-NEXT: - - - - 9.00 - 1.00 - - vsext.vf2 v4, v81641# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m8, tu, mu1642# CHECK-NEXT: - - - - 17.00 - 1.00 - - vzext.vf2 v4, v81643# CHECK-NEXT: - - - - 17.00 - 1.00 - - vsext.vf2 v4, v81644# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu1645# CHECK-NEXT: - - - - 2.00 - 1.00 - - vzext.vf2 v4, v81646# CHECK-NEXT: - - - - 2.00 - 1.00 - - vsext.vf2 v4, v81647# CHECK-NEXT: - - - - 2.00 - 1.00 - - vzext.vf4 v4, v81648# CHECK-NEXT: - - - - 2.00 - 1.00 - - vsext.vf4 v4, v81649# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu1650# CHECK-NEXT: - - - - 3.00 - 1.00 - - vzext.vf2 v4, v81651# CHECK-NEXT: - - - - 3.00 - 1.00 - - vsext.vf2 v4, v81652# CHECK-NEXT: - - - - 3.00 - 1.00 - - vzext.vf4 v4, v81653# CHECK-NEXT: - - - - 3.00 - 1.00 - - vsext.vf4 v4, v81654# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m2, tu, mu1655# CHECK-NEXT: - - - - 5.00 - 1.00 - - vzext.vf2 v4, v81656# CHECK-NEXT: - - - - 5.00 - 1.00 - - vsext.vf2 v4, v81657# CHECK-NEXT: - - - - 5.00 - 1.00 - - vzext.vf4 v4, v81658# CHECK-NEXT: - - - - 5.00 - 1.00 - - vsext.vf4 v4, v81659# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m4, tu, mu1660# CHECK-NEXT: - - - - 9.00 - 1.00 - - vzext.vf2 v4, v81661# CHECK-NEXT: - - - - 9.00 - 1.00 - - vsext.vf2 v4, v81662# CHECK-NEXT: - - - - 9.00 - 1.00 - - vzext.vf4 v4, v81663# CHECK-NEXT: - - - - 9.00 - 1.00 - - vsext.vf4 v4, v81664# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m8, tu, mu1665# CHECK-NEXT: - - - - 17.00 - 1.00 - - vzext.vf2 v4, v81666# CHECK-NEXT: - - - - 17.00 - 1.00 - - vsext.vf2 v4, v81667# CHECK-NEXT: - - - - 17.00 - 1.00 - - vzext.vf4 v4, v81668# CHECK-NEXT: - - - - 17.00 - 1.00 - - vsext.vf4 v4, v81669# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m1, tu, mu1670# CHECK-NEXT: - - - - 3.00 - 1.00 - - vzext.vf2 v4, v81671# CHECK-NEXT: - - - - 3.00 - 1.00 - - vsext.vf2 v4, v81672# CHECK-NEXT: - - - - 3.00 - 1.00 - - vzext.vf4 v4, v81673# CHECK-NEXT: - - - - 3.00 - 1.00 - - vsext.vf4 v4, v81674# CHECK-NEXT: - - - - 3.00 - 1.00 - - vzext.vf8 v4, v81675# CHECK-NEXT: - - - - 3.00 - 1.00 - - vsext.vf8 v4, v81676# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m2, tu, mu1677# CHECK-NEXT: - - - - 5.00 - 1.00 - - vzext.vf2 v4, v81678# CHECK-NEXT: - - - - 5.00 - 1.00 - - vsext.vf2 v4, v81679# CHECK-NEXT: - - - - 5.00 - 1.00 - - vzext.vf4 v4, v81680# CHECK-NEXT: - - - - 5.00 - 1.00 - - vsext.vf4 v4, v81681# CHECK-NEXT: - - - - 5.00 - 1.00 - - vzext.vf8 v4, v81682# CHECK-NEXT: - - - - 5.00 - 1.00 - - vsext.vf8 v4, v81683# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m4, tu, mu1684# CHECK-NEXT: - - - - 9.00 - 1.00 - - vzext.vf2 v4, v81685# CHECK-NEXT: - - - - 9.00 - 1.00 - - vsext.vf2 v4, v81686# CHECK-NEXT: - - - - 9.00 - 1.00 - - vzext.vf4 v4, v81687# CHECK-NEXT: - - - - 9.00 - 1.00 - - vsext.vf4 v4, v81688# CHECK-NEXT: - - - - 9.00 - 1.00 - - vzext.vf8 v4, v81689# CHECK-NEXT: - - - - 9.00 - 1.00 - - vsext.vf8 v4, v81690# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m8, tu, mu1691# CHECK-NEXT: - - - - 17.00 - 1.00 - - vzext.vf2 v4, v81692# CHECK-NEXT: - - - - 17.00 - 1.00 - - vsext.vf2 v4, v81693# CHECK-NEXT: - - - - 17.00 - 1.00 - - vzext.vf4 v4, v81694# CHECK-NEXT: - - - - 17.00 - 1.00 - - vsext.vf4 v4, v81695# CHECK-NEXT: - - - - 17.00 - 1.00 - - vzext.vf8 v4, v81696# CHECK-NEXT: - - - - 17.00 - 1.00 - - vsext.vf8 v4, v81697# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu1698# CHECK-NEXT: - - - - 2.00 - 1.00 - - vadc.vvm v4, v8, v12, v01699# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu1700# CHECK-NEXT: - - - - 2.00 - 1.00 - - vadc.vxm v4, v8, a0, v01701# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu1702# CHECK-NEXT: - - - - 2.00 - 1.00 - - vadc.vim v4, v8, 0, v01703# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu1704# CHECK-NEXT: - - - - 3.00 - 1.00 - - vmadc.vvm v4, v8, v12, v01705# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m2, tu, mu1706# CHECK-NEXT: - - - - 5.00 - 1.00 - - vmadc.vxm v4, v8, a0, v01707# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m4, tu, mu1708# CHECK-NEXT: - - - - 9.00 - 1.00 - - vmadc.vim v4, v8, 0, v01709# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m8, tu, mu1710# CHECK-NEXT: - - - - 17.00 - 1.00 - - vmadc.vv v4, v8, v121711# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu1712# CHECK-NEXT: - - - - 2.00 - 1.00 - - vmadc.vx v4, v8, a01713# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu1714# CHECK-NEXT: - - - - 2.00 - 1.00 - - vmadc.vi v4, v8, 01715# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu1716# CHECK-NEXT: - - - - 3.00 - 1.00 - - vsbc.vvm v4, v8, v12, v01717# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m2, tu, mu1718# CHECK-NEXT: - - - - 5.00 - 1.00 - - vsbc.vxm v4, v8, a0, v01719# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m4, tu, mu1720# CHECK-NEXT: - - - - 9.00 - 1.00 - - vmsbc.vvm v4, v8, v12, v01721# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m8, tu, mu1722# CHECK-NEXT: - - - - 17.00 - 1.00 - - vmsbc.vxm v4, v8, a0, v01723# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu1724# CHECK-NEXT: - - - - 2.00 - 1.00 - - vmsbc.vv v4, v8, v121725# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu1726# CHECK-NEXT: - - - - 3.00 - 1.00 - - vmsbc.vx v4, v8, a01727# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m2, tu, mu1728# CHECK-NEXT: - - - - 5.00 - 1.00 - - vadc.vvm v4, v8, v12, v01729# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m4, tu, mu1730# CHECK-NEXT: - - - - 9.00 - 1.00 - - vadc.vxm v4, v8, a0, v01731# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m8, tu, mu1732# CHECK-NEXT: - - - - 17.00 - 1.00 - - vadc.vim v4, v8, 0, v01733# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m1, tu, mu1734# CHECK-NEXT: - - - - 3.00 - 1.00 - - vmadc.vvm v4, v8, v12, v01735# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m2, tu, mu1736# CHECK-NEXT: - - - - 5.00 - 1.00 - - vmadc.vxm v4, v8, a0, v01737# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m4, tu, mu1738# CHECK-NEXT: - - - - 9.00 - 1.00 - - vmadc.vim v4, v8, 0, v01739# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m8, tu, mu1740# CHECK-NEXT: - - - - 17.00 - 1.00 - - vmadc.vv v4, v8, v121741# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu1742# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vand.vv v4, v8, v121743# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu1744# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vand.vx v4, v8, a01745# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu1746# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vand.vi v4, v8, 01747# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu1748# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vor.vv v4, v8, v121749# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m2, tu, mu1750# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vor.vx v4, v8, a01751# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m4, tu, mu1752# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vor.vi v4, v8, 01753# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m8, tu, mu1754# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vxor.vv v4, v8, v121755# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu1756# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vxor.vx v4, v8, a01757# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu1758# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vxor.vi v4, v8, 01759# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu1760# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vand.vv v4, v8, v121761# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m2, tu, mu1762# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vand.vx v4, v8, a01763# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m4, tu, mu1764# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vand.vi v4, v8, 01765# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m8, tu, mu1766# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vor.vv v4, v8, v121767# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu1768# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vor.vx v4, v8, a01769# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu1770# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vor.vi v4, v8, 01771# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m2, tu, mu1772# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vxor.vv v4, v8, v121773# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m4, tu, mu1774# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vxor.vx v4, v8, a01775# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m8, tu, mu1776# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vxor.vi v4, v8, 01777# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m1, tu, mu1778# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vand.vv v4, v8, v121779# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m2, tu, mu1780# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vand.vx v4, v8, a01781# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m4, tu, mu1782# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vand.vi v4, v8, 01783# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m8, tu, mu1784# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vor.vv v4, v8, v121785# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu1786# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vsll.vv v4, v8, v121787# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu1788# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vsll.vx v4, v8, a01789# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu1790# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vsll.vi v4, v8, 01791# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu1792# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vsrl.vv v4, v8, v121793# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m2, tu, mu1794# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vsrl.vx v4, v8, a01795# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m4, tu, mu1796# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vsrl.vi v4, v8, 01797# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m8, tu, mu1798# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vsra.vv v4, v8, v121799# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu1800# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vsra.vx v4, v8, a01801# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu1802# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vsra.vi v4, v8, 01803# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu1804# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vsll.vv v4, v8, v121805# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m2, tu, mu1806# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vsll.vx v4, v8, a01807# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m4, tu, mu1808# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vsll.vi v4, v8, 01809# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m8, tu, mu1810# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vsrl.vv v4, v8, v121811# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu1812# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vsrl.vx v4, v8, a01813# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu1814# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vsrl.vi v4, v8, 01815# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m2, tu, mu1816# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vsra.vv v4, v8, v121817# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m4, tu, mu1818# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vsra.vx v4, v8, a01819# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m8, tu, mu1820# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vsra.vi v4, v8, 01821# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m1, tu, mu1822# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vsll.vv v4, v8, v121823# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m2, tu, mu1824# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vsll.vx v4, v8, a01825# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m4, tu, mu1826# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vsll.vi v4, v8, 01827# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m8, tu, mu1828# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vsrl.vv v4, v8, v121829# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu1830# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vnsrl.wv v4, v8, v121831# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu1832# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vnsrl.wx v4, v8, a01833# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu1834# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vnsrl.wi v4, v8, 01835# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu1836# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vnsra.wv v4, v8, v121837# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m2, tu, mu1838# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vnsra.wx v4, v8, a01839# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m4, tu, mu1840# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vnsra.wi v4, v8, 01841# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m8, tu, mu1842# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vnsrl.wv v4, v8, v121843# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu1844# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vnsrl.wx v4, v8, a01845# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu1846# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vnsrl.wi v4, v8, 01847# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu1848# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vnsra.wv v4, v8, v121849# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m2, tu, mu1850# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vnsra.wx v4, v8, a01851# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m4, tu, mu1852# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vnsra.wi v4, v8, 01853# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m8, tu, mu1854# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vnsrl.wv v4, v8, v121855# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu1856# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vnsrl.wx v4, v8, a01857# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu1858# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vnsrl.wi v4, v8, 01859# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m2, tu, mu1860# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vnsra.wv v4, v8, v121861# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m4, tu, mu1862# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vnsra.wx v4, v8, a01863# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m8, tu, mu1864# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vnsra.wi v4, v8, 01865# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m1, tu, mu1866# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vnsrl.wv v4, v8, v121867# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m2, tu, mu1868# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vnsrl.wx v4, v8, a01869# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m4, tu, mu1870# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vnsrl.wi v4, v8, 01871# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m8, tu, mu1872# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vnsra.wv v4, v8, v121873# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu1874# CHECK-NEXT: - - - - 2.00 - 1.00 - - vmseq.vv v4, v8, v121875# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu1876# CHECK-NEXT: - - - - 2.00 - 1.00 - - vmseq.vx v4, v8, a01877# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu1878# CHECK-NEXT: - - - - 2.00 - 1.00 - - vmseq.vi v4, v8, 01879# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu1880# CHECK-NEXT: - - - - 3.00 - 1.00 - - vmsne.vv v4, v8, v121881# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m2, tu, mu1882# CHECK-NEXT: - - - - 5.00 - 1.00 - - vmsne.vx v4, v8, a01883# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m4, tu, mu1884# CHECK-NEXT: - - - - 9.00 - 1.00 - - vmsne.vi v4, v8, 01885# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m8, tu, mu1886# CHECK-NEXT: - - - - 17.00 - 1.00 - - vmsltu.vv v4, v8, v121887# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu1888# CHECK-NEXT: - - - - 2.00 - 1.00 - - vmsltu.vx v4, v8, a01889# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu1890# CHECK-NEXT: - - - - 2.00 - 1.00 - - vmslt.vv v4, v8, v121891# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu1892# CHECK-NEXT: - - - - 3.00 - 1.00 - - vmslt.vx v4, v8, a01893# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m2, tu, mu1894# CHECK-NEXT: - - - - 5.00 - 1.00 - - vmsleu.vv v4, v8, v121895# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m4, tu, mu1896# CHECK-NEXT: - - - - 9.00 - 1.00 - - vmsleu.vx v4, v8, a01897# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m8, tu, mu1898# CHECK-NEXT: - - - - 17.00 - 1.00 - - vmsleu.vi v4, v8, 01899# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu1900# CHECK-NEXT: - - - - 2.00 - 1.00 - - vmsle.vv v4, v8, v121901# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu1902# CHECK-NEXT: - - - - 3.00 - 1.00 - - vmsle.vx v4, v8, a01903# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m2, tu, mu1904# CHECK-NEXT: - - - - 5.00 - 1.00 - - vmsle.vi v4, v8, 01905# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m4, tu, mu1906# CHECK-NEXT: - - - - 9.00 - 1.00 - - vmsgtu.vx v4, v8, a01907# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m8, tu, mu1908# CHECK-NEXT: - - - - 17.00 - 1.00 - - vmsgtu.vi v4, v8, 01909# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m1, tu, mu1910# CHECK-NEXT: - - - - 3.00 - 1.00 - - vmsgt.vx v4, v8, a01911# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m2, tu, mu1912# CHECK-NEXT: - - - - 5.00 - 1.00 - - vmsgt.vi v4, v8, 01913# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m4, tu, mu1914# CHECK-NEXT: - - - - 9.00 - 1.00 - - vmseq.vv v4, v8, v121915# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m8, tu, mu1916# CHECK-NEXT: - - - - 17.00 - 1.00 - - vmseq.vx v4, v8, a01917# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu1918# CHECK-NEXT: - - - - 2.00 - 1.00 - - vmsle.vi v4, v8, 01919# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu1920# CHECK-NEXT: - - - - 2.00 - 1.00 - - vmsleu.vi v4, v8, 01921# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu1922# CHECK-NEXT: - - - - 2.00 - 1.00 - - vmsne.vv v4, v8, v81923# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu1924# CHECK-NEXT: - - - - 3.00 - 1.00 - - vmsgtu.vi v4, v8, 01925# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m2, tu, mu1926# CHECK-NEXT: - - - - 5.00 - 1.00 - - vmsgt.vi v4, v8, 01927# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m4, tu, mu1928# CHECK-NEXT: - - - - 9.00 - 1.00 - - vmseq.vv v4, v8, v81929# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu1930# CHECK-NEXT: - - - - 2.00 - 1.00 - - vmsgt.vi v4, v8, -11931# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu1932# CHECK-NEXT: - - - - 2.00 - 1.00 - - vmslt.vx v4, v8, a01933# CHECK-NEXT: - - - - 2.00 - 1.00 - - vmnot.m v4, v41934# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu1935# CHECK-NEXT: - - - - 3.00 - 1.00 - - vmsltu.vx v4, v8, a11936# CHECK-NEXT: - - - - 2.00 - 1.00 - - vmnot.m v4, v41937# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu1938# CHECK-NEXT: - - - - 2.00 - 1.00 - - vminu.vv v4, v8, v121939# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu1940# CHECK-NEXT: - - - - 2.00 - 1.00 - - vminu.vx v4, v8, a01941# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu1942# CHECK-NEXT: - - - - 2.00 - 1.00 - - vmin.vv v4, v8, v121943# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu1944# CHECK-NEXT: - - - - 3.00 - 1.00 - - vmin.vx v4, v8, a01945# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m2, tu, mu1946# CHECK-NEXT: - - - - 5.00 - 1.00 - - vmaxu.vv v4, v8, v121947# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m4, tu, mu1948# CHECK-NEXT: - - - - 9.00 - 1.00 - - vmaxu.vx v4, v8, a01949# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m8, tu, mu1950# CHECK-NEXT: - - - - 17.00 - 1.00 - - vmax.vv v4, v8, v121951# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu1952# CHECK-NEXT: - - - - 2.00 - 1.00 - - vmax.vx v4, v8, a01953# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu1954# CHECK-NEXT: - - - - 2.00 - 1.00 - - vminu.vv v4, v8, v121955# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu1956# CHECK-NEXT: - - - - 3.00 - 1.00 - - vminu.vx v4, v8, a01957# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m2, tu, mu1958# CHECK-NEXT: - - - - 5.00 - 1.00 - - vmin.vv v4, v8, v121959# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m4, tu, mu1960# CHECK-NEXT: - - - - 9.00 - 1.00 - - vmin.vx v4, v8, a01961# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m8, tu, mu1962# CHECK-NEXT: - - - - 17.00 - 1.00 - - vmaxu.vv v4, v8, v121963# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu1964# CHECK-NEXT: - - - - 2.00 - 1.00 - - vmaxu.vx v4, v8, a01965# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu1966# CHECK-NEXT: - - - - 3.00 - 1.00 - - vmax.vv v4, v8, v121967# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m2, tu, mu1968# CHECK-NEXT: - - - - 5.00 - 1.00 - - vmax.vx v4, v8, a01969# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m4, tu, mu1970# CHECK-NEXT: - - - - 9.00 - 1.00 - - vminu.vv v4, v8, v121971# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m8, tu, mu1972# CHECK-NEXT: - - - - 17.00 - 1.00 - - vminu.vx v4, v8, a01973# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m1, tu, mu1974# CHECK-NEXT: - - - - 3.00 - 1.00 - - vmin.vv v4, v8, v121975# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m2, tu, mu1976# CHECK-NEXT: - - - - 5.00 - 1.00 - - vmin.vx v4, v8, a01977# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m4, tu, mu1978# CHECK-NEXT: - - - - 9.00 - 1.00 - - vmaxu.vv v4, v8, v121979# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m8, tu, mu1980# CHECK-NEXT: - - - - 17.00 - 1.00 - - vmaxu.vx v4, v8, a01981# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu1982# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vmul.vv v4, v8, v121983# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu1984# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vmul.vx v4, v8, a01985# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu1986# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vmulh.vv v4, v8, v121987# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu1988# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vmulh.vx v4, v8, a01989# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m2, tu, mu1990# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vmulhu.vv v4, v8, v121991# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m4, tu, mu1992# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vmulhu.vx v4, v8, a01993# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m8, tu, mu1994# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vmulhsu.vv v4, v8, v121995# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu1996# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vmulhsu.vx v4, v8, a01997# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu1998# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vmul.vv v4, v8, v121999# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu2000# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vmul.vx v4, v8, a02001# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m2, tu, mu2002# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vmulh.vv v4, v8, v122003# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m4, tu, mu2004# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vmulh.vx v4, v8, a02005# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m8, tu, mu2006# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vmulhu.vv v4, v8, v122007# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu2008# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vmulhu.vx v4, v8, a02009# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu2010# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vmulhsu.vv v4, v8, v122011# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m2, tu, mu2012# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vmulhsu.vx v4, v8, a02013# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m4, tu, mu2014# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vmul.vv v4, v8, v122015# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m8, tu, mu2016# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vmul.vx v4, v8, a02017# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m1, tu, mu2018# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vmulh.vv v4, v8, v122019# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m2, tu, mu2020# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vmulh.vx v4, v8, a02021# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m4, tu, mu2022# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vmulhu.vv v4, v8, v122023# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m8, tu, mu2024# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vmulhu.vx v4, v8, a02025# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu2026# CHECK-NEXT: - - - - 33.00 - 1.00 - - vdivu.vv v4, v8, v122027# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu2028# CHECK-NEXT: - - - - 65.00 - 1.00 - - vdivu.vx v4, v8, a02029# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu2030# CHECK-NEXT: - - - - 129.00 - 1.00 - - vdiv.vv v4, v8, v122031# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu2032# CHECK-NEXT: - - - - 257.00 - 1.00 - - vdiv.vx v4, v8, a02033# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m2, tu, mu2034# CHECK-NEXT: - - - - 513.00 - 1.00 - - vremu.vv v4, v8, v122035# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m4, tu, mu2036# CHECK-NEXT: - - - - 1025.00 - 1.00 - - vremu.vx v4, v8, a02037# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m8, tu, mu2038# CHECK-NEXT: - - - - 2049.00 - 1.00 - - vrem.vv v4, v8, v122039# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu2040# CHECK-NEXT: - - - - 65.00 - 1.00 - - vrem.vx v4, v8, a02041# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu2042# CHECK-NEXT: - - - - 129.00 - 1.00 - - vdivu.vv v4, v8, v122043# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu2044# CHECK-NEXT: - - - - 257.00 - 1.00 - - vdivu.vx v4, v8, a02045# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m2, tu, mu2046# CHECK-NEXT: - - - - 513.00 - 1.00 - - vdiv.vv v4, v8, v122047# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m4, tu, mu2048# CHECK-NEXT: - - - - 1025.00 - 1.00 - - vdiv.vx v4, v8, a02049# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m8, tu, mu2050# CHECK-NEXT: - - - - 2049.00 - 1.00 - - vremu.vv v4, v8, v122051# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu2052# CHECK-NEXT: - - - - 129.00 - 1.00 - - vremu.vx v4, v8, a02053# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu2054# CHECK-NEXT: - - - - 257.00 - 1.00 - - vrem.vv v4, v8, v122055# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m2, tu, mu2056# CHECK-NEXT: - - - - 513.00 - 1.00 - - vrem.vx v4, v8, a02057# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m4, tu, mu2058# CHECK-NEXT: - - - - 1025.00 - 1.00 - - vdivu.vv v4, v8, v122059# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m8, tu, mu2060# CHECK-NEXT: - - - - 2049.00 - 1.00 - - vdivu.vx v4, v8, a02061# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m1, tu, mu2062# CHECK-NEXT: - - - - 257.00 - 1.00 - - vdiv.vv v4, v8, v122063# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m2, tu, mu2064# CHECK-NEXT: - - - - 513.00 - 1.00 - - vdiv.vx v4, v8, a02065# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m4, tu, mu2066# CHECK-NEXT: - - - - 1025.00 - 1.00 - - vremu.vv v4, v8, v122067# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m8, tu, mu2068# CHECK-NEXT: - - - - 2049.00 - 1.00 - - vremu.vx v4, v8, a02069# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu2070# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vwmul.vv v4, v8, v122071# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu2072# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vwmul.vx v4, v8, a02073# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu2074# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vwmulu.vv v4, v8, v122075# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu2076# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vwmulu.vx v4, v8, a02077# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m2, tu, mu2078# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vwmulsu.vv v4, v8, v122079# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m4, tu, mu2080# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vwmulsu.vx v4, v8, a02081# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m8, tu, mu2082# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vwmul.vv v4, v8, v122083# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu2084# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vwmul.vx v4, v8, a02085# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu2086# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vwmulu.vv v4, v8, v122087# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu2088# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vwmulu.vx v4, v8, a02089# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m2, tu, mu2090# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vwmulsu.vv v4, v8, v122091# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m4, tu, mu2092# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vwmulsu.vx v4, v8, a02093# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m8, tu, mu2094# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vwmul.vv v4, v8, v122095# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu2096# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vwmul.vx v4, v8, a02097# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu2098# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vwmulu.vv v4, v8, v122099# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m2, tu, mu2100# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vwmulu.vx v4, v8, a02101# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m4, tu, mu2102# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vwmulsu.vv v4, v8, v122103# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m8, tu, mu2104# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vwmulsu.vx v4, v8, a02105# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu2106# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vmacc.vv v4, v12, v82107# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu2108# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vmacc.vx v4, a0, v82109# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu2110# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vnmsac.vv v4, v12, v82111# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu2112# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vnmsac.vx v4, a0, v82113# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m2, tu, mu2114# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vmadd.vv v4, v12, v82115# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m4, tu, mu2116# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vmadd.vx v4, a0, v82117# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m8, tu, mu2118# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vnmsub.vv v4, v12, v82119# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu2120# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vnmsub.vx v4, a0, v82121# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu2122# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vmacc.vv v4, v12, v82123# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu2124# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vmacc.vx v4, a0, v82125# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m2, tu, mu2126# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vnmsac.vv v4, v12, v82127# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m4, tu, mu2128# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vnmsac.vx v4, a0, v82129# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m8, tu, mu2130# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vmadd.vv v4, v12, v82131# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu2132# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vmadd.vx v4, a0, v82133# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu2134# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vnmsub.vv v4, v12, v82135# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m2, tu, mu2136# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vnmsub.vx v4, a0, v82137# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m4, tu, mu2138# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vmacc.vv v4, v12, v82139# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m8, tu, mu2140# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vmacc.vx v4, a0, v82141# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m1, tu, mu2142# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vnmsac.vv v4, v12, v82143# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m2, tu, mu2144# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vnmsac.vx v4, a0, v82145# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m4, tu, mu2146# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vmadd.vv v4, v12, v82147# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m8, tu, mu2148# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vmadd.vx v4, a0, v82149# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu2150# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vwmaccu.vv v4, v12, v82151# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu2152# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vwmaccu.vx v4, a0, v82153# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu2154# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vwmacc.vv v4, v12, v82155# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu2156# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vwmacc.vx v4, a0, v82157# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m2, tu, mu2158# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vwmaccsu.vv v4, v12, v82159# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m4, tu, mu2160# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vwmaccsu.vx v4, a0, v82161# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m8, tu, mu2162# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vwmaccus.vx v4, a0, v82163# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu2164# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vwmaccu.vv v4, v12, v82165# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu2166# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vwmaccu.vx v4, a0, v82167# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu2168# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vwmacc.vv v4, v12, v82169# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m2, tu, mu2170# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vwmacc.vx v4, a0, v82171# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m4, tu, mu2172# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vwmaccsu.vv v4, v12, v82173# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m8, tu, mu2174# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vwmaccsu.vx v4, a0, v82175# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu2176# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vwmaccus.vx v4, a0, v82177# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu2178# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vwmaccu.vv v4, v12, v82179# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m2, tu, mu2180# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vwmaccu.vx v4, a0, v82181# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m4, tu, mu2182# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vwmacc.vv v4, v12, v82183# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m8, tu, mu2184# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vwmacc.vx v4, a0, v82185# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu2186# CHECK-NEXT: - - - - 2.00 - 1.00 - - vmerge.vvm v4, v8, v12, v02187# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu2188# CHECK-NEXT: - - - - 2.00 - 1.00 - - vmerge.vxm v4, v8, a0, v02189# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu2190# CHECK-NEXT: - - - - 2.00 - 1.00 - - vmerge.vim v4, v8, 0, v02191# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu2192# CHECK-NEXT: - - - - 3.00 - 1.00 - - vmerge.vvm v4, v8, v12, v02193# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m2, tu, mu2194# CHECK-NEXT: - - - - 5.00 - 1.00 - - vmerge.vxm v4, v8, a0, v02195# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m4, tu, mu2196# CHECK-NEXT: - - - - 9.00 - 1.00 - - vmerge.vim v4, v8, 0, v02197# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m8, tu, mu2198# CHECK-NEXT: - - - - 17.00 - 1.00 - - vmerge.vvm v4, v8, v12, v02199# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu2200# CHECK-NEXT: - - - - 2.00 - 1.00 - - vmerge.vxm v4, v8, a0, v02201# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu2202# CHECK-NEXT: - - - - 2.00 - 1.00 - - vmerge.vim v4, v8, 0, v02203# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu2204# CHECK-NEXT: - - - - 3.00 - 1.00 - - vmerge.vvm v4, v8, v12, v02205# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m2, tu, mu2206# CHECK-NEXT: - - - - 5.00 - 1.00 - - vmerge.vxm v4, v8, a0, v02207# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m4, tu, mu2208# CHECK-NEXT: - - - - 9.00 - 1.00 - - vmerge.vim v4, v8, 0, v02209# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m8, tu, mu2210# CHECK-NEXT: - - - - 17.00 - 1.00 - - vmerge.vvm v4, v8, v12, v02211# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu2212# CHECK-NEXT: - - - - 2.00 - 1.00 - - vmerge.vxm v4, v8, a0, v02213# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu2214# CHECK-NEXT: - - - - 3.00 - 1.00 - - vmerge.vim v4, v8, 0, v02215# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m2, tu, mu2216# CHECK-NEXT: - - - - 5.00 - 1.00 - - vmerge.vvm v4, v8, v12, v02217# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m4, tu, mu2218# CHECK-NEXT: - - - - 9.00 - 1.00 - - vmerge.vxm v4, v8, a0, v02219# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m8, tu, mu2220# CHECK-NEXT: - - - - 17.00 - 1.00 - - vmerge.vim v4, v8, 0, v02221# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m1, tu, mu2222# CHECK-NEXT: - - - - 3.00 - 1.00 - - vmerge.vvm v4, v8, v12, v02223# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m2, tu, mu2224# CHECK-NEXT: - - - - 5.00 - 1.00 - - vmerge.vxm v4, v8, a0, v02225# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m4, tu, mu2226# CHECK-NEXT: - - - - 9.00 - 1.00 - - vmerge.vim v4, v8, 0, v02227# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m8, tu, mu2228# CHECK-NEXT: - - - - 17.00 - 1.00 - - vmerge.vvm v4, v8, v12, v02229# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu2230# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vmv.v.v v4, v122231# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu2232# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vmv.v.x v4, a02233# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu2234# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vmv.v.i v4, 02235# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu2236# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vmv.v.v v4, v122237# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m2, tu, mu2238# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vmv.v.x v4, a02239# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m4, tu, mu2240# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vmv.v.i v4, 02241# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e8, m8, tu, mu2242# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vmv.v.v v4, v122243# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu2244# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vmv.v.x v4, a02245# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu2246# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vmv.v.i v4, 02247# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu2248# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vmv.v.v v4, v122249# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m2, tu, mu2250# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vmv.v.x v4, a02251# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m4, tu, mu2252# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vmv.v.i v4, 02253# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m8, tu, mu2254# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vmv.v.v v4, v122255# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu2256# CHECK-NEXT: - - - - 1.00 1.00 1.00 - - vmv.v.x v4, a02257# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu2258# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vmv.v.i v4, 02259# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m2, tu, mu2260# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vmv.v.v v4, v122261# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m4, tu, mu2262# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vmv.v.x v4, a02263# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e32, m8, tu, mu2264# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vmv.v.i v4, 02265# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m1, tu, mu2266# CHECK-NEXT: - - - - 1.50 1.50 1.00 - - vmv.v.v v4, v122267# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m2, tu, mu2268# CHECK-NEXT: - - - - 2.50 2.50 1.00 - - vmv.v.x v4, a02269# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m4, tu, mu2270# CHECK-NEXT: - - - - 4.50 4.50 1.00 - - vmv.v.i v4, 02271# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e64, m8, tu, mu2272# CHECK-NEXT: - - - - 8.50 8.50 1.00 - - vmv.v.v v4, v122273