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1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py2# RUN: llvm-mca -mtriple=riscv64 -mcpu=sifive-x390 -mattr='+xsfvfwmaccqqq' -instruction-tables=full -iterations=1 %s | \3# RUN: FileCheck %s4 5vsetvli zero, zero, e16, mf4, ta, ma6sf.vfwmacc.4x4x4 v16, v0, v87vsetvli zero, zero, e16, mf2, ta, ma8sf.vfwmacc.4x4x4 v16, v0, v89vsetvli zero, zero, e16, m1, ta, ma10sf.vfwmacc.4x4x4 v16, v0, v811vsetvli zero, zero, e16, m2, ta, ma12sf.vfwmacc.4x4x4 v16, v0, v813vsetvli zero, zero, e16, m4, ta, ma14sf.vfwmacc.4x4x4 v16, v0, v815 16# CHECK: Resources:17# CHECK-NEXT: [0] - VLEN1024X300SiFive7FDiv:118# CHECK-NEXT: [1] - VLEN1024X300SiFive7IDiv:119# CHECK-NEXT: [2] - VLEN1024X300SiFive7PipeA:120# CHECK-NEXT: [3] - VLEN1024X300SiFive7PipeAB:2 VLEN1024X300SiFive7PipeA, VLEN1024X300SiFive7PipeB21# CHECK-NEXT: [4] - VLEN1024X300SiFive7PipeB:122# CHECK-NEXT: [5] - VLEN1024X300SiFive7VA1:123# CHECK-NEXT: [6] - VLEN1024X300SiFive7VA1OrVA2:2 VLEN1024X300SiFive7VA1, VLEN1024X300SiFive7VA224# CHECK-NEXT: [7] - VLEN1024X300SiFive7VA2:125# CHECK-NEXT: [8] - VLEN1024X300SiFive7VCQ:126# CHECK-NEXT: [9] - VLEN1024X300SiFive7VL:127# CHECK-NEXT: [10] - VLEN1024X300SiFive7VS:128 29# CHECK: Instruction Info:30# CHECK-NEXT: [1]: #uOps31# CHECK-NEXT: [2]: Latency32# CHECK-NEXT: [3]: RThroughput33# CHECK-NEXT: [4]: MayLoad34# CHECK-NEXT: [5]: MayStore35# CHECK-NEXT: [6]: HasSideEffects (U)36# CHECK-NEXT: [7]: Bypass Latency37# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])38# CHECK-NEXT: [9]: LLVM Opcode Name39 40# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:41# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf4, ta, ma42# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ SF_VFWMACC_4x4x4 sf.vfwmacc.4x4x4 v16, v0, v843# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, mf2, ta, ma44# CHECK-NEXT: 1 8 1.00 8 VLEN1024X300SiFive7VA1[1,2],VLEN1024X300SiFive7VA1OrVA2[1,2],VLEN1024X300SiFive7VCQ SF_VFWMACC_4x4x4 sf.vfwmacc.4x4x4 v16, v0, v845# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m1, ta, ma46# CHECK-NEXT: 1 8 2.00 8 VLEN1024X300SiFive7VA1[1,3],VLEN1024X300SiFive7VA1OrVA2[1,3],VLEN1024X300SiFive7VCQ SF_VFWMACC_4x4x4 sf.vfwmacc.4x4x4 v16, v0, v847# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m2, ta, ma48# CHECK-NEXT: 1 8 4.00 8 VLEN1024X300SiFive7VA1[1,5],VLEN1024X300SiFive7VA1OrVA2[1,5],VLEN1024X300SiFive7VCQ SF_VFWMACC_4x4x4 sf.vfwmacc.4x4x4 v16, v0, v849# CHECK-NEXT: 1 3 1.00 U 1 VLEN1024X300SiFive7PipeA,VLEN1024X300SiFive7PipeAB VSETVLI vsetvli zero, zero, e16, m4, ta, ma50# CHECK-NEXT: 1 8 8.00 8 VLEN1024X300SiFive7VA1[1,9],VLEN1024X300SiFive7VA1OrVA2[1,9],VLEN1024X300SiFive7VCQ SF_VFWMACC_4x4x4 sf.vfwmacc.4x4x4 v16, v0, v851 52# CHECK: Resources:53# CHECK-NEXT: [0] - VLEN1024X300SiFive7FDiv54# CHECK-NEXT: [1] - VLEN1024X300SiFive7IDiv55# CHECK-NEXT: [2] - VLEN1024X300SiFive7PipeA56# CHECK-NEXT: [3] - VLEN1024X300SiFive7PipeB57# CHECK-NEXT: [4] - VLEN1024X300SiFive7VA158# CHECK-NEXT: [5] - VLEN1024X300SiFive7VA259# CHECK-NEXT: [6] - VLEN1024X300SiFive7VCQ60# CHECK-NEXT: [7] - VLEN1024X300SiFive7VL61# CHECK-NEXT: [8] - VLEN1024X300SiFive7VS62 63# CHECK: Resource pressure per iteration:64# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8]65# CHECK-NEXT: - - 5.00 - 21.00 - 5.00 - -66 67# CHECK: Resource pressure by instruction:68# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] Instructions:69# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, ta, ma70# CHECK-NEXT: - - - - 2.00 - 1.00 - - sf.vfwmacc.4x4x4 v16, v0, v871# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, ta, ma72# CHECK-NEXT: - - - - 2.00 - 1.00 - - sf.vfwmacc.4x4x4 v16, v0, v873# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m1, ta, ma74# CHECK-NEXT: - - - - 3.00 - 1.00 - - sf.vfwmacc.4x4x4 v16, v0, v875# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m2, ta, ma76# CHECK-NEXT: - - - - 5.00 - 1.00 - - sf.vfwmacc.4x4x4 v16, v0, v877# CHECK-NEXT: - - 1.00 - - - - - - vsetvli zero, zero, e16, m4, ta, ma78# CHECK-NEXT: - - - - 9.00 - 1.00 - - sf.vfwmacc.4x4x4 v16, v0, v879