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1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py2# RUN: llvm-mca -mtriple=riscv64 -mcpu=spacemit-x60 -iterations=1 -instruction-tables=full < %s | FileCheck %s3 4# Integer Register-Immediate Instructions5addi a0, a0, 16addiw a0, a0, 17slti a0, a0, 18sltiu a0, a0, 19 10andi a0, a0, 111ori a0, a0, 112xori a0, a0, 113 14slli a0, a0, 115srli a0, a0, 116srai a0, a0, 117slliw a0, a0, 118srliw a0, a0, 119sraiw a0, a0, 120 21lui a0, 122auipc a1, 123 24# Integer Register-Register Operations25add a0, a0, a126addw a0, a0, a027slt a0, a0, a028sltu a0, a0, a029 30and a0, a0, a031or a0, a0, a032xor a0, a0, a033 34sll a0, a0, a035srl a0, a0, a036sra a0, a0, a037sllw a0, a0, a038srlw a0, a0, a039sraw a0, a0, a040 41sub a0, a0, a042subw a0, a0, a043 44# Control Transfer Instructions45 46## Unconditional Jumps47jal a0, 1f481:49jalr a050beq a0, a0, 1f511:52bne a0, a0, 1f531:54blt a0, a0, 1f551:56bltu a0, a0, 1f571:58bge a0, a0, 1f591:60bgeu a0, a0, 1f611:62add a0, a0, a063 64# Load and Store Instructions65lb t0, 0(a0)66lbu t0, 0(a0)67lh t0, 0(a0)68lhu t0, 0(a0)69lw t0, 0(a0)70lwu t0, 0(a0)71ld t0, 0(a0)72 73sb t0, 0(a0)74sh t0, 0(a0)75sw t0, 0(a0)76sd t0, 0(a0)77 78# Multiply/Division79mul a0, a0, a080mulh a0, a0, a081mulhu a0, a0, a082mulhsu a0, a0, a083mulw a0, a0, a084div a0, a1, a285divu a0, a1, a286rem a0, a1, a287remu a0, a1, a288divw a0, a1, a289divuw a0, a1, a290remw a0, a1, a291remuw a0, a1, a292 93# Zicsr94csrrw t0, 0xfff, t195csrrs s3, 0x001, s596csrrc sp, 0x000, ra97csrrwi a5, 0x000, 098csrrsi t2, 0xfff, 3199csrrci t1, 0x140, 5100 101# Zicond102czero.eqz a0, a1, a2103czero.nez a0, a1, a2104 105# Zicond106czero.eqz a0, a1, a2107czero.nez a0, a1, a2108 109# Zba110add.uw a0, a0, a0111slli.uw a0, a0, 1112sh1add.uw a0, a0, a0113sh2add.uw a0, a0, a0114sh3add.uw a0, a0, a0115sh1add a0, a0, a0116sh2add a0, a0, a0117sh3add a0, a0, a0118 119# Zbb120andn a0, a0, a0121orn a0, a0, a0122xnor a0, a0, a0123 124clz a0, a0125clzw a0, a0126ctz a0, a0127ctzw a0, a0128 129cpop a0, a0130cpopw a0, a0131 132min a0, a0, a0133minu a0, a0, a0134max a0, a0, a0135maxu a0, a0, a0136 137sext.b a0, a0138sext.h a0, a0139zext.h a0, a0140 141rol a0, a0, a0142rolw a0, a0, a0143ror a0, a0, a0144rorw a0, a0, a0145rori a0, a0, 1146roriw a0, a0, 1147 148orc.b a0, a0149 150rev8 a0, a0151 152# Zbc153clmul a0, a0, a0154clmulr a0, a0, a0155clmulh a0, a0, a0156 157# Zbs158bclr a0, a1, a2159bclri a0, a1, 1160bext a0, a1, a2161bexti a0, a1, 1162binv a0, a1, a2163binvi a0, a1, 1164bset a0, a1, a2165bseti a0, a1, 1166 167# CHECK: Resources:168# CHECK-NEXT: [0] - SMX60_FP:1169# CHECK-NEXT: [1] - SMX60_IEU:2 SMX60_IEUA, SMX60_IEUB170# CHECK-NEXT: [2] - SMX60_IEUA:1171# CHECK-NEXT: [3] - SMX60_IEUB:1172# CHECK-NEXT: [4] - SMX60_LS:2173# CHECK-NEXT: [5] - SMX60_VFP:1174# CHECK-NEXT: [6] - SMX60_VIEU:1175# CHECK-NEXT: [7] - SMX60_VLS:1176 177# CHECK: Instruction Info:178# CHECK-NEXT: [1]: #uOps179# CHECK-NEXT: [2]: Latency180# CHECK-NEXT: [3]: RThroughput181# CHECK-NEXT: [4]: MayLoad182# CHECK-NEXT: [5]: MayStore183# CHECK-NEXT: [6]: HasSideEffects (U)184# CHECK-NEXT: [7]: Bypass Latency185# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])186# CHECK-NEXT: [9]: LLVM Opcode Name187 188# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:189# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU C_ADDI addi a0, a0, 1190# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU C_ADDIW addiw a0, a0, 1191# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU SLTI slti a0, a0, 1192# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU SLTIU seqz a0, a0193# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU C_ANDI andi a0, a0, 1194# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU ORI ori a0, a0, 1195# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU XORI xori a0, a0, 1196# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU C_SLLI slli a0, a0, 1197# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU C_SRLI srli a0, a0, 1198# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU C_SRAI srai a0, a0, 1199# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU SLLIW slliw a0, a0, 1200# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU SRLIW srliw a0, a0, 1201# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU SRAIW sraiw a0, a0, 1202# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU C_LUI lui a0, 1203# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU AUIPC auipc a1, 1204# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU C_ADD add a0, a0, a1205# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU C_ADDW addw a0, a0, a0206# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU SLT slt a0, a0, a0207# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU SLTU sltu a0, a0, a0208# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU C_AND and a0, a0, a0209# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU C_OR or a0, a0, a0210# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU C_XOR xor a0, a0, a0211# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU SLL sll a0, a0, a0212# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU SRL srl a0, a0, a0213# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU SRA sra a0, a0, a0214# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU SLLW sllw a0, a0, a0215# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU SRLW srlw a0, a0, a0216# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU SRAW sraw a0, a0, a0217# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU C_SUB sub a0, a0, a0218# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU C_SUBW subw a0, a0, a0219# CHECK-NEXT: 1 1 1.00 1 SMX60_IEU,SMX60_IEUA JAL jal a0, .Ltmp0220# CHECK-NEXT: 1 1 1.00 1 SMX60_IEU,SMX60_IEUA C_JALR jalr a0221# CHECK-NEXT: 1 1 1.00 1 SMX60_IEU,SMX60_IEUA BEQ beq a0, a0, .Ltmp1222# CHECK-NEXT: 1 1 1.00 1 SMX60_IEU,SMX60_IEUA BNE bne a0, a0, .Ltmp2223# CHECK-NEXT: 1 1 1.00 1 SMX60_IEU,SMX60_IEUA BLT blt a0, a0, .Ltmp3224# CHECK-NEXT: 1 1 1.00 1 SMX60_IEU,SMX60_IEUA BLTU bltu a0, a0, .Ltmp4225# CHECK-NEXT: 1 1 1.00 1 SMX60_IEU,SMX60_IEUA BGE bge a0, a0, .Ltmp5226# CHECK-NEXT: 1 1 1.00 1 SMX60_IEU,SMX60_IEUA BGEU bgeu a0, a0, .Ltmp6227# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU C_ADD add a0, a0, a0228# CHECK-NEXT: 1 4 0.50 * 4 SMX60_LS LB lb t0, 0(a0)229# CHECK-NEXT: 1 4 0.50 * 4 SMX60_LS LBU lbu t0, 0(a0)230# CHECK-NEXT: 1 4 0.50 * 4 SMX60_LS LH lh t0, 0(a0)231# CHECK-NEXT: 1 4 0.50 * 4 SMX60_LS LHU lhu t0, 0(a0)232# CHECK-NEXT: 1 4 0.50 * 4 SMX60_LS LW lw t0, 0(a0)233# CHECK-NEXT: 1 4 0.50 * 4 SMX60_LS LWU lwu t0, 0(a0)234# CHECK-NEXT: 1 4 0.50 * 4 SMX60_LS LD ld t0, 0(a0)235# CHECK-NEXT: 1 4 0.50 * 4 SMX60_LS SB sb t0, 0(a0)236# CHECK-NEXT: 1 4 0.50 * 4 SMX60_LS SH sh t0, 0(a0)237# CHECK-NEXT: 1 4 0.50 * 4 SMX60_LS SW sw t0, 0(a0)238# CHECK-NEXT: 1 4 0.50 * 4 SMX60_LS SD sd t0, 0(a0)239# CHECK-NEXT: 1 6 0.50 6 SMX60_IEU MUL mul a0, a0, a0240# CHECK-NEXT: 1 6 0.50 6 SMX60_IEU MULH mulh a0, a0, a0241# CHECK-NEXT: 1 6 0.50 6 SMX60_IEU MULHU mulhu a0, a0, a0242# CHECK-NEXT: 1 6 0.50 6 SMX60_IEU MULHSU mulhsu a0, a0, a0243# CHECK-NEXT: 1 3 0.50 3 SMX60_IEU MULW mulw a0, a0, a0244# CHECK-NEXT: 1 20 20.00 20 SMX60_IEU[20],SMX60_IEUA[20] DIV div a0, a1, a2245# CHECK-NEXT: 1 20 20.00 20 SMX60_IEU[20],SMX60_IEUA[20] DIVU divu a0, a1, a2246# CHECK-NEXT: 1 20 20.00 20 SMX60_IEU[20],SMX60_IEUA[20] REM rem a0, a1, a2247# CHECK-NEXT: 1 20 20.00 20 SMX60_IEU[20],SMX60_IEUA[20] REMU remu a0, a1, a2248# CHECK-NEXT: 1 12 12.00 12 SMX60_IEU[12],SMX60_IEUA[12] DIVW divw a0, a1, a2249# CHECK-NEXT: 1 12 12.00 12 SMX60_IEU[12],SMX60_IEUA[12] DIVUW divuw a0, a1, a2250# CHECK-NEXT: 1 12 12.00 12 SMX60_IEU[12],SMX60_IEUA[12] REMW remw a0, a1, a2251# CHECK-NEXT: 1 12 12.00 12 SMX60_IEU[12],SMX60_IEUA[12] REMUW remuw a0, a1, a2252# CHECK-NEXT: 1 1 0.50 U 1 SMX60_IEU CSRRW csrrw t0, 4095, t1253# CHECK-NEXT: 1 1 0.50 U 1 SMX60_IEU CSRRS csrrs s3, fflags, s5254# CHECK-NEXT: 1 1 0.50 U 1 SMX60_IEU CSRRC csrrc sp, 0, ra255# CHECK-NEXT: 1 1 0.50 U 1 SMX60_IEU CSRRWI csrrwi a5, 0, 0256# CHECK-NEXT: 1 1 0.50 U 1 SMX60_IEU CSRRSI csrrsi t2, 4095, 31257# CHECK-NEXT: 1 1 0.50 U 1 SMX60_IEU CSRRCI csrrci t1, sscratch, 5258# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU CZERO_EQZ czero.eqz a0, a1, a2259# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU CZERO_NEZ czero.nez a0, a1, a2260# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU CZERO_EQZ czero.eqz a0, a1, a2261# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU CZERO_NEZ czero.nez a0, a1, a2262# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU ADD_UW add.uw a0, a0, a0263# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU SLLI_UW slli.uw a0, a0, 1264# CHECK-NEXT: 1 2 0.50 2 SMX60_IEU SH1ADD_UW sh1add.uw a0, a0, a0265# CHECK-NEXT: 1 2 0.50 2 SMX60_IEU SH2ADD_UW sh2add.uw a0, a0, a0266# CHECK-NEXT: 1 2 0.50 2 SMX60_IEU SH3ADD_UW sh3add.uw a0, a0, a0267# CHECK-NEXT: 1 2 0.50 2 SMX60_IEU SH1ADD sh1add a0, a0, a0268# CHECK-NEXT: 1 2 0.50 2 SMX60_IEU SH2ADD sh2add a0, a0, a0269# CHECK-NEXT: 1 2 0.50 2 SMX60_IEU SH3ADD sh3add a0, a0, a0270# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU ANDN andn a0, a0, a0271# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU ORN orn a0, a0, a0272# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU XNOR xnor a0, a0, a0273# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU CLZ clz a0, a0274# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU CLZW clzw a0, a0275# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU CTZ ctz a0, a0276# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU CTZW ctzw a0, a0277# CHECK-NEXT: 1 2 0.50 2 SMX60_IEU CPOP cpop a0, a0278# CHECK-NEXT: 1 2 0.50 2 SMX60_IEU CPOPW cpopw a0, a0279# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU MIN min a0, a0, a0280# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU MINU minu a0, a0, a0281# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU MAX max a0, a0, a0282# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU MAXU maxu a0, a0, a0283# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU SEXT_B sext.b a0, a0284# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU SEXT_H sext.h a0, a0285# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU ZEXT_H_RV64 zext.h a0, a0286# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU ROL rol a0, a0, a0287# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU ROLW rolw a0, a0, a0288# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU ROR ror a0, a0, a0289# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU RORW rorw a0, a0, a0290# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU RORI rori a0, a0, 1291# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU RORIW roriw a0, a0, 1292# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU ORC_B orc.b a0, a0293# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU REV8_RV64 rev8 a0, a0294# CHECK-NEXT: 1 2 0.50 2 SMX60_IEU CLMUL clmul a0, a0, a0295# CHECK-NEXT: 1 2 0.50 2 SMX60_IEU CLMULR clmulr a0, a0, a0296# CHECK-NEXT: 1 2 0.50 2 SMX60_IEU CLMULH clmulh a0, a0, a0297# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU BCLR bclr a0, a1, a2298# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU BCLRI bclri a0, a1, 1299# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU BEXT bext a0, a1, a2300# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU BEXTI bexti a0, a1, 1301# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU BINV binv a0, a1, a2302# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU BINVI binvi a0, a1, 1303# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU BSET bset a0, a1, a2304# CHECK-NEXT: 1 1 0.50 1 SMX60_IEU BSETI bseti a0, a1, 1305 306# CHECK: Resources:307# CHECK-NEXT: [0] - SMX60_FP308# CHECK-NEXT: [1] - SMX60_IEUA309# CHECK-NEXT: [2] - SMX60_IEUB310# CHECK-NEXT: [3.0] - SMX60_LS311# CHECK-NEXT: [3.1] - SMX60_LS312# CHECK-NEXT: [4] - SMX60_VFP313# CHECK-NEXT: [5] - SMX60_VIEU314# CHECK-NEXT: [6] - SMX60_VLS315 316# CHECK: Resource pressure per iteration:317# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]318# CHECK-NEXT: - 180.50 44.50 5.50 5.50 - - -319 320# CHECK: Resource pressure by instruction:321# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:322# CHECK-NEXT: - 0.50 0.50 - - - - - addi a0, a0, 1323# CHECK-NEXT: - 0.50 0.50 - - - - - addiw a0, a0, 1324# CHECK-NEXT: - 0.50 0.50 - - - - - slti a0, a0, 1325# CHECK-NEXT: - 0.50 0.50 - - - - - seqz a0, a0326# CHECK-NEXT: - 0.50 0.50 - - - - - andi a0, a0, 1327# CHECK-NEXT: - 0.50 0.50 - - - - - ori a0, a0, 1328# CHECK-NEXT: - 0.50 0.50 - - - - - xori a0, a0, 1329# CHECK-NEXT: - 0.50 0.50 - - - - - slli a0, a0, 1330# CHECK-NEXT: - 0.50 0.50 - - - - - srli a0, a0, 1331# CHECK-NEXT: - 0.50 0.50 - - - - - srai a0, a0, 1332# CHECK-NEXT: - 0.50 0.50 - - - - - slliw a0, a0, 1333# CHECK-NEXT: - 0.50 0.50 - - - - - srliw a0, a0, 1334# CHECK-NEXT: - 0.50 0.50 - - - - - sraiw a0, a0, 1335# CHECK-NEXT: - 0.50 0.50 - - - - - lui a0, 1336# CHECK-NEXT: - 0.50 0.50 - - - - - auipc a1, 1337# CHECK-NEXT: - 0.50 0.50 - - - - - add a0, a0, a1338# CHECK-NEXT: - 0.50 0.50 - - - - - addw a0, a0, a0339# CHECK-NEXT: - 0.50 0.50 - - - - - slt a0, a0, a0340# CHECK-NEXT: - 0.50 0.50 - - - - - sltu a0, a0, a0341# CHECK-NEXT: - 0.50 0.50 - - - - - and a0, a0, a0342# CHECK-NEXT: - 0.50 0.50 - - - - - or a0, a0, a0343# CHECK-NEXT: - 0.50 0.50 - - - - - xor a0, a0, a0344# CHECK-NEXT: - 0.50 0.50 - - - - - sll a0, a0, a0345# CHECK-NEXT: - 0.50 0.50 - - - - - srl a0, a0, a0346# CHECK-NEXT: - 0.50 0.50 - - - - - sra a0, a0, a0347# CHECK-NEXT: - 0.50 0.50 - - - - - sllw a0, a0, a0348# CHECK-NEXT: - 0.50 0.50 - - - - - srlw a0, a0, a0349# CHECK-NEXT: - 0.50 0.50 - - - - - sraw a0, a0, a0350# CHECK-NEXT: - 0.50 0.50 - - - - - sub a0, a0, a0351# CHECK-NEXT: - 0.50 0.50 - - - - - subw a0, a0, a0352# CHECK-NEXT: - 1.00 - - - - - - jal a0, .Ltmp0353# CHECK-NEXT: - 1.00 - - - - - - jalr a0354# CHECK-NEXT: - 1.00 - - - - - - beq a0, a0, .Ltmp1355# CHECK-NEXT: - 1.00 - - - - - - bne a0, a0, .Ltmp2356# CHECK-NEXT: - 1.00 - - - - - - blt a0, a0, .Ltmp3357# CHECK-NEXT: - 1.00 - - - - - - bltu a0, a0, .Ltmp4358# CHECK-NEXT: - 1.00 - - - - - - bge a0, a0, .Ltmp5359# CHECK-NEXT: - 1.00 - - - - - - bgeu a0, a0, .Ltmp6360# CHECK-NEXT: - 0.50 0.50 - - - - - add a0, a0, a0361# CHECK-NEXT: - - - 0.50 0.50 - - - lb t0, 0(a0)362# CHECK-NEXT: - - - 0.50 0.50 - - - lbu t0, 0(a0)363# CHECK-NEXT: - - - 0.50 0.50 - - - lh t0, 0(a0)364# CHECK-NEXT: - - - 0.50 0.50 - - - lhu t0, 0(a0)365# CHECK-NEXT: - - - 0.50 0.50 - - - lw t0, 0(a0)366# CHECK-NEXT: - - - 0.50 0.50 - - - lwu t0, 0(a0)367# CHECK-NEXT: - - - 0.50 0.50 - - - ld t0, 0(a0)368# CHECK-NEXT: - - - 0.50 0.50 - - - sb t0, 0(a0)369# CHECK-NEXT: - - - 0.50 0.50 - - - sh t0, 0(a0)370# CHECK-NEXT: - - - 0.50 0.50 - - - sw t0, 0(a0)371# CHECK-NEXT: - - - 0.50 0.50 - - - sd t0, 0(a0)372# CHECK-NEXT: - 0.50 0.50 - - - - - mul a0, a0, a0373# CHECK-NEXT: - 0.50 0.50 - - - - - mulh a0, a0, a0374# CHECK-NEXT: - 0.50 0.50 - - - - - mulhu a0, a0, a0375# CHECK-NEXT: - 0.50 0.50 - - - - - mulhsu a0, a0, a0376# CHECK-NEXT: - 0.50 0.50 - - - - - mulw a0, a0, a0377# CHECK-NEXT: - 20.00 - - - - - - div a0, a1, a2378# CHECK-NEXT: - 20.00 - - - - - - divu a0, a1, a2379# CHECK-NEXT: - 20.00 - - - - - - rem a0, a1, a2380# CHECK-NEXT: - 20.00 - - - - - - remu a0, a1, a2381# CHECK-NEXT: - 12.00 - - - - - - divw a0, a1, a2382# CHECK-NEXT: - 12.00 - - - - - - divuw a0, a1, a2383# CHECK-NEXT: - 12.00 - - - - - - remw a0, a1, a2384# CHECK-NEXT: - 12.00 - - - - - - remuw a0, a1, a2385# CHECK-NEXT: - 0.50 0.50 - - - - - csrrw t0, 4095, t1386# CHECK-NEXT: - 0.50 0.50 - - - - - csrrs s3, fflags, s5387# CHECK-NEXT: - 0.50 0.50 - - - - - csrrc sp, 0, ra388# CHECK-NEXT: - 0.50 0.50 - - - - - csrrwi a5, 0, 0389# CHECK-NEXT: - 0.50 0.50 - - - - - csrrsi t2, 4095, 31390# CHECK-NEXT: - 0.50 0.50 - - - - - csrrci t1, sscratch, 5391# CHECK-NEXT: - 0.50 0.50 - - - - - czero.eqz a0, a1, a2392# CHECK-NEXT: - 0.50 0.50 - - - - - czero.nez a0, a1, a2393# CHECK-NEXT: - 0.50 0.50 - - - - - czero.eqz a0, a1, a2394# CHECK-NEXT: - 0.50 0.50 - - - - - czero.nez a0, a1, a2395# CHECK-NEXT: - 0.50 0.50 - - - - - add.uw a0, a0, a0396# CHECK-NEXT: - 0.50 0.50 - - - - - slli.uw a0, a0, 1397# CHECK-NEXT: - 0.50 0.50 - - - - - sh1add.uw a0, a0, a0398# CHECK-NEXT: - 0.50 0.50 - - - - - sh2add.uw a0, a0, a0399# CHECK-NEXT: - 0.50 0.50 - - - - - sh3add.uw a0, a0, a0400# CHECK-NEXT: - 0.50 0.50 - - - - - sh1add a0, a0, a0401# CHECK-NEXT: - 0.50 0.50 - - - - - sh2add a0, a0, a0402# CHECK-NEXT: - 0.50 0.50 - - - - - sh3add a0, a0, a0403# CHECK-NEXT: - 0.50 0.50 - - - - - andn a0, a0, a0404# CHECK-NEXT: - 0.50 0.50 - - - - - orn a0, a0, a0405# CHECK-NEXT: - 0.50 0.50 - - - - - xnor a0, a0, a0406# CHECK-NEXT: - 0.50 0.50 - - - - - clz a0, a0407# CHECK-NEXT: - 0.50 0.50 - - - - - clzw a0, a0408# CHECK-NEXT: - 0.50 0.50 - - - - - ctz a0, a0409# CHECK-NEXT: - 0.50 0.50 - - - - - ctzw a0, a0410# CHECK-NEXT: - 0.50 0.50 - - - - - cpop a0, a0411# CHECK-NEXT: - 0.50 0.50 - - - - - cpopw a0, a0412# CHECK-NEXT: - 0.50 0.50 - - - - - min a0, a0, a0413# CHECK-NEXT: - 0.50 0.50 - - - - - minu a0, a0, a0414# CHECK-NEXT: - 0.50 0.50 - - - - - max a0, a0, a0415# CHECK-NEXT: - 0.50 0.50 - - - - - maxu a0, a0, a0416# CHECK-NEXT: - 0.50 0.50 - - - - - sext.b a0, a0417# CHECK-NEXT: - 0.50 0.50 - - - - - sext.h a0, a0418# CHECK-NEXT: - 0.50 0.50 - - - - - zext.h a0, a0419# CHECK-NEXT: - 0.50 0.50 - - - - - rol a0, a0, a0420# CHECK-NEXT: - 0.50 0.50 - - - - - rolw a0, a0, a0421# CHECK-NEXT: - 0.50 0.50 - - - - - ror a0, a0, a0422# CHECK-NEXT: - 0.50 0.50 - - - - - rorw a0, a0, a0423# CHECK-NEXT: - 0.50 0.50 - - - - - rori a0, a0, 1424# CHECK-NEXT: - 0.50 0.50 - - - - - roriw a0, a0, 1425# CHECK-NEXT: - 0.50 0.50 - - - - - orc.b a0, a0426# CHECK-NEXT: - 0.50 0.50 - - - - - rev8 a0, a0427# CHECK-NEXT: - 0.50 0.50 - - - - - clmul a0, a0, a0428# CHECK-NEXT: - 0.50 0.50 - - - - - clmulr a0, a0, a0429# CHECK-NEXT: - 0.50 0.50 - - - - - clmulh a0, a0, a0430# CHECK-NEXT: - 0.50 0.50 - - - - - bclr a0, a1, a2431# CHECK-NEXT: - 0.50 0.50 - - - - - bclri a0, a1, 1432# CHECK-NEXT: - 0.50 0.50 - - - - - bext a0, a1, a2433# CHECK-NEXT: - 0.50 0.50 - - - - - bexti a0, a1, 1434# CHECK-NEXT: - 0.50 0.50 - - - - - binv a0, a1, a2435# CHECK-NEXT: - 0.50 0.50 - - - - - binvi a0, a1, 1436# CHECK-NEXT: - 0.50 0.50 - - - - - bset a0, a1, a2437# CHECK-NEXT: - 0.50 0.50 - - - - - bseti a0, a1, 1438