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1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py2# RUN: llvm-mca -mtriple=riscv64 -mcpu=spacemit-x60 -iterations=1 -instruction-tables=full < %s | FileCheck %s3 4# Reduction operations5 6vsetvli x28, x0, e8, mf2, tu, mu7vredand.vs v8, v8, v88vsetvli x28, x0, e8, mf4, tu, mu9vredand.vs v8, v8, v810vsetvli x28, x0, e8, mf8, tu, mu11vredand.vs v8, v8, v812vsetvli x28, x0, e8, m1, tu, mu13vredand.vs v8, v8, v814vsetvli x28, x0, e8, m2, tu, mu15vredand.vs v8, v8, v816vsetvli x28, x0, e8, m4, tu, mu17vredand.vs v8, v8, v818vsetvli x28, x0, e8, m8, tu, mu19vredand.vs v8, v8, v820vsetvli x28, x0, e16, mf2, tu, mu21vredand.vs v8, v8, v822vsetvli x28, x0, e16, mf4, tu, mu23vredand.vs v8, v8, v824vsetvli x28, x0, e16, m1, tu, mu25vredand.vs v8, v8, v826vsetvli x28, x0, e16, m2, tu, mu27vredand.vs v8, v8, v828vsetvli x28, x0, e16, m4, tu, mu29vredand.vs v8, v8, v830vsetvli x28, x0, e16, m8, tu, mu31vredand.vs v8, v8, v832vsetvli x28, x0, e32, mf2, tu, mu33vredand.vs v8, v8, v834vsetvli x28, x0, e32, m1, tu, mu35vredand.vs v8, v8, v836vsetvli x28, x0, e32, m2, tu, mu37vredand.vs v8, v8, v838vsetvli x28, x0, e32, m4, tu, mu39vredand.vs v8, v8, v840vsetvli x28, x0, e32, m8, tu, mu41vredand.vs v8, v8, v842vsetvli x28, x0, e64, m1, tu, mu43vredand.vs v8, v8, v844vsetvli x28, x0, e64, m2, tu, mu45vredand.vs v8, v8, v846vsetvli x28, x0, e64, m4, tu, mu47vredand.vs v8, v8, v848vsetvli x28, x0, e64, m8, tu, mu49vredand.vs v8, v8, v850 51vsetvli x28, x0, e8, mf2, tu, mu52vredmaxu.vs v8, v8, v853vsetvli x28, x0, e8, mf4, tu, mu54vredmaxu.vs v8, v8, v855vsetvli x28, x0, e8, mf8, tu, mu56vredmaxu.vs v8, v8, v857vsetvli x28, x0, e8, m1, tu, mu58vredmaxu.vs v8, v8, v859vsetvli x28, x0, e8, m2, tu, mu60vredmaxu.vs v8, v8, v861vsetvli x28, x0, e8, m4, tu, mu62vredmaxu.vs v8, v8, v863vsetvli x28, x0, e8, m8, tu, mu64vredmaxu.vs v8, v8, v865vsetvli x28, x0, e16, mf2, tu, mu66vredmaxu.vs v8, v8, v867vsetvli x28, x0, e16, mf4, tu, mu68vredmaxu.vs v8, v8, v869vsetvli x28, x0, e16, m1, tu, mu70vredmaxu.vs v8, v8, v871vsetvli x28, x0, e16, m2, tu, mu72vredmaxu.vs v8, v8, v873vsetvli x28, x0, e16, m4, tu, mu74vredmaxu.vs v8, v8, v875vsetvli x28, x0, e16, m8, tu, mu76vredmaxu.vs v8, v8, v877vsetvli x28, x0, e32, mf2, tu, mu78vredmaxu.vs v8, v8, v879vsetvli x28, x0, e32, m1, tu, mu80vredmaxu.vs v8, v8, v881vsetvli x28, x0, e32, m2, tu, mu82vredmaxu.vs v8, v8, v883vsetvli x28, x0, e32, m4, tu, mu84vredmaxu.vs v8, v8, v885vsetvli x28, x0, e32, m8, tu, mu86vredmaxu.vs v8, v8, v887vsetvli x28, x0, e64, m1, tu, mu88vredmaxu.vs v8, v8, v889vsetvli x28, x0, e64, m2, tu, mu90vredmaxu.vs v8, v8, v891vsetvli x28, x0, e64, m4, tu, mu92vredmaxu.vs v8, v8, v893vsetvli x28, x0, e64, m8, tu, mu94vredmaxu.vs v8, v8, v895 96vsetvli x28, x0, e8, mf2, tu, mu97vredmax.vs v8, v8, v898vsetvli x28, x0, e8, mf4, tu, mu99vredmax.vs v8, v8, v8100vsetvli x28, x0, e8, mf8, tu, mu101vredmax.vs v8, v8, v8102vsetvli x28, x0, e8, m1, tu, mu103vredmax.vs v8, v8, v8104vsetvli x28, x0, e8, m2, tu, mu105vredmax.vs v8, v8, v8106vsetvli x28, x0, e8, m4, tu, mu107vredmax.vs v8, v8, v8108vsetvli x28, x0, e8, m8, tu, mu109vredmax.vs v8, v8, v8110vsetvli x28, x0, e16, mf2, tu, mu111vredmax.vs v8, v8, v8112vsetvli x28, x0, e16, mf4, tu, mu113vredmax.vs v8, v8, v8114vsetvli x28, x0, e16, m1, tu, mu115vredmax.vs v8, v8, v8116vsetvli x28, x0, e16, m2, tu, mu117vredmax.vs v8, v8, v8118vsetvli x28, x0, e16, m4, tu, mu119vredmax.vs v8, v8, v8120vsetvli x28, x0, e16, m8, tu, mu121vredmax.vs v8, v8, v8122vsetvli x28, x0, e32, mf2, tu, mu123vredmax.vs v8, v8, v8124vsetvli x28, x0, e32, m1, tu, mu125vredmax.vs v8, v8, v8126vsetvli x28, x0, e32, m2, tu, mu127vredmax.vs v8, v8, v8128vsetvli x28, x0, e32, m4, tu, mu129vredmax.vs v8, v8, v8130vsetvli x28, x0, e32, m8, tu, mu131vredmax.vs v8, v8, v8132vsetvli x28, x0, e64, m1, tu, mu133vredmax.vs v8, v8, v8134vsetvli x28, x0, e64, m2, tu, mu135vredmax.vs v8, v8, v8136vsetvli x28, x0, e64, m4, tu, mu137vredmax.vs v8, v8, v8138vsetvli x28, x0, e64, m8, tu, mu139vredmax.vs v8, v8, v8140 141vsetvli x28, x0, e8, mf2, tu, mu142vredminu.vs v8, v8, v8143vsetvli x28, x0, e8, mf4, tu, mu144vredminu.vs v8, v8, v8145vsetvli x28, x0, e8, mf8, tu, mu146vredminu.vs v8, v8, v8147vsetvli x28, x0, e8, m1, tu, mu148vredminu.vs v8, v8, v8149vsetvli x28, x0, e8, m2, tu, mu150vredminu.vs v8, v8, v8151vsetvli x28, x0, e8, m4, tu, mu152vredminu.vs v8, v8, v8153vsetvli x28, x0, e8, m8, tu, mu154vredminu.vs v8, v8, v8155vsetvli x28, x0, e16, mf2, tu, mu156vredminu.vs v8, v8, v8157vsetvli x28, x0, e16, mf4, tu, mu158vredminu.vs v8, v8, v8159vsetvli x28, x0, e16, m1, tu, mu160vredminu.vs v8, v8, v8161vsetvli x28, x0, e16, m2, tu, mu162vredminu.vs v8, v8, v8163vsetvli x28, x0, e16, m4, tu, mu164vredminu.vs v8, v8, v8165vsetvli x28, x0, e16, m8, tu, mu166vredminu.vs v8, v8, v8167vsetvli x28, x0, e32, mf2, tu, mu168vredminu.vs v8, v8, v8169vsetvli x28, x0, e32, m1, tu, mu170vredminu.vs v8, v8, v8171vsetvli x28, x0, e32, m2, tu, mu172vredminu.vs v8, v8, v8173vsetvli x28, x0, e32, m4, tu, mu174vredminu.vs v8, v8, v8175vsetvli x28, x0, e32, m8, tu, mu176vredminu.vs v8, v8, v8177vsetvli x28, x0, e64, m1, tu, mu178vredminu.vs v8, v8, v8179vsetvli x28, x0, e64, m2, tu, mu180vredminu.vs v8, v8, v8181vsetvli x28, x0, e64, m4, tu, mu182vredminu.vs v8, v8, v8183vsetvli x28, x0, e64, m8, tu, mu184vredminu.vs v8, v8, v8185 186vsetvli x28, x0, e8, mf2, tu, mu187vredmin.vs v8, v8, v8188vsetvli x28, x0, e8, mf4, tu, mu189vredmin.vs v8, v8, v8190vsetvli x28, x0, e8, mf8, tu, mu191vredmin.vs v8, v8, v8192vsetvli x28, x0, e8, m1, tu, mu193vredmin.vs v8, v8, v8194vsetvli x28, x0, e8, m2, tu, mu195vredmin.vs v8, v8, v8196vsetvli x28, x0, e8, m4, tu, mu197vredmin.vs v8, v8, v8198vsetvli x28, x0, e8, m8, tu, mu199vredmin.vs v8, v8, v8200vsetvli x28, x0, e16, mf2, tu, mu201vredmin.vs v8, v8, v8202vsetvli x28, x0, e16, mf4, tu, mu203vredmin.vs v8, v8, v8204vsetvli x28, x0, e16, m1, tu, mu205vredmin.vs v8, v8, v8206vsetvli x28, x0, e16, m2, tu, mu207vredmin.vs v8, v8, v8208vsetvli x28, x0, e16, m4, tu, mu209vredmin.vs v8, v8, v8210vsetvli x28, x0, e16, m8, tu, mu211vredmin.vs v8, v8, v8212vsetvli x28, x0, e32, mf2, tu, mu213vredmin.vs v8, v8, v8214vsetvli x28, x0, e32, m1, tu, mu215vredmin.vs v8, v8, v8216vsetvli x28, x0, e32, m2, tu, mu217vredmin.vs v8, v8, v8218vsetvli x28, x0, e32, m4, tu, mu219vredmin.vs v8, v8, v8220vsetvli x28, x0, e32, m8, tu, mu221vredmin.vs v8, v8, v8222vsetvli x28, x0, e64, m1, tu, mu223vredmin.vs v8, v8, v8224vsetvli x28, x0, e64, m2, tu, mu225vredmin.vs v8, v8, v8226vsetvli x28, x0, e64, m4, tu, mu227vredmin.vs v8, v8, v8228vsetvli x28, x0, e64, m8, tu, mu229vredmin.vs v8, v8, v8230 231vsetvli x28, x0, e8, mf2, tu, mu232vredor.vs v8, v8, v8233vsetvli x28, x0, e8, mf4, tu, mu234vredor.vs v8, v8, v8235vsetvli x28, x0, e8, mf8, tu, mu236vredor.vs v8, v8, v8237vsetvli x28, x0, e8, m1, tu, mu238vredor.vs v8, v8, v8239vsetvli x28, x0, e8, m2, tu, mu240vredor.vs v8, v8, v8241vsetvli x28, x0, e8, m4, tu, mu242vredor.vs v8, v8, v8243vsetvli x28, x0, e8, m8, tu, mu244vredor.vs v8, v8, v8245vsetvli x28, x0, e16, mf2, tu, mu246vredor.vs v8, v8, v8247vsetvli x28, x0, e16, mf4, tu, mu248vredor.vs v8, v8, v8249vsetvli x28, x0, e16, m1, tu, mu250vredor.vs v8, v8, v8251vsetvli x28, x0, e16, m2, tu, mu252vredor.vs v8, v8, v8253vsetvli x28, x0, e16, m4, tu, mu254vredor.vs v8, v8, v8255vsetvli x28, x0, e16, m8, tu, mu256vredor.vs v8, v8, v8257vsetvli x28, x0, e32, mf2, tu, mu258vredor.vs v8, v8, v8259vsetvli x28, x0, e32, m1, tu, mu260vredor.vs v8, v8, v8261vsetvli x28, x0, e32, m2, tu, mu262vredor.vs v8, v8, v8263vsetvli x28, x0, e32, m4, tu, mu264vredor.vs v8, v8, v8265vsetvli x28, x0, e32, m8, tu, mu266vredor.vs v8, v8, v8267vsetvli x28, x0, e64, m1, tu, mu268vredor.vs v8, v8, v8269vsetvli x28, x0, e64, m2, tu, mu270vredor.vs v8, v8, v8271vsetvli x28, x0, e64, m4, tu, mu272vredor.vs v8, v8, v8273vsetvli x28, x0, e64, m8, tu, mu274vredor.vs v8, v8, v8275 276vsetvli x28, x0, e8, mf2, tu, mu277vredsum.vs v8, v8, v8278vsetvli x28, x0, e8, mf4, tu, mu279vredsum.vs v8, v8, v8280vsetvli x28, x0, e8, mf8, tu, mu281vredsum.vs v8, v8, v8282vsetvli x28, x0, e8, m1, tu, mu283vredsum.vs v8, v8, v8284vsetvli x28, x0, e8, m2, tu, mu285vredsum.vs v8, v8, v8286vsetvli x28, x0, e8, m4, tu, mu287vredsum.vs v8, v8, v8288vsetvli x28, x0, e8, m8, tu, mu289vredsum.vs v8, v8, v8290vsetvli x28, x0, e16, mf2, tu, mu291vredsum.vs v8, v8, v8292vsetvli x28, x0, e16, mf4, tu, mu293vredsum.vs v8, v8, v8294vsetvli x28, x0, e16, m1, tu, mu295vredsum.vs v8, v8, v8296vsetvli x28, x0, e16, m2, tu, mu297vredsum.vs v8, v8, v8298vsetvli x28, x0, e16, m4, tu, mu299vredsum.vs v8, v8, v8300vsetvli x28, x0, e16, m8, tu, mu301vredsum.vs v8, v8, v8302vsetvli x28, x0, e32, mf2, tu, mu303vredsum.vs v8, v8, v8304vsetvli x28, x0, e32, m1, tu, mu305vredsum.vs v8, v8, v8306vsetvli x28, x0, e32, m2, tu, mu307vredsum.vs v8, v8, v8308vsetvli x28, x0, e32, m4, tu, mu309vredsum.vs v8, v8, v8310vsetvli x28, x0, e32, m8, tu, mu311vredsum.vs v8, v8, v8312vsetvli x28, x0, e64, m1, tu, mu313vredsum.vs v8, v8, v8314vsetvli x28, x0, e64, m2, tu, mu315vredsum.vs v8, v8, v8316vsetvli x28, x0, e64, m4, tu, mu317vredsum.vs v8, v8, v8318vsetvli x28, x0, e64, m8, tu, mu319vredsum.vs v8, v8, v8320 321vsetvli x28, x0, e8, mf2, tu, mu322vredxor.vs v8, v8, v8323vsetvli x28, x0, e8, mf4, tu, mu324vredxor.vs v8, v8, v8325vsetvli x28, x0, e8, mf8, tu, mu326vredxor.vs v8, v8, v8327vsetvli x28, x0, e8, m1, tu, mu328vredxor.vs v8, v8, v8329vsetvli x28, x0, e8, m2, tu, mu330vredxor.vs v8, v8, v8331vsetvli x28, x0, e8, m4, tu, mu332vredxor.vs v8, v8, v8333vsetvli x28, x0, e8, m8, tu, mu334vredxor.vs v8, v8, v8335vsetvli x28, x0, e16, mf2, tu, mu336vredxor.vs v8, v8, v8337vsetvli x28, x0, e16, mf4, tu, mu338vredxor.vs v8, v8, v8339vsetvli x28, x0, e16, m1, tu, mu340vredxor.vs v8, v8, v8341vsetvli x28, x0, e16, m2, tu, mu342vredxor.vs v8, v8, v8343vsetvli x28, x0, e16, m4, tu, mu344vredxor.vs v8, v8, v8345vsetvli x28, x0, e16, m8, tu, mu346vredxor.vs v8, v8, v8347vsetvli x28, x0, e32, mf2, tu, mu348vredxor.vs v8, v8, v8349vsetvli x28, x0, e32, m1, tu, mu350vredxor.vs v8, v8, v8351vsetvli x28, x0, e32, m2, tu, mu352vredxor.vs v8, v8, v8353vsetvli x28, x0, e32, m4, tu, mu354vredxor.vs v8, v8, v8355vsetvli x28, x0, e32, m8, tu, mu356vredxor.vs v8, v8, v8357vsetvli x28, x0, e64, m1, tu, mu358vredxor.vs v8, v8, v8359vsetvli x28, x0, e64, m2, tu, mu360vredxor.vs v8, v8, v8361vsetvli x28, x0, e64, m4, tu, mu362vredxor.vs v8, v8, v8363vsetvli x28, x0, e64, m8, tu, mu364vredxor.vs v8, v8, v8365 366vsetvli x28, x0, e8, mf2, tu, mu367vwredsumu.vs v8, v16, v24368vsetvli x28, x0, e8, mf4, tu, mu369vwredsumu.vs v8, v16, v24370vsetvli x28, x0, e8, mf8, tu, mu371vwredsumu.vs v8, v16, v24372vsetvli x28, x0, e8, m1, tu, mu373vwredsumu.vs v8, v16, v24374vsetvli x28, x0, e8, m2, tu, mu375vwredsumu.vs v8, v16, v24376vsetvli x28, x0, e8, m4, tu, mu377vwredsumu.vs v8, v16, v24378vsetvli x28, x0, e8, m8, tu, mu379vwredsumu.vs v8, v16, v24380vsetvli x28, x0, e16, mf2, tu, mu381vwredsumu.vs v8, v16, v24382vsetvli x28, x0, e16, mf4, tu, mu383vwredsumu.vs v8, v16, v24384vsetvli x28, x0, e16, m1, tu, mu385vwredsumu.vs v8, v16, v24386vsetvli x28, x0, e16, m2, tu, mu387vwredsumu.vs v8, v16, v24388vsetvli x28, x0, e16, m4, tu, mu389vwredsumu.vs v8, v16, v24390vsetvli x28, x0, e16, m8, tu, mu391vwredsumu.vs v8, v16, v24392vsetvli x28, x0, e32, mf2, tu, mu393vwredsumu.vs v8, v16, v24394vsetvli x28, x0, e32, m1, tu, mu395vwredsumu.vs v8, v16, v24396vsetvli x28, x0, e32, m2, tu, mu397vwredsumu.vs v8, v16, v24398vsetvli x28, x0, e32, m4, tu, mu399vwredsumu.vs v8, v16, v24400vsetvli x28, x0, e32, m8, tu, mu401vwredsumu.vs v8, v16, v24402 403vsetvli x28, x0, e8, mf2, tu, mu404vwredsum.vs v8, v16, v24405vsetvli x28, x0, e8, mf4, tu, mu406vwredsum.vs v8, v16, v24407vsetvli x28, x0, e8, mf8, tu, mu408vwredsum.vs v8, v16, v24409vsetvli x28, x0, e8, m1, tu, mu410vwredsum.vs v8, v16, v24411vsetvli x28, x0, e8, m2, tu, mu412vwredsum.vs v8, v16, v24413vsetvli x28, x0, e8, m4, tu, mu414vwredsum.vs v8, v16, v24415vsetvli x28, x0, e8, m8, tu, mu416vwredsum.vs v8, v16, v24417vsetvli x28, x0, e16, mf2, tu, mu418vwredsum.vs v8, v16, v24419vsetvli x28, x0, e16, mf4, tu, mu420vwredsum.vs v8, v16, v24421vsetvli x28, x0, e16, m1, tu, mu422vwredsum.vs v8, v16, v24423vsetvli x28, x0, e16, m2, tu, mu424vwredsum.vs v8, v16, v24425vsetvli x28, x0, e16, m4, tu, mu426vwredsum.vs v8, v16, v24427vsetvli x28, x0, e16, m8, tu, mu428vwredsum.vs v8, v16, v24429vsetvli x28, x0, e32, mf2, tu, mu430vwredsum.vs v8, v16, v24431vsetvli x28, x0, e32, m1, tu, mu432vwredsum.vs v8, v16, v24433vsetvli x28, x0, e32, m2, tu, mu434vwredsum.vs v8, v16, v24435vsetvli x28, x0, e32, m4, tu, mu436vwredsum.vs v8, v16, v24437vsetvli x28, x0, e32, m8, tu, mu438vwredsum.vs v8, v16, v24439 440vsetvli x28, x0, e16, mf2, tu, mu441vfredmax.vs v8, v8, v8442vsetvli x28, x0, e16, mf4, tu, mu443vfredmax.vs v8, v8, v8444vsetvli x28, x0, e16, m1, tu, mu445vfredmax.vs v8, v8, v8446vsetvli x28, x0, e16, m2, tu, mu447vfredmax.vs v8, v8, v8448vsetvli x28, x0, e16, m4, tu, mu449vfredmax.vs v8, v8, v8450vsetvli x28, x0, e16, m8, tu, mu451vfredmax.vs v8, v8, v8452vsetvli x28, x0, e32, mf2, tu, mu453vfredmax.vs v8, v8, v8454vsetvli x28, x0, e32, m1, tu, mu455vfredmax.vs v8, v8, v8456vsetvli x28, x0, e32, m2, tu, mu457vfredmax.vs v8, v8, v8458vsetvli x28, x0, e32, m4, tu, mu459vfredmax.vs v8, v8, v8460vsetvli x28, x0, e32, m8, tu, mu461vfredmax.vs v8, v8, v8462vsetvli x28, x0, e64, m1, tu, mu463vfredmax.vs v8, v8, v8464vsetvli x28, x0, e64, m2, tu, mu465vfredmax.vs v8, v8, v8466vsetvli x28, x0, e64, m4, tu, mu467vfredmax.vs v8, v8, v8468vsetvli x28, x0, e64, m8, tu, mu469vfredmax.vs v8, v8, v8470 471vsetvli x28, x0, e16, mf2, tu, mu472vfredmin.vs v8, v8, v8473vsetvli x28, x0, e16, mf4, tu, mu474vfredmin.vs v8, v8, v8475vsetvli x28, x0, e16, m1, tu, mu476vfredmin.vs v8, v8, v8477vsetvli x28, x0, e16, m2, tu, mu478vfredmin.vs v8, v8, v8479vsetvli x28, x0, e16, m4, tu, mu480vfredmin.vs v8, v8, v8481vsetvli x28, x0, e16, m8, tu, mu482vfredmin.vs v8, v8, v8483vsetvli x28, x0, e32, mf2, tu, mu484vfredmin.vs v8, v8, v8485vsetvli x28, x0, e32, m1, tu, mu486vfredmin.vs v8, v8, v8487vsetvli x28, x0, e32, m2, tu, mu488vfredmin.vs v8, v8, v8489vsetvli x28, x0, e32, m4, tu, mu490vfredmin.vs v8, v8, v8491vsetvli x28, x0, e32, m8, tu, mu492vfredmin.vs v8, v8, v8493vsetvli x28, x0, e64, m1, tu, mu494vfredmin.vs v8, v8, v8495vsetvli x28, x0, e64, m2, tu, mu496vfredmin.vs v8, v8, v8497vsetvli x28, x0, e64, m4, tu, mu498vfredmin.vs v8, v8, v8499vsetvli x28, x0, e64, m8, tu, mu500vfredmin.vs v8, v8, v8501 502vsetvli x28, x0, e16, mf2, tu, mu503vfredosum.vs v8, v8, v8504vsetvli x28, x0, e16, mf4, tu, mu505vfredosum.vs v8, v8, v8506vsetvli x28, x0, e16, m1, tu, mu507vfredosum.vs v8, v8, v8508vsetvli x28, x0, e16, m2, tu, mu509vfredosum.vs v8, v8, v8510vsetvli x28, x0, e16, m4, tu, mu511vfredosum.vs v8, v8, v8512vsetvli x28, x0, e16, m8, tu, mu513vfredosum.vs v8, v8, v8514vsetvli x28, x0, e32, mf2, tu, mu515vfredosum.vs v8, v8, v8516vsetvli x28, x0, e32, m1, tu, mu517vfredosum.vs v8, v8, v8518vsetvli x28, x0, e32, m2, tu, mu519vfredosum.vs v8, v8, v8520vsetvli x28, x0, e32, m4, tu, mu521vfredosum.vs v8, v8, v8522vsetvli x28, x0, e32, m8, tu, mu523vfredosum.vs v8, v8, v8524vsetvli x28, x0, e64, m1, tu, mu525vfredosum.vs v8, v8, v8526vsetvli x28, x0, e64, m2, tu, mu527vfredosum.vs v8, v8, v8528vsetvli x28, x0, e64, m4, tu, mu529vfredosum.vs v8, v8, v8530vsetvli x28, x0, e64, m8, tu, mu531vfredosum.vs v8, v8, v8532 533vsetvli x28, x0, e16, mf2, tu, mu534vfredusum.vs v8, v8, v8535vsetvli x28, x0, e16, mf4, tu, mu536vfredusum.vs v8, v8, v8537vsetvli x28, x0, e16, m1, tu, mu538vfredusum.vs v8, v8, v8539vsetvli x28, x0, e16, m2, tu, mu540vfredusum.vs v8, v8, v8541vsetvli x28, x0, e16, m4, tu, mu542vfredusum.vs v8, v8, v8543vsetvli x28, x0, e16, m8, tu, mu544vfredusum.vs v8, v8, v8545vsetvli x28, x0, e32, mf2, tu, mu546vfredusum.vs v8, v8, v8547vsetvli x28, x0, e32, m1, tu, mu548vfredusum.vs v8, v8, v8549vsetvli x28, x0, e32, m2, tu, mu550vfredusum.vs v8, v8, v8551vsetvli x28, x0, e32, m4, tu, mu552vfredusum.vs v8, v8, v8553vsetvli x28, x0, e32, m8, tu, mu554vfredusum.vs v8, v8, v8555vsetvli x28, x0, e64, m1, tu, mu556vfredusum.vs v8, v8, v8557vsetvli x28, x0, e64, m2, tu, mu558vfredusum.vs v8, v8, v8559vsetvli x28, x0, e64, m4, tu, mu560vfredusum.vs v8, v8, v8561vsetvli x28, x0, e64, m8, tu, mu562vfredusum.vs v8, v8, v8563 564vsetvli x28, x0, e16, mf2, tu, mu565vfwredosum.vs v8, v8, v8566vsetvli x28, x0, e16, mf4, tu, mu567vfwredosum.vs v8, v8, v8568vsetvli x28, x0, e16, m1, tu, mu569vfwredosum.vs v8, v8, v8570vsetvli x28, x0, e16, m2, tu, mu571vfwredosum.vs v8, v8, v8572vsetvli x28, x0, e16, m4, tu, mu573vfwredosum.vs v8, v8, v8574vsetvli x28, x0, e16, m8, tu, mu575vfwredosum.vs v8, v8, v8576vsetvli x28, x0, e32, mf2, tu, mu577vfwredosum.vs v8, v8, v8578vsetvli x28, x0, e32, m1, tu, mu579vfwredosum.vs v8, v8, v8580vsetvli x28, x0, e32, m2, tu, mu581vfwredosum.vs v8, v8, v8582vsetvli x28, x0, e32, m4, tu, mu583vfwredosum.vs v8, v8, v8584vsetvli x28, x0, e32, m8, tu, mu585vfwredosum.vs v8, v8, v8586 587vsetvli x28, x0, e16, mf2, tu, mu588vfwredusum.vs v8, v8, v8589vsetvli x28, x0, e16, mf4, tu, mu590vfwredusum.vs v8, v8, v8591vsetvli x28, x0, e16, m1, tu, mu592vfwredusum.vs v8, v8, v8593vsetvli x28, x0, e16, m2, tu, mu594vfwredusum.vs v8, v8, v8595vsetvli x28, x0, e16, m4, tu, mu596vfwredusum.vs v8, v8, v8597vsetvli x28, x0, e16, m8, tu, mu598vfwredusum.vs v8, v8, v8599vsetvli x28, x0, e32, mf2, tu, mu600vfwredusum.vs v8, v8, v8601vsetvli x28, x0, e32, m1, tu, mu602vfwredusum.vs v8, v8, v8603vsetvli x28, x0, e32, m2, tu, mu604vfwredusum.vs v8, v8, v8605vsetvli x28, x0, e32, m4, tu, mu606vfwredusum.vs v8, v8, v8607vsetvli x28, x0, e32, m8, tu, mu608vfwredusum.vs v8, v8, v8609 610# CHECK: Resources:611# CHECK-NEXT: [0] - SMX60_FP:1612# CHECK-NEXT: [1] - SMX60_IEU:2 SMX60_IEUA, SMX60_IEUB613# CHECK-NEXT: [2] - SMX60_IEUA:1614# CHECK-NEXT: [3] - SMX60_IEUB:1615# CHECK-NEXT: [4] - SMX60_LS:2616# CHECK-NEXT: [5] - SMX60_VFP:1617# CHECK-NEXT: [6] - SMX60_VIEU:1618# CHECK-NEXT: [7] - SMX60_VLS:1619 620# CHECK: Instruction Info:621# CHECK-NEXT: [1]: #uOps622# CHECK-NEXT: [2]: Latency623# CHECK-NEXT: [3]: RThroughput624# CHECK-NEXT: [4]: MayLoad625# CHECK-NEXT: [5]: MayStore626# CHECK-NEXT: [6]: HasSideEffects (U)627# CHECK-NEXT: [7]: Bypass Latency628# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])629# CHECK-NEXT: [9]: LLVM Opcode Name630 631# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:632# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu633# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VREDAND_VS vredand.vs v8, v8, v8634# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu635# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VREDAND_VS vredand.vs v8, v8, v8636# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu637# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VREDAND_VS vredand.vs v8, v8, v8638# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu639# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDAND_VS vredand.vs v8, v8, v8640# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu641# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDAND_VS vredand.vs v8, v8, v8642# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu643# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDAND_VS vredand.vs v8, v8, v8644# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu645# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDAND_VS vredand.vs v8, v8, v8646# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu647# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VREDAND_VS vredand.vs v8, v8, v8648# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu649# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VREDAND_VS vredand.vs v8, v8, v8650# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu651# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDAND_VS vredand.vs v8, v8, v8652# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu653# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDAND_VS vredand.vs v8, v8, v8654# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu655# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDAND_VS vredand.vs v8, v8, v8656# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu657# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDAND_VS vredand.vs v8, v8, v8658# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu659# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VREDAND_VS vredand.vs v8, v8, v8660# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu661# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDAND_VS vredand.vs v8, v8, v8662# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu663# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDAND_VS vredand.vs v8, v8, v8664# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu665# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDAND_VS vredand.vs v8, v8, v8666# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu667# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDAND_VS vredand.vs v8, v8, v8668# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu669# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDAND_VS vredand.vs v8, v8, v8670# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu671# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDAND_VS vredand.vs v8, v8, v8672# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu673# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDAND_VS vredand.vs v8, v8, v8674# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu675# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDAND_VS vredand.vs v8, v8, v8676# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu677# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VREDMAXU_VS vredmaxu.vs v8, v8, v8678# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu679# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VREDMAXU_VS vredmaxu.vs v8, v8, v8680# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu681# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VREDMAXU_VS vredmaxu.vs v8, v8, v8682# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu683# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDMAXU_VS vredmaxu.vs v8, v8, v8684# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu685# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDMAXU_VS vredmaxu.vs v8, v8, v8686# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu687# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDMAXU_VS vredmaxu.vs v8, v8, v8688# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu689# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDMAXU_VS vredmaxu.vs v8, v8, v8690# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu691# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VREDMAXU_VS vredmaxu.vs v8, v8, v8692# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu693# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VREDMAXU_VS vredmaxu.vs v8, v8, v8694# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu695# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDMAXU_VS vredmaxu.vs v8, v8, v8696# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu697# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDMAXU_VS vredmaxu.vs v8, v8, v8698# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu699# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDMAXU_VS vredmaxu.vs v8, v8, v8700# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu701# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDMAXU_VS vredmaxu.vs v8, v8, v8702# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu703# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VREDMAXU_VS vredmaxu.vs v8, v8, v8704# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu705# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDMAXU_VS vredmaxu.vs v8, v8, v8706# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu707# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDMAXU_VS vredmaxu.vs v8, v8, v8708# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu709# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDMAXU_VS vredmaxu.vs v8, v8, v8710# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu711# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDMAXU_VS vredmaxu.vs v8, v8, v8712# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu713# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDMAXU_VS vredmaxu.vs v8, v8, v8714# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu715# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDMAXU_VS vredmaxu.vs v8, v8, v8716# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu717# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDMAXU_VS vredmaxu.vs v8, v8, v8718# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu719# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDMAXU_VS vredmaxu.vs v8, v8, v8720# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu721# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VREDMAX_VS vredmax.vs v8, v8, v8722# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu723# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VREDMAX_VS vredmax.vs v8, v8, v8724# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu725# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VREDMAX_VS vredmax.vs v8, v8, v8726# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu727# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDMAX_VS vredmax.vs v8, v8, v8728# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu729# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDMAX_VS vredmax.vs v8, v8, v8730# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu731# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDMAX_VS vredmax.vs v8, v8, v8732# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu733# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDMAX_VS vredmax.vs v8, v8, v8734# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu735# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VREDMAX_VS vredmax.vs v8, v8, v8736# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu737# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VREDMAX_VS vredmax.vs v8, v8, v8738# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu739# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDMAX_VS vredmax.vs v8, v8, v8740# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu741# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDMAX_VS vredmax.vs v8, v8, v8742# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu743# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDMAX_VS vredmax.vs v8, v8, v8744# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu745# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDMAX_VS vredmax.vs v8, v8, v8746# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu747# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VREDMAX_VS vredmax.vs v8, v8, v8748# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu749# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDMAX_VS vredmax.vs v8, v8, v8750# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu751# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDMAX_VS vredmax.vs v8, v8, v8752# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu753# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDMAX_VS vredmax.vs v8, v8, v8754# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu755# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDMAX_VS vredmax.vs v8, v8, v8756# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu757# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDMAX_VS vredmax.vs v8, v8, v8758# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu759# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDMAX_VS vredmax.vs v8, v8, v8760# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu761# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDMAX_VS vredmax.vs v8, v8, v8762# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu763# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDMAX_VS vredmax.vs v8, v8, v8764# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu765# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VREDMINU_VS vredminu.vs v8, v8, v8766# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu767# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VREDMINU_VS vredminu.vs v8, v8, v8768# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu769# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VREDMINU_VS vredminu.vs v8, v8, v8770# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu771# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDMINU_VS vredminu.vs v8, v8, v8772# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu773# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDMINU_VS vredminu.vs v8, v8, v8774# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu775# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDMINU_VS vredminu.vs v8, v8, v8776# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu777# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDMINU_VS vredminu.vs v8, v8, v8778# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu779# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VREDMINU_VS vredminu.vs v8, v8, v8780# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu781# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VREDMINU_VS vredminu.vs v8, v8, v8782# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu783# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDMINU_VS vredminu.vs v8, v8, v8784# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu785# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDMINU_VS vredminu.vs v8, v8, v8786# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu787# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDMINU_VS vredminu.vs v8, v8, v8788# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu789# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDMINU_VS vredminu.vs v8, v8, v8790# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu791# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VREDMINU_VS vredminu.vs v8, v8, v8792# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu793# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDMINU_VS vredminu.vs v8, v8, v8794# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu795# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDMINU_VS vredminu.vs v8, v8, v8796# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu797# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDMINU_VS vredminu.vs v8, v8, v8798# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu799# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDMINU_VS vredminu.vs v8, v8, v8800# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu801# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDMINU_VS vredminu.vs v8, v8, v8802# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu803# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDMINU_VS vredminu.vs v8, v8, v8804# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu805# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDMINU_VS vredminu.vs v8, v8, v8806# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu807# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDMINU_VS vredminu.vs v8, v8, v8808# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu809# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VREDMIN_VS vredmin.vs v8, v8, v8810# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu811# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VREDMIN_VS vredmin.vs v8, v8, v8812# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu813# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VREDMIN_VS vredmin.vs v8, v8, v8814# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu815# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDMIN_VS vredmin.vs v8, v8, v8816# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu817# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDMIN_VS vredmin.vs v8, v8, v8818# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu819# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDMIN_VS vredmin.vs v8, v8, v8820# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu821# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDMIN_VS vredmin.vs v8, v8, v8822# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu823# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VREDMIN_VS vredmin.vs v8, v8, v8824# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu825# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VREDMIN_VS vredmin.vs v8, v8, v8826# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu827# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDMIN_VS vredmin.vs v8, v8, v8828# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu829# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDMIN_VS vredmin.vs v8, v8, v8830# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu831# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDMIN_VS vredmin.vs v8, v8, v8832# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu833# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDMIN_VS vredmin.vs v8, v8, v8834# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu835# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VREDMIN_VS vredmin.vs v8, v8, v8836# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu837# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDMIN_VS vredmin.vs v8, v8, v8838# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu839# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDMIN_VS vredmin.vs v8, v8, v8840# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu841# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDMIN_VS vredmin.vs v8, v8, v8842# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu843# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDMIN_VS vredmin.vs v8, v8, v8844# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu845# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDMIN_VS vredmin.vs v8, v8, v8846# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu847# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDMIN_VS vredmin.vs v8, v8, v8848# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu849# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDMIN_VS vredmin.vs v8, v8, v8850# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu851# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDMIN_VS vredmin.vs v8, v8, v8852# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu853# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VREDOR_VS vredor.vs v8, v8, v8854# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu855# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VREDOR_VS vredor.vs v8, v8, v8856# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu857# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VREDOR_VS vredor.vs v8, v8, v8858# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu859# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDOR_VS vredor.vs v8, v8, v8860# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu861# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDOR_VS vredor.vs v8, v8, v8862# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu863# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDOR_VS vredor.vs v8, v8, v8864# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu865# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDOR_VS vredor.vs v8, v8, v8866# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu867# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VREDOR_VS vredor.vs v8, v8, v8868# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu869# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VREDOR_VS vredor.vs v8, v8, v8870# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu871# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDOR_VS vredor.vs v8, v8, v8872# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu873# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDOR_VS vredor.vs v8, v8, v8874# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu875# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDOR_VS vredor.vs v8, v8, v8876# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu877# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDOR_VS vredor.vs v8, v8, v8878# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu879# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VREDOR_VS vredor.vs v8, v8, v8880# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu881# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDOR_VS vredor.vs v8, v8, v8882# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu883# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDOR_VS vredor.vs v8, v8, v8884# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu885# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDOR_VS vredor.vs v8, v8, v8886# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu887# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDOR_VS vredor.vs v8, v8, v8888# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu889# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDOR_VS vredor.vs v8, v8, v8890# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu891# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDOR_VS vredor.vs v8, v8, v8892# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu893# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDOR_VS vredor.vs v8, v8, v8894# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu895# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDOR_VS vredor.vs v8, v8, v8896# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu897# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VREDSUM_VS vredsum.vs v8, v8, v8898# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu899# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VREDSUM_VS vredsum.vs v8, v8, v8900# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu901# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VREDSUM_VS vredsum.vs v8, v8, v8902# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu903# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDSUM_VS vredsum.vs v8, v8, v8904# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu905# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDSUM_VS vredsum.vs v8, v8, v8906# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu907# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDSUM_VS vredsum.vs v8, v8, v8908# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu909# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDSUM_VS vredsum.vs v8, v8, v8910# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu911# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VREDSUM_VS vredsum.vs v8, v8, v8912# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu913# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VREDSUM_VS vredsum.vs v8, v8, v8914# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu915# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDSUM_VS vredsum.vs v8, v8, v8916# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu917# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDSUM_VS vredsum.vs v8, v8, v8918# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu919# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDSUM_VS vredsum.vs v8, v8, v8920# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu921# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDSUM_VS vredsum.vs v8, v8, v8922# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu923# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VREDSUM_VS vredsum.vs v8, v8, v8924# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu925# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDSUM_VS vredsum.vs v8, v8, v8926# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu927# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDSUM_VS vredsum.vs v8, v8, v8928# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu929# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDSUM_VS vredsum.vs v8, v8, v8930# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu931# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDSUM_VS vredsum.vs v8, v8, v8932# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu933# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDSUM_VS vredsum.vs v8, v8, v8934# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu935# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDSUM_VS vredsum.vs v8, v8, v8936# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu937# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDSUM_VS vredsum.vs v8, v8, v8938# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu939# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDSUM_VS vredsum.vs v8, v8, v8940# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu941# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VREDXOR_VS vredxor.vs v8, v8, v8942# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu943# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VREDXOR_VS vredxor.vs v8, v8, v8944# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu945# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VREDXOR_VS vredxor.vs v8, v8, v8946# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu947# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDXOR_VS vredxor.vs v8, v8, v8948# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu949# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDXOR_VS vredxor.vs v8, v8, v8950# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu951# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDXOR_VS vredxor.vs v8, v8, v8952# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu953# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDXOR_VS vredxor.vs v8, v8, v8954# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu955# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VREDXOR_VS vredxor.vs v8, v8, v8956# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu957# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VREDXOR_VS vredxor.vs v8, v8, v8958# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu959# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDXOR_VS vredxor.vs v8, v8, v8960# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu961# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDXOR_VS vredxor.vs v8, v8, v8962# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu963# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDXOR_VS vredxor.vs v8, v8, v8964# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu965# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDXOR_VS vredxor.vs v8, v8, v8966# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu967# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VREDXOR_VS vredxor.vs v8, v8, v8968# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu969# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDXOR_VS vredxor.vs v8, v8, v8970# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu971# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDXOR_VS vredxor.vs v8, v8, v8972# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu973# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDXOR_VS vredxor.vs v8, v8, v8974# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu975# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDXOR_VS vredxor.vs v8, v8, v8976# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu977# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VREDXOR_VS vredxor.vs v8, v8, v8978# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu979# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VREDXOR_VS vredxor.vs v8, v8, v8980# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu981# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VREDXOR_VS vredxor.vs v8, v8, v8982# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu983# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VREDXOR_VS vredxor.vs v8, v8, v8984# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu985# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWREDSUMU_VS vwredsumu.vs v8, v16, v24986# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu987# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWREDSUMU_VS vwredsumu.vs v8, v16, v24988# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu989# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWREDSUMU_VS vwredsumu.vs v8, v16, v24990# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu991# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VWREDSUMU_VS vwredsumu.vs v8, v16, v24992# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu993# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VWREDSUMU_VS vwredsumu.vs v8, v16, v24994# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu995# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VWREDSUMU_VS vwredsumu.vs v8, v16, v24996# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu997# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VWREDSUMU_VS vwredsumu.vs v8, v16, v24998# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu999# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWREDSUMU_VS vwredsumu.vs v8, v16, v241000# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu1001# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWREDSUMU_VS vwredsumu.vs v8, v16, v241002# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu1003# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VWREDSUMU_VS vwredsumu.vs v8, v16, v241004# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu1005# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VWREDSUMU_VS vwredsumu.vs v8, v16, v241006# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu1007# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VWREDSUMU_VS vwredsumu.vs v8, v16, v241008# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu1009# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VWREDSUMU_VS vwredsumu.vs v8, v16, v241010# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu1011# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWREDSUMU_VS vwredsumu.vs v8, v16, v241012# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu1013# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VWREDSUMU_VS vwredsumu.vs v8, v16, v241014# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu1015# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VWREDSUMU_VS vwredsumu.vs v8, v16, v241016# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu1017# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VWREDSUMU_VS vwredsumu.vs v8, v16, v241018# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu1019# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VWREDSUMU_VS vwredsumu.vs v8, v16, v241020# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu1021# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWREDSUM_VS vwredsum.vs v8, v16, v241022# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu1023# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWREDSUM_VS vwredsum.vs v8, v16, v241024# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu1025# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWREDSUM_VS vwredsum.vs v8, v16, v241026# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu1027# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VWREDSUM_VS vwredsum.vs v8, v16, v241028# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu1029# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VWREDSUM_VS vwredsum.vs v8, v16, v241030# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu1031# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VWREDSUM_VS vwredsum.vs v8, v16, v241032# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu1033# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VWREDSUM_VS vwredsum.vs v8, v16, v241034# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu1035# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWREDSUM_VS vwredsum.vs v8, v16, v241036# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu1037# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWREDSUM_VS vwredsum.vs v8, v16, v241038# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu1039# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VWREDSUM_VS vwredsum.vs v8, v16, v241040# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu1041# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VWREDSUM_VS vwredsum.vs v8, v16, v241042# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu1043# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VWREDSUM_VS vwredsum.vs v8, v16, v241044# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu1045# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VWREDSUM_VS vwredsum.vs v8, v16, v241046# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu1047# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWREDSUM_VS vwredsum.vs v8, v16, v241048# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu1049# CHECK-NEXT: 1 7 2.00 7 SMX60_VIEU[2] VWREDSUM_VS vwredsum.vs v8, v16, v241050# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu1051# CHECK-NEXT: 1 11 4.00 11 SMX60_VIEU[4] VWREDSUM_VS vwredsum.vs v8, v16, v241052# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu1053# CHECK-NEXT: 1 19 10.00 19 SMX60_VIEU[10] VWREDSUM_VS vwredsum.vs v8, v16, v241054# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu1055# CHECK-NEXT: 1 35 35.00 35 SMX60_VIEU[35] VWREDSUM_VS vwredsum.vs v8, v16, v241056# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu1057# CHECK-NEXT: 1 12 8.00 12 SMX60_VFP[8] VFREDMAX_VS vfredmax.vs v8, v8, v81058# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu1059# CHECK-NEXT: 1 12 8.00 12 SMX60_VFP[8] VFREDMAX_VS vfredmax.vs v8, v8, v81060# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu1061# CHECK-NEXT: 1 15 8.00 15 SMX60_VFP[8] VFREDMAX_VS vfredmax.vs v8, v8, v81062# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu1063# CHECK-NEXT: 1 21 14.00 21 SMX60_VFP[14] VFREDMAX_VS vfredmax.vs v8, v8, v81064# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu1065# CHECK-NEXT: 1 33 20.00 33 SMX60_VFP[20] VFREDMAX_VS vfredmax.vs v8, v8, v81066# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu1067# CHECK-NEXT: 1 57 57.00 57 SMX60_VFP[57] VFREDMAX_VS vfredmax.vs v8, v8, v81068# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu1069# CHECK-NEXT: 1 12 8.00 12 SMX60_VFP[8] VFREDMAX_VS vfredmax.vs v8, v8, v81070# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu1071# CHECK-NEXT: 1 15 8.00 15 SMX60_VFP[8] VFREDMAX_VS vfredmax.vs v8, v8, v81072# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu1073# CHECK-NEXT: 1 21 14.00 21 SMX60_VFP[14] VFREDMAX_VS vfredmax.vs v8, v8, v81074# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu1075# CHECK-NEXT: 1 33 20.00 33 SMX60_VFP[20] VFREDMAX_VS vfredmax.vs v8, v8, v81076# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu1077# CHECK-NEXT: 1 57 57.00 57 SMX60_VFP[57] VFREDMAX_VS vfredmax.vs v8, v8, v81078# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu1079# CHECK-NEXT: 1 15 8.00 15 SMX60_VFP[8] VFREDMAX_VS vfredmax.vs v8, v8, v81080# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu1081# CHECK-NEXT: 1 21 14.00 21 SMX60_VFP[14] VFREDMAX_VS vfredmax.vs v8, v8, v81082# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu1083# CHECK-NEXT: 1 33 20.00 33 SMX60_VFP[20] VFREDMAX_VS vfredmax.vs v8, v8, v81084# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu1085# CHECK-NEXT: 1 57 57.00 57 SMX60_VFP[57] VFREDMAX_VS vfredmax.vs v8, v8, v81086# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu1087# CHECK-NEXT: 1 12 8.00 12 SMX60_VFP[8] VFREDMIN_VS vfredmin.vs v8, v8, v81088# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu1089# CHECK-NEXT: 1 12 8.00 12 SMX60_VFP[8] VFREDMIN_VS vfredmin.vs v8, v8, v81090# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu1091# CHECK-NEXT: 1 15 8.00 15 SMX60_VFP[8] VFREDMIN_VS vfredmin.vs v8, v8, v81092# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu1093# CHECK-NEXT: 1 21 14.00 21 SMX60_VFP[14] VFREDMIN_VS vfredmin.vs v8, v8, v81094# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu1095# CHECK-NEXT: 1 33 20.00 33 SMX60_VFP[20] VFREDMIN_VS vfredmin.vs v8, v8, v81096# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu1097# CHECK-NEXT: 1 57 57.00 57 SMX60_VFP[57] VFREDMIN_VS vfredmin.vs v8, v8, v81098# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu1099# CHECK-NEXT: 1 12 8.00 12 SMX60_VFP[8] VFREDMIN_VS vfredmin.vs v8, v8, v81100# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu1101# CHECK-NEXT: 1 15 8.00 15 SMX60_VFP[8] VFREDMIN_VS vfredmin.vs v8, v8, v81102# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu1103# CHECK-NEXT: 1 21 14.00 21 SMX60_VFP[14] VFREDMIN_VS vfredmin.vs v8, v8, v81104# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu1105# CHECK-NEXT: 1 33 20.00 33 SMX60_VFP[20] VFREDMIN_VS vfredmin.vs v8, v8, v81106# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu1107# CHECK-NEXT: 1 57 57.00 57 SMX60_VFP[57] VFREDMIN_VS vfredmin.vs v8, v8, v81108# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu1109# CHECK-NEXT: 1 15 8.00 15 SMX60_VFP[8] VFREDMIN_VS vfredmin.vs v8, v8, v81110# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu1111# CHECK-NEXT: 1 21 14.00 21 SMX60_VFP[14] VFREDMIN_VS vfredmin.vs v8, v8, v81112# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu1113# CHECK-NEXT: 1 33 20.00 33 SMX60_VFP[20] VFREDMIN_VS vfredmin.vs v8, v8, v81114# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu1115# CHECK-NEXT: 1 57 57.00 57 SMX60_VFP[57] VFREDMIN_VS vfredmin.vs v8, v8, v81116# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu1117# CHECK-NEXT: 1 24 20.00 24 SMX60_VFP[20] VFREDOSUM_VS vfredosum.vs v8, v8, v81118# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu1119# CHECK-NEXT: 1 12 8.00 12 SMX60_VFP[8] VFREDOSUM_VS vfredosum.vs v8, v8, v81120# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu1121# CHECK-NEXT: 1 48 24.00 48 SMX60_VFP[24] VFREDOSUM_VS vfredosum.vs v8, v8, v81122# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu1123# CHECK-NEXT: 1 96 48.00 96 SMX60_VFP[48] VFREDOSUM_VS vfredosum.vs v8, v8, v81124# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu1125# CHECK-NEXT: 1 192 96.00 192 SMX60_VFP[96] VFREDOSUM_VS vfredosum.vs v8, v8, v81126# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu1127# CHECK-NEXT: 1 384 384.00 384 SMX60_VFP[384] VFREDOSUM_VS vfredosum.vs v8, v8, v81128# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu1129# CHECK-NEXT: 1 12 8.00 12 SMX60_VFP[8] VFREDOSUM_VS vfredosum.vs v8, v8, v81130# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu1131# CHECK-NEXT: 1 24 12.00 24 SMX60_VFP[12] VFREDOSUM_VS vfredosum.vs v8, v8, v81132# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu1133# CHECK-NEXT: 1 48 24.00 48 SMX60_VFP[24] VFREDOSUM_VS vfredosum.vs v8, v8, v81134# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu1135# CHECK-NEXT: 1 96 48.00 96 SMX60_VFP[48] VFREDOSUM_VS vfredosum.vs v8, v8, v81136# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu1137# CHECK-NEXT: 1 192 192.00 192 SMX60_VFP[192] VFREDOSUM_VS vfredosum.vs v8, v8, v81138# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu1139# CHECK-NEXT: 1 12 6.00 12 SMX60_VFP[6] VFREDOSUM_VS vfredosum.vs v8, v8, v81140# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu1141# CHECK-NEXT: 1 24 12.00 24 SMX60_VFP[12] VFREDOSUM_VS vfredosum.vs v8, v8, v81142# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu1143# CHECK-NEXT: 1 48 24.00 48 SMX60_VFP[24] VFREDOSUM_VS vfredosum.vs v8, v8, v81144# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu1145# CHECK-NEXT: 1 96 96.00 96 SMX60_VFP[96] VFREDOSUM_VS vfredosum.vs v8, v8, v81146# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu1147# CHECK-NEXT: 1 12 8.00 12 SMX60_VFP[8] VFREDUSUM_VS vfredusum.vs v8, v8, v81148# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu1149# CHECK-NEXT: 1 12 8.00 12 SMX60_VFP[8] VFREDUSUM_VS vfredusum.vs v8, v8, v81150# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu1151# CHECK-NEXT: 1 15 8.00 15 SMX60_VFP[8] VFREDUSUM_VS vfredusum.vs v8, v8, v81152# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu1153# CHECK-NEXT: 1 21 14.00 21 SMX60_VFP[14] VFREDUSUM_VS vfredusum.vs v8, v8, v81154# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu1155# CHECK-NEXT: 1 33 20.00 33 SMX60_VFP[20] VFREDUSUM_VS vfredusum.vs v8, v8, v81156# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu1157# CHECK-NEXT: 1 57 57.00 57 SMX60_VFP[57] VFREDUSUM_VS vfredusum.vs v8, v8, v81158# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu1159# CHECK-NEXT: 1 12 8.00 12 SMX60_VFP[8] VFREDUSUM_VS vfredusum.vs v8, v8, v81160# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu1161# CHECK-NEXT: 1 15 8.00 15 SMX60_VFP[8] VFREDUSUM_VS vfredusum.vs v8, v8, v81162# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu1163# CHECK-NEXT: 1 21 14.00 21 SMX60_VFP[14] VFREDUSUM_VS vfredusum.vs v8, v8, v81164# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu1165# CHECK-NEXT: 1 33 20.00 33 SMX60_VFP[20] VFREDUSUM_VS vfredusum.vs v8, v8, v81166# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu1167# CHECK-NEXT: 1 57 57.00 57 SMX60_VFP[57] VFREDUSUM_VS vfredusum.vs v8, v8, v81168# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu1169# CHECK-NEXT: 1 15 8.00 15 SMX60_VFP[8] VFREDUSUM_VS vfredusum.vs v8, v8, v81170# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu1171# CHECK-NEXT: 1 21 14.00 21 SMX60_VFP[14] VFREDUSUM_VS vfredusum.vs v8, v8, v81172# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu1173# CHECK-NEXT: 1 33 20.00 33 SMX60_VFP[20] VFREDUSUM_VS vfredusum.vs v8, v8, v81174# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu1175# CHECK-NEXT: 1 57 57.00 57 SMX60_VFP[57] VFREDUSUM_VS vfredusum.vs v8, v8, v81176# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu1177# CHECK-NEXT: 1 32 27.00 32 SMX60_VFP[27] VFWREDOSUM_VS vfwredosum.vs v8, v8, v81178# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu1179# CHECK-NEXT: 1 16 11.00 16 SMX60_VFP[11] VFWREDOSUM_VS vfwredosum.vs v8, v8, v81180# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu1181# CHECK-NEXT: 1 64 32.00 64 SMX60_VFP[32] VFWREDOSUM_VS vfwredosum.vs v8, v8, v81182# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu1183# CHECK-NEXT: 1 128 64.00 128 SMX60_VFP[64] VFWREDOSUM_VS vfwredosum.vs v8, v8, v81184# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu1185# CHECK-NEXT: 1 256 128.00 256 SMX60_VFP[128] VFWREDOSUM_VS vfwredosum.vs v8, v8, v81186# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu1187# CHECK-NEXT: 1 512 512.00 512 SMX60_VFP[512] VFWREDOSUM_VS vfwredosum.vs v8, v8, v81188# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu1189# CHECK-NEXT: 1 16 11.00 16 SMX60_VFP[11] VFWREDOSUM_VS vfwredosum.vs v8, v8, v81190# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu1191# CHECK-NEXT: 1 32 16.00 32 SMX60_VFP[16] VFWREDOSUM_VS vfwredosum.vs v8, v8, v81192# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu1193# CHECK-NEXT: 1 64 32.00 64 SMX60_VFP[32] VFWREDOSUM_VS vfwredosum.vs v8, v8, v81194# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu1195# CHECK-NEXT: 1 128 64.00 128 SMX60_VFP[64] VFWREDOSUM_VS vfwredosum.vs v8, v8, v81196# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu1197# CHECK-NEXT: 1 256 256.00 256 SMX60_VFP[256] VFWREDOSUM_VS vfwredosum.vs v8, v8, v81198# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu1199# CHECK-NEXT: 1 32 27.00 32 SMX60_VFP[27] VFWREDUSUM_VS vfwredusum.vs v8, v8, v81200# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu1201# CHECK-NEXT: 1 16 11.00 16 SMX60_VFP[11] VFWREDUSUM_VS vfwredusum.vs v8, v8, v81202# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu1203# CHECK-NEXT: 1 64 32.00 64 SMX60_VFP[32] VFWREDUSUM_VS vfwredusum.vs v8, v8, v81204# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu1205# CHECK-NEXT: 1 128 64.00 128 SMX60_VFP[64] VFWREDUSUM_VS vfwredusum.vs v8, v8, v81206# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu1207# CHECK-NEXT: 1 256 128.00 256 SMX60_VFP[128] VFWREDUSUM_VS vfwredusum.vs v8, v8, v81208# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu1209# CHECK-NEXT: 1 512 512.00 512 SMX60_VFP[512] VFWREDUSUM_VS vfwredusum.vs v8, v8, v81210# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu1211# CHECK-NEXT: 1 16 11.00 16 SMX60_VFP[11] VFWREDUSUM_VS vfwredusum.vs v8, v8, v81212# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu1213# CHECK-NEXT: 1 32 16.00 32 SMX60_VFP[16] VFWREDUSUM_VS vfwredusum.vs v8, v8, v81214# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu1215# CHECK-NEXT: 1 64 32.00 64 SMX60_VFP[32] VFWREDUSUM_VS vfwredusum.vs v8, v8, v81216# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu1217# CHECK-NEXT: 1 128 64.00 128 SMX60_VFP[64] VFWREDUSUM_VS vfwredusum.vs v8, v8, v81218# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu1219# CHECK-NEXT: 1 256 256.00 256 SMX60_VFP[256] VFWREDUSUM_VS vfwredusum.vs v8, v8, v81220 1221# CHECK: Resources:1222# CHECK-NEXT: [0] - SMX60_FP1223# CHECK-NEXT: [1] - SMX60_IEUA1224# CHECK-NEXT: [2] - SMX60_IEUB1225# CHECK-NEXT: [3.0] - SMX60_LS1226# CHECK-NEXT: [3.1] - SMX60_LS1227# CHECK-NEXT: [4] - SMX60_VFP1228# CHECK-NEXT: [5] - SMX60_VIEU1229# CHECK-NEXT: [6] - SMX60_VLS1230 1231# CHECK: Resource pressure per iteration:1232# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]1233# CHECK-NEXT: - 294.00 - - - 4271.00 2028.00 -1234 1235# CHECK: Resource pressure by instruction:1236# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:1237# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu1238# CHECK-NEXT: - - - - - - 2.00 - vredand.vs v8, v8, v81239# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu1240# CHECK-NEXT: - - - - - - 1.00 - vredand.vs v8, v8, v81241# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu1242# CHECK-NEXT: - - - - - - 1.00 - vredand.vs v8, v8, v81243# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu1244# CHECK-NEXT: - - - - - - 2.00 - vredand.vs v8, v8, v81245# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu1246# CHECK-NEXT: - - - - - - 4.00 - vredand.vs v8, v8, v81247# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu1248# CHECK-NEXT: - - - - - - 10.00 - vredand.vs v8, v8, v81249# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu1250# CHECK-NEXT: - - - - - - 35.00 - vredand.vs v8, v8, v81251# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu1252# CHECK-NEXT: - - - - - - 2.00 - vredand.vs v8, v8, v81253# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu1254# CHECK-NEXT: - - - - - - 1.00 - vredand.vs v8, v8, v81255# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu1256# CHECK-NEXT: - - - - - - 2.00 - vredand.vs v8, v8, v81257# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu1258# CHECK-NEXT: - - - - - - 4.00 - vredand.vs v8, v8, v81259# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu1260# CHECK-NEXT: - - - - - - 10.00 - vredand.vs v8, v8, v81261# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu1262# CHECK-NEXT: - - - - - - 35.00 - vredand.vs v8, v8, v81263# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu1264# CHECK-NEXT: - - - - - - 2.00 - vredand.vs v8, v8, v81265# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu1266# CHECK-NEXT: - - - - - - 2.00 - vredand.vs v8, v8, v81267# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu1268# CHECK-NEXT: - - - - - - 4.00 - vredand.vs v8, v8, v81269# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu1270# CHECK-NEXT: - - - - - - 10.00 - vredand.vs v8, v8, v81271# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu1272# CHECK-NEXT: - - - - - - 35.00 - vredand.vs v8, v8, v81273# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu1274# CHECK-NEXT: - - - - - - 2.00 - vredand.vs v8, v8, v81275# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu1276# CHECK-NEXT: - - - - - - 4.00 - vredand.vs v8, v8, v81277# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu1278# CHECK-NEXT: - - - - - - 10.00 - vredand.vs v8, v8, v81279# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu1280# CHECK-NEXT: - - - - - - 35.00 - vredand.vs v8, v8, v81281# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu1282# CHECK-NEXT: - - - - - - 2.00 - vredmaxu.vs v8, v8, v81283# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu1284# CHECK-NEXT: - - - - - - 1.00 - vredmaxu.vs v8, v8, v81285# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu1286# CHECK-NEXT: - - - - - - 1.00 - vredmaxu.vs v8, v8, v81287# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu1288# CHECK-NEXT: - - - - - - 2.00 - vredmaxu.vs v8, v8, v81289# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu1290# CHECK-NEXT: - - - - - - 4.00 - vredmaxu.vs v8, v8, v81291# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu1292# CHECK-NEXT: - - - - - - 10.00 - vredmaxu.vs v8, v8, v81293# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu1294# CHECK-NEXT: - - - - - - 35.00 - vredmaxu.vs v8, v8, v81295# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu1296# CHECK-NEXT: - - - - - - 2.00 - vredmaxu.vs v8, v8, v81297# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu1298# CHECK-NEXT: - - - - - - 1.00 - vredmaxu.vs v8, v8, v81299# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu1300# CHECK-NEXT: - - - - - - 2.00 - vredmaxu.vs v8, v8, v81301# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu1302# CHECK-NEXT: - - - - - - 4.00 - vredmaxu.vs v8, v8, v81303# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu1304# CHECK-NEXT: - - - - - - 10.00 - vredmaxu.vs v8, v8, v81305# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu1306# CHECK-NEXT: - - - - - - 35.00 - vredmaxu.vs v8, v8, v81307# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu1308# CHECK-NEXT: - - - - - - 2.00 - vredmaxu.vs v8, v8, v81309# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu1310# CHECK-NEXT: - - - - - - 2.00 - vredmaxu.vs v8, v8, v81311# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu1312# CHECK-NEXT: - - - - - - 4.00 - vredmaxu.vs v8, v8, v81313# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu1314# CHECK-NEXT: - - - - - - 10.00 - vredmaxu.vs v8, v8, v81315# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu1316# CHECK-NEXT: - - - - - - 35.00 - vredmaxu.vs v8, v8, v81317# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu1318# CHECK-NEXT: - - - - - - 2.00 - vredmaxu.vs v8, v8, v81319# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu1320# CHECK-NEXT: - - - - - - 4.00 - vredmaxu.vs v8, v8, v81321# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu1322# CHECK-NEXT: - - - - - - 10.00 - vredmaxu.vs v8, v8, v81323# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu1324# CHECK-NEXT: - - - - - - 35.00 - vredmaxu.vs v8, v8, v81325# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu1326# CHECK-NEXT: - - - - - - 2.00 - vredmax.vs v8, v8, v81327# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu1328# CHECK-NEXT: - - - - - - 1.00 - vredmax.vs v8, v8, v81329# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu1330# CHECK-NEXT: - - - - - - 1.00 - vredmax.vs v8, v8, v81331# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu1332# CHECK-NEXT: - - - - - - 2.00 - vredmax.vs v8, v8, v81333# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu1334# CHECK-NEXT: - - - - - - 4.00 - vredmax.vs v8, v8, v81335# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu1336# CHECK-NEXT: - - - - - - 10.00 - vredmax.vs v8, v8, v81337# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu1338# CHECK-NEXT: - - - - - - 35.00 - vredmax.vs v8, v8, v81339# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu1340# CHECK-NEXT: - - - - - - 2.00 - vredmax.vs v8, v8, v81341# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu1342# CHECK-NEXT: - - - - - - 1.00 - vredmax.vs v8, v8, v81343# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu1344# CHECK-NEXT: - - - - - - 2.00 - vredmax.vs v8, v8, v81345# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu1346# CHECK-NEXT: - - - - - - 4.00 - vredmax.vs v8, v8, v81347# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu1348# CHECK-NEXT: - - - - - - 10.00 - vredmax.vs v8, v8, v81349# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu1350# CHECK-NEXT: - - - - - - 35.00 - vredmax.vs v8, v8, v81351# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu1352# CHECK-NEXT: - - - - - - 2.00 - vredmax.vs v8, v8, v81353# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu1354# CHECK-NEXT: - - - - - - 2.00 - vredmax.vs v8, v8, v81355# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu1356# CHECK-NEXT: - - - - - - 4.00 - vredmax.vs v8, v8, v81357# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu1358# CHECK-NEXT: - - - - - - 10.00 - vredmax.vs v8, v8, v81359# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu1360# CHECK-NEXT: - - - - - - 35.00 - vredmax.vs v8, v8, v81361# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu1362# CHECK-NEXT: - - - - - - 2.00 - vredmax.vs v8, v8, v81363# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu1364# CHECK-NEXT: - - - - - - 4.00 - vredmax.vs v8, v8, v81365# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu1366# CHECK-NEXT: - - - - - - 10.00 - vredmax.vs v8, v8, v81367# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu1368# CHECK-NEXT: - - - - - - 35.00 - vredmax.vs v8, v8, v81369# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu1370# CHECK-NEXT: - - - - - - 2.00 - vredminu.vs v8, v8, v81371# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu1372# CHECK-NEXT: - - - - - - 1.00 - vredminu.vs v8, v8, v81373# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu1374# CHECK-NEXT: - - - - - - 1.00 - vredminu.vs v8, v8, v81375# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu1376# CHECK-NEXT: - - - - - - 2.00 - vredminu.vs v8, v8, v81377# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu1378# CHECK-NEXT: - - - - - - 4.00 - vredminu.vs v8, v8, v81379# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu1380# CHECK-NEXT: - - - - - - 10.00 - vredminu.vs v8, v8, v81381# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu1382# CHECK-NEXT: - - - - - - 35.00 - vredminu.vs v8, v8, v81383# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu1384# CHECK-NEXT: - - - - - - 2.00 - vredminu.vs v8, v8, v81385# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu1386# CHECK-NEXT: - - - - - - 1.00 - vredminu.vs v8, v8, v81387# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu1388# CHECK-NEXT: - - - - - - 2.00 - vredminu.vs v8, v8, v81389# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu1390# CHECK-NEXT: - - - - - - 4.00 - vredminu.vs v8, v8, v81391# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu1392# CHECK-NEXT: - - - - - - 10.00 - vredminu.vs v8, v8, v81393# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu1394# CHECK-NEXT: - - - - - - 35.00 - vredminu.vs v8, v8, v81395# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu1396# CHECK-NEXT: - - - - - - 2.00 - vredminu.vs v8, v8, v81397# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu1398# CHECK-NEXT: - - - - - - 2.00 - vredminu.vs v8, v8, v81399# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu1400# CHECK-NEXT: - - - - - - 4.00 - vredminu.vs v8, v8, v81401# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu1402# CHECK-NEXT: - - - - - - 10.00 - vredminu.vs v8, v8, v81403# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu1404# CHECK-NEXT: - - - - - - 35.00 - vredminu.vs v8, v8, v81405# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu1406# CHECK-NEXT: - - - - - - 2.00 - vredminu.vs v8, v8, v81407# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu1408# CHECK-NEXT: - - - - - - 4.00 - vredminu.vs v8, v8, v81409# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu1410# CHECK-NEXT: - - - - - - 10.00 - vredminu.vs v8, v8, v81411# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu1412# CHECK-NEXT: - - - - - - 35.00 - vredminu.vs v8, v8, v81413# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu1414# CHECK-NEXT: - - - - - - 2.00 - vredmin.vs v8, v8, v81415# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu1416# CHECK-NEXT: - - - - - - 1.00 - vredmin.vs v8, v8, v81417# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu1418# CHECK-NEXT: - - - - - - 1.00 - vredmin.vs v8, v8, v81419# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu1420# CHECK-NEXT: - - - - - - 2.00 - vredmin.vs v8, v8, v81421# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu1422# CHECK-NEXT: - - - - - - 4.00 - vredmin.vs v8, v8, v81423# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu1424# CHECK-NEXT: - - - - - - 10.00 - vredmin.vs v8, v8, v81425# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu1426# CHECK-NEXT: - - - - - - 35.00 - vredmin.vs v8, v8, v81427# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu1428# CHECK-NEXT: - - - - - - 2.00 - vredmin.vs v8, v8, v81429# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu1430# CHECK-NEXT: - - - - - - 1.00 - vredmin.vs v8, v8, v81431# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu1432# CHECK-NEXT: - - - - - - 2.00 - vredmin.vs v8, v8, v81433# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu1434# CHECK-NEXT: - - - - - - 4.00 - vredmin.vs v8, v8, v81435# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu1436# CHECK-NEXT: - - - - - - 10.00 - vredmin.vs v8, v8, v81437# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu1438# CHECK-NEXT: - - - - - - 35.00 - vredmin.vs v8, v8, v81439# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu1440# CHECK-NEXT: - - - - - - 2.00 - vredmin.vs v8, v8, v81441# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu1442# CHECK-NEXT: - - - - - - 2.00 - vredmin.vs v8, v8, v81443# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu1444# CHECK-NEXT: - - - - - - 4.00 - vredmin.vs v8, v8, v81445# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu1446# CHECK-NEXT: - - - - - - 10.00 - vredmin.vs v8, v8, v81447# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu1448# CHECK-NEXT: - - - - - - 35.00 - vredmin.vs v8, v8, v81449# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu1450# CHECK-NEXT: - - - - - - 2.00 - vredmin.vs v8, v8, v81451# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu1452# CHECK-NEXT: - - - - - - 4.00 - vredmin.vs v8, v8, v81453# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu1454# CHECK-NEXT: - - - - - - 10.00 - vredmin.vs v8, v8, v81455# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu1456# CHECK-NEXT: - - - - - - 35.00 - vredmin.vs v8, v8, v81457# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu1458# CHECK-NEXT: - - - - - - 2.00 - vredor.vs v8, v8, v81459# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu1460# CHECK-NEXT: - - - - - - 1.00 - vredor.vs v8, v8, v81461# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu1462# CHECK-NEXT: - - - - - - 1.00 - vredor.vs v8, v8, v81463# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu1464# CHECK-NEXT: - - - - - - 2.00 - vredor.vs v8, v8, v81465# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu1466# CHECK-NEXT: - - - - - - 4.00 - vredor.vs v8, v8, v81467# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu1468# CHECK-NEXT: - - - - - - 10.00 - vredor.vs v8, v8, v81469# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu1470# CHECK-NEXT: - - - - - - 35.00 - vredor.vs v8, v8, v81471# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu1472# CHECK-NEXT: - - - - - - 2.00 - vredor.vs v8, v8, v81473# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu1474# CHECK-NEXT: - - - - - - 1.00 - vredor.vs v8, v8, v81475# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu1476# CHECK-NEXT: - - - - - - 2.00 - vredor.vs v8, v8, v81477# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu1478# CHECK-NEXT: - - - - - - 4.00 - vredor.vs v8, v8, v81479# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu1480# CHECK-NEXT: - - - - - - 10.00 - vredor.vs v8, v8, v81481# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu1482# CHECK-NEXT: - - - - - - 35.00 - vredor.vs v8, v8, v81483# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu1484# CHECK-NEXT: - - - - - - 2.00 - vredor.vs v8, v8, v81485# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu1486# CHECK-NEXT: - - - - - - 2.00 - vredor.vs v8, v8, v81487# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu1488# CHECK-NEXT: - - - - - - 4.00 - vredor.vs v8, v8, v81489# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu1490# CHECK-NEXT: - - - - - - 10.00 - vredor.vs v8, v8, v81491# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu1492# CHECK-NEXT: - - - - - - 35.00 - vredor.vs v8, v8, v81493# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu1494# CHECK-NEXT: - - - - - - 2.00 - vredor.vs v8, v8, v81495# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu1496# CHECK-NEXT: - - - - - - 4.00 - vredor.vs v8, v8, v81497# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu1498# CHECK-NEXT: - - - - - - 10.00 - vredor.vs v8, v8, v81499# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu1500# CHECK-NEXT: - - - - - - 35.00 - vredor.vs v8, v8, v81501# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu1502# CHECK-NEXT: - - - - - - 2.00 - vredsum.vs v8, v8, v81503# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu1504# CHECK-NEXT: - - - - - - 1.00 - vredsum.vs v8, v8, v81505# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu1506# CHECK-NEXT: - - - - - - 1.00 - vredsum.vs v8, v8, v81507# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu1508# CHECK-NEXT: - - - - - - 2.00 - vredsum.vs v8, v8, v81509# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu1510# CHECK-NEXT: - - - - - - 4.00 - vredsum.vs v8, v8, v81511# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu1512# CHECK-NEXT: - - - - - - 10.00 - vredsum.vs v8, v8, v81513# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu1514# CHECK-NEXT: - - - - - - 35.00 - vredsum.vs v8, v8, v81515# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu1516# CHECK-NEXT: - - - - - - 2.00 - vredsum.vs v8, v8, v81517# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu1518# CHECK-NEXT: - - - - - - 1.00 - vredsum.vs v8, v8, v81519# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu1520# CHECK-NEXT: - - - - - - 2.00 - vredsum.vs v8, v8, v81521# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu1522# CHECK-NEXT: - - - - - - 4.00 - vredsum.vs v8, v8, v81523# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu1524# CHECK-NEXT: - - - - - - 10.00 - vredsum.vs v8, v8, v81525# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu1526# CHECK-NEXT: - - - - - - 35.00 - vredsum.vs v8, v8, v81527# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu1528# CHECK-NEXT: - - - - - - 2.00 - vredsum.vs v8, v8, v81529# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu1530# CHECK-NEXT: - - - - - - 2.00 - vredsum.vs v8, v8, v81531# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu1532# CHECK-NEXT: - - - - - - 4.00 - vredsum.vs v8, v8, v81533# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu1534# CHECK-NEXT: - - - - - - 10.00 - vredsum.vs v8, v8, v81535# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu1536# CHECK-NEXT: - - - - - - 35.00 - vredsum.vs v8, v8, v81537# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu1538# CHECK-NEXT: - - - - - - 2.00 - vredsum.vs v8, v8, v81539# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu1540# CHECK-NEXT: - - - - - - 4.00 - vredsum.vs v8, v8, v81541# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu1542# CHECK-NEXT: - - - - - - 10.00 - vredsum.vs v8, v8, v81543# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu1544# CHECK-NEXT: - - - - - - 35.00 - vredsum.vs v8, v8, v81545# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu1546# CHECK-NEXT: - - - - - - 2.00 - vredxor.vs v8, v8, v81547# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu1548# CHECK-NEXT: - - - - - - 1.00 - vredxor.vs v8, v8, v81549# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu1550# CHECK-NEXT: - - - - - - 1.00 - vredxor.vs v8, v8, v81551# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu1552# CHECK-NEXT: - - - - - - 2.00 - vredxor.vs v8, v8, v81553# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu1554# CHECK-NEXT: - - - - - - 4.00 - vredxor.vs v8, v8, v81555# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu1556# CHECK-NEXT: - - - - - - 10.00 - vredxor.vs v8, v8, v81557# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu1558# CHECK-NEXT: - - - - - - 35.00 - vredxor.vs v8, v8, v81559# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu1560# CHECK-NEXT: - - - - - - 2.00 - vredxor.vs v8, v8, v81561# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu1562# CHECK-NEXT: - - - - - - 1.00 - vredxor.vs v8, v8, v81563# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu1564# CHECK-NEXT: - - - - - - 2.00 - vredxor.vs v8, v8, v81565# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu1566# CHECK-NEXT: - - - - - - 4.00 - vredxor.vs v8, v8, v81567# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu1568# CHECK-NEXT: - - - - - - 10.00 - vredxor.vs v8, v8, v81569# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu1570# CHECK-NEXT: - - - - - - 35.00 - vredxor.vs v8, v8, v81571# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu1572# CHECK-NEXT: - - - - - - 2.00 - vredxor.vs v8, v8, v81573# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu1574# CHECK-NEXT: - - - - - - 2.00 - vredxor.vs v8, v8, v81575# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu1576# CHECK-NEXT: - - - - - - 4.00 - vredxor.vs v8, v8, v81577# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu1578# CHECK-NEXT: - - - - - - 10.00 - vredxor.vs v8, v8, v81579# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu1580# CHECK-NEXT: - - - - - - 35.00 - vredxor.vs v8, v8, v81581# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu1582# CHECK-NEXT: - - - - - - 2.00 - vredxor.vs v8, v8, v81583# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu1584# CHECK-NEXT: - - - - - - 4.00 - vredxor.vs v8, v8, v81585# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu1586# CHECK-NEXT: - - - - - - 10.00 - vredxor.vs v8, v8, v81587# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu1588# CHECK-NEXT: - - - - - - 35.00 - vredxor.vs v8, v8, v81589# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu1590# CHECK-NEXT: - - - - - - 2.00 - vwredsumu.vs v8, v16, v241591# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu1592# CHECK-NEXT: - - - - - - 1.00 - vwredsumu.vs v8, v16, v241593# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu1594# CHECK-NEXT: - - - - - - 1.00 - vwredsumu.vs v8, v16, v241595# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu1596# CHECK-NEXT: - - - - - - 2.00 - vwredsumu.vs v8, v16, v241597# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu1598# CHECK-NEXT: - - - - - - 4.00 - vwredsumu.vs v8, v16, v241599# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu1600# CHECK-NEXT: - - - - - - 10.00 - vwredsumu.vs v8, v16, v241601# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu1602# CHECK-NEXT: - - - - - - 35.00 - vwredsumu.vs v8, v16, v241603# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu1604# CHECK-NEXT: - - - - - - 2.00 - vwredsumu.vs v8, v16, v241605# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu1606# CHECK-NEXT: - - - - - - 1.00 - vwredsumu.vs v8, v16, v241607# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu1608# CHECK-NEXT: - - - - - - 2.00 - vwredsumu.vs v8, v16, v241609# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu1610# CHECK-NEXT: - - - - - - 4.00 - vwredsumu.vs v8, v16, v241611# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu1612# CHECK-NEXT: - - - - - - 10.00 - vwredsumu.vs v8, v16, v241613# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu1614# CHECK-NEXT: - - - - - - 35.00 - vwredsumu.vs v8, v16, v241615# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu1616# CHECK-NEXT: - - - - - - 2.00 - vwredsumu.vs v8, v16, v241617# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu1618# CHECK-NEXT: - - - - - - 2.00 - vwredsumu.vs v8, v16, v241619# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu1620# CHECK-NEXT: - - - - - - 4.00 - vwredsumu.vs v8, v16, v241621# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu1622# CHECK-NEXT: - - - - - - 10.00 - vwredsumu.vs v8, v16, v241623# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu1624# CHECK-NEXT: - - - - - - 35.00 - vwredsumu.vs v8, v16, v241625# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu1626# CHECK-NEXT: - - - - - - 2.00 - vwredsum.vs v8, v16, v241627# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu1628# CHECK-NEXT: - - - - - - 1.00 - vwredsum.vs v8, v16, v241629# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu1630# CHECK-NEXT: - - - - - - 1.00 - vwredsum.vs v8, v16, v241631# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu1632# CHECK-NEXT: - - - - - - 2.00 - vwredsum.vs v8, v16, v241633# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu1634# CHECK-NEXT: - - - - - - 4.00 - vwredsum.vs v8, v16, v241635# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu1636# CHECK-NEXT: - - - - - - 10.00 - vwredsum.vs v8, v16, v241637# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu1638# CHECK-NEXT: - - - - - - 35.00 - vwredsum.vs v8, v16, v241639# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu1640# CHECK-NEXT: - - - - - - 2.00 - vwredsum.vs v8, v16, v241641# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu1642# CHECK-NEXT: - - - - - - 1.00 - vwredsum.vs v8, v16, v241643# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu1644# CHECK-NEXT: - - - - - - 2.00 - vwredsum.vs v8, v16, v241645# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu1646# CHECK-NEXT: - - - - - - 4.00 - vwredsum.vs v8, v16, v241647# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu1648# CHECK-NEXT: - - - - - - 10.00 - vwredsum.vs v8, v16, v241649# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu1650# CHECK-NEXT: - - - - - - 35.00 - vwredsum.vs v8, v16, v241651# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu1652# CHECK-NEXT: - - - - - - 2.00 - vwredsum.vs v8, v16, v241653# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu1654# CHECK-NEXT: - - - - - - 2.00 - vwredsum.vs v8, v16, v241655# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu1656# CHECK-NEXT: - - - - - - 4.00 - vwredsum.vs v8, v16, v241657# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu1658# CHECK-NEXT: - - - - - - 10.00 - vwredsum.vs v8, v16, v241659# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu1660# CHECK-NEXT: - - - - - - 35.00 - vwredsum.vs v8, v16, v241661# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu1662# CHECK-NEXT: - - - - - 8.00 - - vfredmax.vs v8, v8, v81663# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu1664# CHECK-NEXT: - - - - - 8.00 - - vfredmax.vs v8, v8, v81665# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu1666# CHECK-NEXT: - - - - - 8.00 - - vfredmax.vs v8, v8, v81667# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu1668# CHECK-NEXT: - - - - - 14.00 - - vfredmax.vs v8, v8, v81669# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu1670# CHECK-NEXT: - - - - - 20.00 - - vfredmax.vs v8, v8, v81671# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu1672# CHECK-NEXT: - - - - - 57.00 - - vfredmax.vs v8, v8, v81673# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu1674# CHECK-NEXT: - - - - - 8.00 - - vfredmax.vs v8, v8, v81675# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu1676# CHECK-NEXT: - - - - - 8.00 - - vfredmax.vs v8, v8, v81677# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu1678# CHECK-NEXT: - - - - - 14.00 - - vfredmax.vs v8, v8, v81679# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu1680# CHECK-NEXT: - - - - - 20.00 - - vfredmax.vs v8, v8, v81681# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu1682# CHECK-NEXT: - - - - - 57.00 - - vfredmax.vs v8, v8, v81683# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu1684# CHECK-NEXT: - - - - - 8.00 - - vfredmax.vs v8, v8, v81685# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu1686# CHECK-NEXT: - - - - - 14.00 - - vfredmax.vs v8, v8, v81687# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu1688# CHECK-NEXT: - - - - - 20.00 - - vfredmax.vs v8, v8, v81689# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu1690# CHECK-NEXT: - - - - - 57.00 - - vfredmax.vs v8, v8, v81691# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu1692# CHECK-NEXT: - - - - - 8.00 - - vfredmin.vs v8, v8, v81693# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu1694# CHECK-NEXT: - - - - - 8.00 - - vfredmin.vs v8, v8, v81695# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu1696# CHECK-NEXT: - - - - - 8.00 - - vfredmin.vs v8, v8, v81697# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu1698# CHECK-NEXT: - - - - - 14.00 - - vfredmin.vs v8, v8, v81699# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu1700# CHECK-NEXT: - - - - - 20.00 - - vfredmin.vs v8, v8, v81701# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu1702# CHECK-NEXT: - - - - - 57.00 - - vfredmin.vs v8, v8, v81703# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu1704# CHECK-NEXT: - - - - - 8.00 - - vfredmin.vs v8, v8, v81705# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu1706# CHECK-NEXT: - - - - - 8.00 - - vfredmin.vs v8, v8, v81707# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu1708# CHECK-NEXT: - - - - - 14.00 - - vfredmin.vs v8, v8, v81709# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu1710# CHECK-NEXT: - - - - - 20.00 - - vfredmin.vs v8, v8, v81711# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu1712# CHECK-NEXT: - - - - - 57.00 - - vfredmin.vs v8, v8, v81713# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu1714# CHECK-NEXT: - - - - - 8.00 - - vfredmin.vs v8, v8, v81715# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu1716# CHECK-NEXT: - - - - - 14.00 - - vfredmin.vs v8, v8, v81717# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu1718# CHECK-NEXT: - - - - - 20.00 - - vfredmin.vs v8, v8, v81719# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu1720# CHECK-NEXT: - - - - - 57.00 - - vfredmin.vs v8, v8, v81721# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu1722# CHECK-NEXT: - - - - - 20.00 - - vfredosum.vs v8, v8, v81723# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu1724# CHECK-NEXT: - - - - - 8.00 - - vfredosum.vs v8, v8, v81725# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu1726# CHECK-NEXT: - - - - - 24.00 - - vfredosum.vs v8, v8, v81727# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu1728# CHECK-NEXT: - - - - - 48.00 - - vfredosum.vs v8, v8, v81729# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu1730# CHECK-NEXT: - - - - - 96.00 - - vfredosum.vs v8, v8, v81731# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu1732# CHECK-NEXT: - - - - - 384.00 - - vfredosum.vs v8, v8, v81733# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu1734# CHECK-NEXT: - - - - - 8.00 - - vfredosum.vs v8, v8, v81735# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu1736# CHECK-NEXT: - - - - - 12.00 - - vfredosum.vs v8, v8, v81737# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu1738# CHECK-NEXT: - - - - - 24.00 - - vfredosum.vs v8, v8, v81739# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu1740# CHECK-NEXT: - - - - - 48.00 - - vfredosum.vs v8, v8, v81741# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu1742# CHECK-NEXT: - - - - - 192.00 - - vfredosum.vs v8, v8, v81743# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu1744# CHECK-NEXT: - - - - - 6.00 - - vfredosum.vs v8, v8, v81745# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu1746# CHECK-NEXT: - - - - - 12.00 - - vfredosum.vs v8, v8, v81747# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu1748# CHECK-NEXT: - - - - - 24.00 - - vfredosum.vs v8, v8, v81749# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu1750# CHECK-NEXT: - - - - - 96.00 - - vfredosum.vs v8, v8, v81751# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu1752# CHECK-NEXT: - - - - - 8.00 - - vfredusum.vs v8, v8, v81753# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu1754# CHECK-NEXT: - - - - - 8.00 - - vfredusum.vs v8, v8, v81755# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu1756# CHECK-NEXT: - - - - - 8.00 - - vfredusum.vs v8, v8, v81757# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu1758# CHECK-NEXT: - - - - - 14.00 - - vfredusum.vs v8, v8, v81759# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu1760# CHECK-NEXT: - - - - - 20.00 - - vfredusum.vs v8, v8, v81761# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu1762# CHECK-NEXT: - - - - - 57.00 - - vfredusum.vs v8, v8, v81763# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu1764# CHECK-NEXT: - - - - - 8.00 - - vfredusum.vs v8, v8, v81765# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu1766# CHECK-NEXT: - - - - - 8.00 - - vfredusum.vs v8, v8, v81767# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu1768# CHECK-NEXT: - - - - - 14.00 - - vfredusum.vs v8, v8, v81769# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu1770# CHECK-NEXT: - - - - - 20.00 - - vfredusum.vs v8, v8, v81771# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu1772# CHECK-NEXT: - - - - - 57.00 - - vfredusum.vs v8, v8, v81773# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu1774# CHECK-NEXT: - - - - - 8.00 - - vfredusum.vs v8, v8, v81775# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu1776# CHECK-NEXT: - - - - - 14.00 - - vfredusum.vs v8, v8, v81777# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu1778# CHECK-NEXT: - - - - - 20.00 - - vfredusum.vs v8, v8, v81779# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu1780# CHECK-NEXT: - - - - - 57.00 - - vfredusum.vs v8, v8, v81781# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu1782# CHECK-NEXT: - - - - - 27.00 - - vfwredosum.vs v8, v8, v81783# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu1784# CHECK-NEXT: - - - - - 11.00 - - vfwredosum.vs v8, v8, v81785# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu1786# CHECK-NEXT: - - - - - 32.00 - - vfwredosum.vs v8, v8, v81787# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu1788# CHECK-NEXT: - - - - - 64.00 - - vfwredosum.vs v8, v8, v81789# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu1790# CHECK-NEXT: - - - - - 128.00 - - vfwredosum.vs v8, v8, v81791# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu1792# CHECK-NEXT: - - - - - 512.00 - - vfwredosum.vs v8, v8, v81793# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu1794# CHECK-NEXT: - - - - - 11.00 - - vfwredosum.vs v8, v8, v81795# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu1796# CHECK-NEXT: - - - - - 16.00 - - vfwredosum.vs v8, v8, v81797# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu1798# CHECK-NEXT: - - - - - 32.00 - - vfwredosum.vs v8, v8, v81799# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu1800# CHECK-NEXT: - - - - - 64.00 - - vfwredosum.vs v8, v8, v81801# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu1802# CHECK-NEXT: - - - - - 256.00 - - vfwredosum.vs v8, v8, v81803# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu1804# CHECK-NEXT: - - - - - 27.00 - - vfwredusum.vs v8, v8, v81805# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu1806# CHECK-NEXT: - - - - - 11.00 - - vfwredusum.vs v8, v8, v81807# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu1808# CHECK-NEXT: - - - - - 32.00 - - vfwredusum.vs v8, v8, v81809# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu1810# CHECK-NEXT: - - - - - 64.00 - - vfwredusum.vs v8, v8, v81811# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu1812# CHECK-NEXT: - - - - - 128.00 - - vfwredusum.vs v8, v8, v81813# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu1814# CHECK-NEXT: - - - - - 512.00 - - vfwredusum.vs v8, v8, v81815# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu1816# CHECK-NEXT: - - - - - 11.00 - - vfwredusum.vs v8, v8, v81817# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu1818# CHECK-NEXT: - - - - - 16.00 - - vfwredusum.vs v8, v8, v81819# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu1820# CHECK-NEXT: - - - - - 32.00 - - vfwredusum.vs v8, v8, v81821# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu1822# CHECK-NEXT: - - - - - 64.00 - - vfwredusum.vs v8, v8, v81823# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu1824# CHECK-NEXT: - - - - - 256.00 - - vfwredusum.vs v8, v8, v81825