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1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py2# RUN: llvm-mca -mtriple=riscv64 -mcpu=tt-ascalon-d8 -instruction-tables=full -iterations=1 < %s | FileCheck %s3 4vsetvli zero, zero, e32, m1, ta, ma5 6vsll.vv v1, v2, v57vsll.vx v1, v2, t08vsll.vi v1, v2, 79 10vsrl.vv v1, v2, v511vsrl.vx v1, v2, t012vsrl.vi v1, v2, 713 14vsra.vv v1, v2, v515vsra.vx v1, v2, t016vsra.vi v1, v2, 717 18vsetvli zero, zero, e32, mf4, ta, ma19 20vsll.vv v1, v2, v521vsll.vx v1, v2, t022vsll.vi v1, v2, 723 24vsrl.vv v1, v2, v525vsrl.vx v1, v2, t026vsrl.vi v1, v2, 727 28vsra.vv v1, v2, v529vsra.vx v1, v2, t030vsra.vi v1, v2, 731 32vsetvli zero, zero, e32, m8, ta, ma33 34vmul.vv v1, v2, v535vmul.vx v1, v2, t136 37vmadd.vv v1, v2, v538vmadd.vx v1, t1, v239 40# CHECK: Resources:41# CHECK-NEXT: [0] - AscalonFP:2 AscalonFPA, AscalonFPB42# CHECK-NEXT: [1] - AscalonFPA:143# CHECK-NEXT: [2] - AscalonFPB:144# CHECK-NEXT: [3] - AscalonFX:6 AscalonFXA, AscalonFXB, AscalonFXC, AscalonFXC, AscalonFXD, AscalonFXD45# CHECK-NEXT: [4] - AscalonFXA:146# CHECK-NEXT: [5] - AscalonFXB:147# CHECK-NEXT: [6] - AscalonFXC:248# CHECK-NEXT: [7] - AscalonFXD:249# CHECK-NEXT: [8] - AscalonLS:350# CHECK-NEXT: [9] - AscalonV:2 AscalonVA, AscalonVB51# CHECK-NEXT: [10] - AscalonVA:152# CHECK-NEXT: [11] - AscalonVB:153 54# CHECK: Instruction Info:55# CHECK-NEXT: [1]: #uOps56# CHECK-NEXT: [2]: Latency57# CHECK-NEXT: [3]: RThroughput58# CHECK-NEXT: [4]: MayLoad59# CHECK-NEXT: [5]: MayStore60# CHECK-NEXT: [6]: HasSideEffects (U)61# CHECK-NEXT: [7]: Bypass Latency62# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])63# CHECK-NEXT: [9]: LLVM Opcode Name64 65# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:66# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m1, ta, ma67# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSLL_VV vsll.vv v1, v2, v568# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSLL_VX vsll.vx v1, v2, t069# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSLL_VI vsll.vi v1, v2, 770# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSRL_VV vsrl.vv v1, v2, v571# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSRL_VX vsrl.vx v1, v2, t072# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSRL_VI vsrl.vi v1, v2, 773# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSRA_VV vsra.vv v1, v2, v574# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSRA_VX vsra.vx v1, v2, t075# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSRA_VI vsra.vi v1, v2, 776# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, mf4, ta, ma77# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSLL_VV vsll.vv v1, v2, v578# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSLL_VX vsll.vx v1, v2, t079# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSLL_VI vsll.vi v1, v2, 780# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSRL_VV vsrl.vv v1, v2, v581# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSRL_VX vsrl.vx v1, v2, t082# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSRL_VI vsrl.vi v1, v2, 783# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSRA_VV vsra.vv v1, v2, v584# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSRA_VX vsra.vx v1, v2, t085# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSRA_VI vsra.vi v1, v2, 786# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m8, ta, ma87# CHECK-NEXT: 1 8 4.00 8 AscalonFX,AscalonV[8] VMUL_VV vmul.vv v1, v2, v588# CHECK-NEXT: 1 8 4.00 8 AscalonFX,AscalonV[8] VMUL_VX vmul.vx v1, v2, t189# CHECK-NEXT: 1 8 4.00 8 AscalonFX,AscalonV[8] VMADD_VV vmadd.vv v1, v2, v590# CHECK-NEXT: 1 8 4.00 8 AscalonFX,AscalonV[8] VMADD_VX vmadd.vx v1, t1, v291 92# CHECK: Resources:93# CHECK-NEXT: [0] - AscalonFPA94# CHECK-NEXT: [1] - AscalonFPB95# CHECK-NEXT: [2] - AscalonFXA96# CHECK-NEXT: [3] - AscalonFXB97# CHECK-NEXT: [4.0] - AscalonFXC98# CHECK-NEXT: [4.1] - AscalonFXC99# CHECK-NEXT: [5.0] - AscalonFXD100# CHECK-NEXT: [5.1] - AscalonFXD101# CHECK-NEXT: [6.0] - AscalonLS102# CHECK-NEXT: [6.1] - AscalonLS103# CHECK-NEXT: [6.2] - AscalonLS104# CHECK-NEXT: [7] - AscalonVA105# CHECK-NEXT: [8] - AscalonVB106 107# CHECK: Resource pressure per iteration:108# CHECK-NEXT: [0] [1] [2] [3] [4.0] [4.1] [5.0] [5.1] [6.0] [6.1] [6.2] [7] [8]109# CHECK-NEXT: - - 3.67 3.67 3.67 3.67 3.67 3.67 - - - 26.50 26.50110 111# CHECK: Resource pressure by instruction:112# CHECK-NEXT: [0] [1] [2] [3] [4.0] [4.1] [5.0] [5.1] [6.0] [6.1] [6.2] [7] [8] Instructions:113# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, m1, ta, ma114# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsll.vv v1, v2, v5115# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsll.vx v1, v2, t0116# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsll.vi v1, v2, 7117# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsrl.vv v1, v2, v5118# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsrl.vx v1, v2, t0119# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsrl.vi v1, v2, 7120# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsra.vv v1, v2, v5121# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsra.vx v1, v2, t0122# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsra.vi v1, v2, 7123# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, mf4, ta, ma124# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsll.vv v1, v2, v5125# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsll.vx v1, v2, t0126# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsll.vi v1, v2, 7127# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsrl.vv v1, v2, v5128# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsrl.vx v1, v2, t0129# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsrl.vi v1, v2, 7130# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsra.vv v1, v2, v5131# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsra.vx v1, v2, t0132# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsra.vi v1, v2, 7133# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, m8, ta, ma134# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 4.00 4.00 vmul.vv v1, v2, v5135# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 4.00 4.00 vmul.vx v1, v2, t1136# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 4.00 4.00 vmadd.vv v1, v2, v5137# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 4.00 4.00 vmadd.vx v1, t1, v2138