88 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py2# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -timeline -timeline-max-iterations=3 -iterations=1500 < %s | FileCheck %s3 4# perf stat reports a throughput of 1.51 IPC for this block of code.5 6# The SBB does not depend on the value of register EAX. That means, it doesn't7# have to wait for the IMUL to write-back on EAX. However, it still depends on8# the ADD for EFLAGS.9 10imul %edx, %eax11add %edx, %edx12sbb %eax, %eax13 14# CHECK: Iterations: 150015# CHECK-NEXT: Instructions: 450016# CHECK-NEXT: Total Cycles: 300617# CHECK-NEXT: Total uOps: 450018 19# CHECK: Dispatch Width: 220# CHECK-NEXT: uOps Per Cycle: 1.5021# CHECK-NEXT: IPC: 1.5022# CHECK-NEXT: Block RThroughput: 1.523 24# CHECK: Instruction Info:25# CHECK-NEXT: [1]: #uOps26# CHECK-NEXT: [2]: Latency27# CHECK-NEXT: [3]: RThroughput28# CHECK-NEXT: [4]: MayLoad29# CHECK-NEXT: [5]: MayStore30# CHECK-NEXT: [6]: HasSideEffects (U)31 32# CHECK: [1] [2] [3] [4] [5] [6] Instructions:33# CHECK-NEXT: 1 3 1.00 imull %edx, %eax34# CHECK-NEXT: 1 1 0.50 addl %edx, %edx35# CHECK-NEXT: 1 1 1.00 sbbl %eax, %eax36 37# CHECK: Resources:38# CHECK-NEXT: [0] - JALU039# CHECK-NEXT: [1] - JALU140# CHECK-NEXT: [2] - JDiv41# CHECK-NEXT: [3] - JFPA42# CHECK-NEXT: [4] - JFPM43# CHECK-NEXT: [5] - JFPU044# CHECK-NEXT: [6] - JFPU145# CHECK-NEXT: [7] - JLAGU46# CHECK-NEXT: [8] - JMul47# CHECK-NEXT: [9] - JSAGU48# CHECK-NEXT: [10] - JSTC49# CHECK-NEXT: [11] - JVALU050# CHECK-NEXT: [12] - JVALU151# CHECK-NEXT: [13] - JVIMUL52 53# CHECK: Resource pressure per iteration:54# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13]55# CHECK-NEXT: 2.00 2.00 - - - - - - 1.00 - - - - -56 57# CHECK: Resource pressure by instruction:58# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] Instructions:59# CHECK-NEXT: - 1.00 - - - - - - 1.00 - - - - - imull %edx, %eax60# CHECK-NEXT: - 1.00 - - - - - - - - - - - - addl %edx, %edx61# CHECK-NEXT: 2.00 - - - - - - - - - - - - - sbbl %eax, %eax62 63# CHECK: Timeline view:64# CHECK-NEXT: 0165# CHECK-NEXT: Index 012345678966 67# CHECK: [0,0] DeeeER .. imull %edx, %eax68# CHECK-NEXT: [0,1] DeE--R .. addl %edx, %edx69# CHECK-NEXT: [0,2] .DeE--R .. sbbl %eax, %eax70# CHECK-NEXT: [1,0] .D==eeeER .. imull %edx, %eax71# CHECK-NEXT: [1,1] . DeE---R .. addl %edx, %edx72# CHECK-NEXT: [1,2] . D=eE---R.. sbbl %eax, %eax73# CHECK-NEXT: [2,0] . D==eeeER. imull %edx, %eax74# CHECK-NEXT: [2,1] . D=eE---R. addl %edx, %edx75# CHECK-NEXT: [2,2] . D=eE---R sbbl %eax, %eax76 77# CHECK: Average Wait times (based on the timeline view):78# CHECK-NEXT: [0]: Executions79# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue80# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready81# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage82 83# CHECK: [0] [1] [2] [3]84# CHECK-NEXT: 0. 3 2.3 1.0 0.0 imull %edx, %eax85# CHECK-NEXT: 1. 3 1.3 1.0 2.7 addl %edx, %edx86# CHECK-NEXT: 2. 3 1.7 0.0 2.7 sbbl %eax, %eax87# CHECK-NEXT: 3 1.8 0.7 1.8 <total>88