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1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py2# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -iterations=1500 -timeline -timeline-max-iterations=7 < %s | FileCheck %s3 4# The lzcnt cannot execute in parallel with the imul because there is a false5# dependency on %bx.6 7imul %ax, %bx8lzcnt %ax, %bx9add %cx, %bx10 11# CHECK: Iterations: 150012# CHECK-NEXT: Instructions: 450013# CHECK-NEXT: Total Cycles: 750314# CHECK-NEXT: Total uOps: 450015 16# CHECK: Dispatch Width: 417# CHECK-NEXT: uOps Per Cycle: 0.6018# CHECK-NEXT: IPC: 0.6019# CHECK-NEXT: Block RThroughput: 1.020 21# CHECK: Instruction Info:22# CHECK-NEXT: [1]: #uOps23# CHECK-NEXT: [2]: Latency24# CHECK-NEXT: [3]: RThroughput25# CHECK-NEXT: [4]: MayLoad26# CHECK-NEXT: [5]: MayStore27# CHECK-NEXT: [6]: HasSideEffects (U)28 29# CHECK: [1] [2] [3] [4] [5] [6] Instructions:30# CHECK-NEXT: 1 3 1.00 imulw %ax, %bx31# CHECK-NEXT: 1 1 0.25 lzcntw %ax, %bx32# CHECK-NEXT: 1 1 0.25 addw %cx, %bx33 34# CHECK: Resources:35# CHECK-NEXT: [0] - Zn2AGU036# CHECK-NEXT: [1] - Zn2AGU137# CHECK-NEXT: [2] - Zn2AGU238# CHECK-NEXT: [3] - Zn2ALU039# CHECK-NEXT: [4] - Zn2ALU140# CHECK-NEXT: [5] - Zn2ALU241# CHECK-NEXT: [6] - Zn2ALU342# CHECK-NEXT: [7] - Zn2Divider43# CHECK-NEXT: [8] - Zn2FPU044# CHECK-NEXT: [9] - Zn2FPU145# CHECK-NEXT: [10] - Zn2FPU246# CHECK-NEXT: [11] - Zn2FPU347# CHECK-NEXT: [12] - Zn2Multiplier48 49# CHECK: Resource pressure per iteration:50# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]51# CHECK-NEXT: - - - 0.67 1.00 0.67 0.67 - - - - - 1.0052 53# CHECK: Resource pressure by instruction:54# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:55# CHECK-NEXT: - - - - 1.00 - - - - - - - 1.00 imulw %ax, %bx56# CHECK-NEXT: - - - 0.33 - 0.33 0.33 - - - - - - lzcntw %ax, %bx57# CHECK-NEXT: - - - 0.33 - 0.33 0.33 - - - - - - addw %cx, %bx58 59# CHECK: Timeline view:60# CHECK-NEXT: 0123456789 0123456761# CHECK-NEXT: Index 0123456789 012345678962 63# CHECK: [0,0] DeeeER . . . . . . . imulw %ax, %bx64# CHECK-NEXT: [0,1] D===eER . . . . . . . lzcntw %ax, %bx65# CHECK-NEXT: [0,2] D====eER . . . . . . . addw %cx, %bx66# CHECK-NEXT: [1,0] D=====eeeER . . . . . . imulw %ax, %bx67# CHECK-NEXT: [1,1] .D=======eER . . . . . . lzcntw %ax, %bx68# CHECK-NEXT: [1,2] .D========eER . . . . . . addw %cx, %bx69# CHECK-NEXT: [2,0] .D=========eeeER . . . . . imulw %ax, %bx70# CHECK-NEXT: [2,1] .D============eER . . . . . lzcntw %ax, %bx71# CHECK-NEXT: [2,2] . D============eER . . . . . addw %cx, %bx72# CHECK-NEXT: [3,0] . D=============eeeER . . . . imulw %ax, %bx73# CHECK-NEXT: [3,1] . D================eER . . . . lzcntw %ax, %bx74# CHECK-NEXT: [3,2] . D=================eER . . . . addw %cx, %bx75# CHECK-NEXT: [4,0] . D=================eeeER . . . imulw %ax, %bx76# CHECK-NEXT: [4,1] . D====================eER . . . lzcntw %ax, %bx77# CHECK-NEXT: [4,2] . D=====================eER . . . addw %cx, %bx78# CHECK-NEXT: [5,0] . D======================eeeER . . imulw %ax, %bx79# CHECK-NEXT: [5,1] . D========================eER . . lzcntw %ax, %bx80# CHECK-NEXT: [5,2] . D=========================eER . . addw %cx, %bx81# CHECK-NEXT: [6,0] . D==========================eeeER . imulw %ax, %bx82# CHECK-NEXT: [6,1] . D=============================eER. lzcntw %ax, %bx83# CHECK-NEXT: [6,2] . D=============================eER addw %cx, %bx84 85# CHECK: Average Wait times (based on the timeline view):86# CHECK-NEXT: [0]: Executions87# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue88# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready89# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage90 91# CHECK: [0] [1] [2] [3]92# CHECK-NEXT: 0. 7 14.1 0.1 0.0 imulw %ax, %bx93# CHECK-NEXT: 1. 7 16.9 0.0 0.0 lzcntw %ax, %bx94# CHECK-NEXT: 2. 7 17.6 0.0 0.0 addw %cx, %bx95# CHECK-NEXT: 7 16.2 0.0 0.0 <total>96