26 lines · plain
1## When --mattr and --mcpu are both empty, disassemble all known instructions.2# RUN: llvm-mc -filetype=obj -triple=aarch64 -mattr=+all %s -o %t3# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s --check-prefixes=CHECK,ALL4# RUN: llvm-mc -filetype=obj -triple=aarch64_be -mattr=+all %s -o %t5# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s --check-prefixes=CHECK,ALL6# RUN: llvm-mc -filetype=obj -triple=aarch64_32 -mattr=+all %s -o %t7# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s --check-prefixes=CHECK,ALL8 9## If --mattr or --mcpu is specified, don't default to --mattr=+all.10# RUN: llvm-objdump -d --no-show-raw-insn --mattr=+v8a %t | FileCheck %s --check-prefixes=CHECK,UNKNOWN11# RUN: llvm-objdump -d --no-show-raw-insn --mcpu=generic %t | FileCheck %s --check-prefixes=CHECK,UNKNOWN12 13# CHECK-LABEL: <_start>:14# ALL-NEXT: bc.eq 0x415# ALL-NEXT: irg x0, x116# ALL-NEXT: mrs x0, RNDR17# UNKNOWN-COUNT-2: <unknown>18# UNKNOWN: mrs x0, S3_3_C2_C4_019# CHECK-EMPTY:20 21.globl _start22_start:23 bc.eq #4 // armv8.8-a hbc24 irg x0, x1 // armv8.5-a mte25 mrs x0, RNDR // armv8.5-a rand26