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1@@ Check that PC-relative memory addressing is annotated2 3@ RUN: llvm-mc %s -triple=thumbv7 -filetype=obj | \4@ RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn --triple=thumbv7 - | \5@ RUN: FileCheck %s6 7.text8foo:9@ CHECK: 00000000 <foo>:10 .word 0x0102030411 12_start:13@ CHECK: 00000004 <_start>:14 15@@ Check a special case immediate for AddrModeT2_pc16 .balign 417 ldr r0, [pc, #-0]18@ CHECK: 4: ldr.w r0, [pc, #-0] @ 0x8 <_start+0x4>19 20@@ Same instruction, but the address is not 4-byte aligned21 nop22 ldr r0, [pc, #-0]23@ CHECK: a: ldr.w r0, [pc, #-0] @ 0xc <_start+0x8>24 25@@ Check a special case immediate for AddrModeT2_i8s426 .balign 427 ldrd r0, r1, [pc, #-0]28@ CHECK: 10: ldrd r0, r1, [pc, #-0] @ 0x14 <_start+0x10>29 30@@ Same instruction, but the address is not 4-byte aligned31 nop32 ldrd r0, r1, [pc, #-0]33@ CHECK: 16: ldrd r0, r1, [pc, #-0] @ 0x18 <_start+0x14>34 35@@ Check AddrModeT2_pc instructions, with positive and negative immediates36 .balign 437 ldr r0, foo38 ldrb r0, bar39 ldrsb r0, foo40 ldrsh r0, bar41 pli _start42 pld bar43@ CHECK: 1c: ldr.w r0, [pc, #-32] @ 0x0 <foo>44@ CHECK-NEXT: 20: ldrb.w r0, [pc, #112] @ 0x94 <bar>45@ CHECK-NEXT: 24: ldrsb.w r0, [pc, #-40] @ 0x0 <foo>46@ CHECK-NEXT: 28: ldrsh.w r0, [pc, #104] @ 0x94 <bar>47@ CHECK-NEXT: 2c: pli [pc, #-44] @ 0x4 <_start>48@ CHECK-NEXT: 30: pld [pc, #96] @ 0x94 <bar>49 50@@ Same instructions, but the addresses are not 4-byte aligned51 nop52 ldr r0, foo53 ldrb r0, bar54 ldrsb r0, foo55 ldrsh r0, bar56 pli _start57 pld bar58@ CHECK: 36: ldr.w r0, [pc, #-56] @ 0x0 <foo>59@ CHECK-NEXT: 3a: ldrb.w r0, [pc, #88] @ 0x94 <bar>60@ CHECK-NEXT: 3e: ldrsb.w r0, [pc, #-64] @ 0x0 <foo>61@ CHECK-NEXT: 42: ldrsh.w r0, [pc, #80] @ 0x94 <bar>62@ CHECK-NEXT: 46: pli [pc, #-68] @ 0x4 <_start>63@ CHECK-NEXT: 4a: pld [pc, #72] @ 0x94 <bar>64 65@@ Check AddrModeT2_i8s4 instructions, with positive and negative immediates66 .balign 467 ldrd r0, r1, foo68 ldrd r0, r1, bar69@ CHECK: 50: ldrd r0, r1, [pc, #-84] @ 0x0 <foo>70@ CHECK-NEXT: 54: ldrd r0, r1, [pc, #60] @ 0x94 <bar>71 72@@ Same instructions, but the addresses are not 4-byte aligned73 nop74 ldrd r0, r1, foo75 ldrd r0, r1, bar76@ CHECK: 5a: ldrd r0, r1, [pc, #-92] @ 0x0 <foo>77@ CHECK-NEXT: 5e: ldrd r0, r1, [pc, #52] @ 0x94 <bar>78 79@@ Check that AddrModeT2_i8s4 instructions that do not use PC-relative80@@ addressingare not annotated81 ldrd r0, r1, [r2, #8]82@ CHECK: 62: ldrd r0, r1, [r2, #8]{{$}}83 84@@ Check AddrMode5 instructions, with positive and negative immediates85 .balign 486 ldc p14, c5, foo87 ldcl p6, c4, bar88 ldc2 p5, c2, foo89 ldc2l p3, c1, bar90@ CHECK: 68: ldc p14, c5, [pc, #-108] @ 0x0 <foo>91@ CHECK-NEXT: 6c: ldcl p6, c4, [pc, #36] @ 0x94 <bar>92@ CHECK-NEXT: 70: ldc2 p5, c2, [pc, #-116] @ 0x0 <foo>93@ CHECK-NEXT: 74: ldc2l p3, c1, [pc, #28] @ 0x94 <bar>94 95@@ Same instructions, but the addresses are not 4-byte aligned96 nop97 ldc p14, c5, foo98 ldcl p6, c4, bar99 ldc2 p5, c2, foo100 ldc2l p3, c1, bar101@ CHECK: 7a: ldc p14, c5, [pc, #-124] @ 0x0 <foo>102@ CHECK-NEXT: 7e: ldcl p6, c4, [pc, #20] @ 0x94 <bar>103@ CHECK-NEXT: 82: ldc2 p5, c2, [pc, #-132] @ 0x0 <foo>104@ CHECK-NEXT: 86: ldc2l p3, c1, [pc, #12] @ 0x94 <bar>105 106@@ Check that AddrMode5 instruction that do not use PC+imm addressing are not107@@ annotated108 ldc p14, c5, [r1, #8]109 ldc p14, c5, [pc], {16}110@ CHECK: 8a: ldc p14, c5, [r1, #8]{{$}}111@ CHECK-NEXT: 8e: ldc p14, c5, [pc], {16}{{$}}112 113 .balign 4114bar:115@ CHECK: 00000094 <bar>:116 .word 0x01020304117