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1# REQUIRES: riscv-registered-target2# RUN: llvm-reduce -abort-on-invalid-reduction --delta-passes=instructions -mtriple=riscv32 --test FileCheck --test-arg --check-prefix=CHECK-INTERESTINGNESS --test-arg %s --test-arg --input-file %s -o %t3# RUN: FileCheck --match-full-lines %s < %t4 5# CHECK-INTERESTINGNESS: %{{[0-9]+}}:gpr = ADDI %{{[0-9]+}}, 56 7# Verify that after reduction the following instruction sequence remains. The8# interestingness-test 'instr-reduce.py' matches a '%[0-9]+:gpr = ADDI %[0-9]+, 5'9# pattern in the output and that combined with that the MIR has to be valid10# (pass verify) results in the given sequence.11 12# CHECK: [[IMPDEF:%[0-9]+]]:gpr = IMPLICIT_DEF13# CHECK-NEXT: %{{[0-9]+}}:gpr = ADDI [[IMPDEF]], 514# CHECK-NEXT: PseudoRET implicit $x1015 16...17---18name: f19tracksRegLiveness: true20body: |21 bb.0:22 liveins: $x1023 24 %10:gpr = COPY $x1025 %20:gpr = ADDI %10, 126 %30:gpr = ADDI %20, 527 %40:gpr = ADDI %30, 928 $x10 = COPY %4029 PseudoRET implicit $x1030...31---32