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1# REQUIRES: amdgpu-registered-target2# RUN: llvm-reduce -abort-on-invalid-reduction --delta-passes=instructions -mtriple=amdgcn-amd-amdhsa --test FileCheck --test-arg --check-prefix=CHECK-INTERESTINGNESS --test-arg %s --test-arg --input-file %s -o %t 2> %t.log3# RUN: FileCheck --match-full-lines --check-prefix=RESULT %s < %t4 5# CHECK-INTERESTINGNESS: %{{[0-9]+}}.sub0:vreg_64 = V_ADD_U32_e32 %{{[0-9]+}}.sub1, %{{[0-9]+}}.sub0, implicit $exec6# CHECK-INTERESTINGNESS: %{{[0-9]+}}.sub0:vreg_64 = V_ADD_U32_e32 4, %{{[0-9]+}}.sub0, implicit $exec7 8# RESULT: undef %{{[0-9]+}}.sub1:vreg_64 = IMPLICIT_DEF9# RESULT-NEXT: %0.sub0:vreg_64 = V_ADD_U32_e32 %{{[0-9]+}}.sub1, %{{[0-9]+}}.sub0, implicit $exec10# RESULT-NEXT: %1.sub0:vreg_64 = V_ADD_U32_e32 4, %{{[0-9]+}}.sub0, implicit $exec11# RESULT-NEXT: S_ENDPGM 0, implicit %{{[0-9]+}}, implicit %{{[0-9]+}}.sub012---13name: f14tracksRegLiveness: true15body: |16 bb.0:17 S_WAITCNT 018 undef %0.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec19 %1.sub1:vreg_64 = V_ADD_U32_e32 2, %0.sub1, implicit $exec20 %0.sub0:vreg_64 = V_ADD_U32_e32 %1.sub1, %0.sub0, implicit $exec21 %1.sub0:vreg_64 = V_ADD_U32_e32 4, %0.sub0, implicit $exec22 S_ENDPGM 0, implicit %1, implicit %0.sub023...24