74 lines · cpp
1//===-- RegisterAliasingTest.cpp --------------------------------*- C++ -*-===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8 9#include "RegisterAliasing.h"10 11#include <cassert>12 13#include "MipsInstrInfo.h"14#include "TestBase.h"15#include "llvm/MC/TargetRegistry.h"16#include "llvm/Support/TargetSelect.h"17#include "gmock/gmock.h"18#include "gtest/gtest.h"19 20namespace llvm {21namespace exegesis {22namespace {23 24class MipsRegisterAliasingTest : public MipsTestBase {};25 26TEST_F(MipsRegisterAliasingTest, TrackSimpleRegister) {27 const auto &RegInfo = State.getRegInfo();28 const RegisterAliasingTracker tracker(RegInfo, Mips::T0_64);29 std::set<MCPhysReg> ActualAliasedRegisters;30 for (unsigned I : tracker.aliasedBits().set_bits())31 ActualAliasedRegisters.insert(static_cast<MCPhysReg>(I));32 const std::set<MCPhysReg> ExpectedAliasedRegisters = {Mips::T0, Mips::T0_64};33 ASSERT_THAT(ActualAliasedRegisters, ExpectedAliasedRegisters);34 for (MCPhysReg aliased : ExpectedAliasedRegisters) {35 ASSERT_THAT(tracker.getOrigin(aliased), Mips::T0_64);36 }37}38 39TEST_F(MipsRegisterAliasingTest, TrackRegisterClass) {40 // The alias bits for41 // GPR64_with_sub_32_in_GPRMM16MoveP_and_GPRMM16ZeroRegClassID42 // are the union of the alias bits for ZERO_64, V0_64, V1_64 and S1_64.43 const auto &RegInfo = State.getRegInfo();44 const BitVector NoReservedReg(RegInfo.getNumRegs());45 46 const RegisterAliasingTracker RegClassTracker(47 RegInfo, NoReservedReg,48 RegInfo.getRegClass(49 Mips::GPR64_with_sub_32_in_GPRMM16MoveP_and_GPRMM16ZeroRegClassID));50 51 BitVector sum(RegInfo.getNumRegs());52 sum |= RegisterAliasingTracker(RegInfo, Mips::ZERO_64).aliasedBits();53 sum |= RegisterAliasingTracker(RegInfo, Mips::V0_64).aliasedBits();54 sum |= RegisterAliasingTracker(RegInfo, Mips::V1_64).aliasedBits();55 sum |= RegisterAliasingTracker(RegInfo, Mips::S1_64).aliasedBits();56 57 ASSERT_THAT(RegClassTracker.aliasedBits(), sum);58}59 60TEST_F(MipsRegisterAliasingTest, TrackRegisterClassCache) {61 // Fetching the same tracker twice yields the same pointers.62 const auto &RegInfo = State.getRegInfo();63 const BitVector NoReservedReg(RegInfo.getNumRegs());64 RegisterAliasingTrackerCache Cache(RegInfo, NoReservedReg);65 ASSERT_THAT(&Cache.getRegister(Mips::T0), &Cache.getRegister(Mips::T0));66 67 ASSERT_THAT(&Cache.getRegisterClass(Mips::ACC64RegClassID),68 &Cache.getRegisterClass(Mips::ACC64RegClassID));69}70 71} // namespace72} // namespace exegesis73} // namespace llvm74