527 lines · cpp
1//===- CodeEmitterGen.cpp - Code Emitter Generator ------------------------===//2//3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4// See https://llvm.org/LICENSE.txt for license information.5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6//7//===----------------------------------------------------------------------===//8//9// CodeEmitterGen uses the descriptions of instructions and their fields to10// construct an automated code emitter: a function called11// getBinaryCodeForInstr() that, given a MCInst, returns the value of the12// instruction - either as an uint64_t or as an APInt, depending on the13// maximum bit width of all Inst definitions.14//15// In addition, it generates another function called getOperandBitOffset()16// that, given a MCInst and an operand index, returns the minimum of indices of17// all bits that carry some portion of the respective operand. When the target's18// encodeInstruction() stores the instruction in a little-endian byte order, the19// returned value is the offset of the start of the operand in the encoded20// instruction. Other targets might need to adjust the returned value according21// to their encodeInstruction() implementation.22//23//===----------------------------------------------------------------------===//24 25#include "Common/CodeGenHwModes.h"26#include "Common/CodeGenInstruction.h"27#include "Common/CodeGenTarget.h"28#include "Common/InfoByHwMode.h"29#include "Common/VarLenCodeEmitterGen.h"30#include "llvm/ADT/APInt.h"31#include "llvm/ADT/ArrayRef.h"32#include "llvm/ADT/StringExtras.h"33#include "llvm/Support/Casting.h"34#include "llvm/Support/Format.h"35#include "llvm/Support/FormatVariadic.h"36#include "llvm/Support/raw_ostream.h"37#include "llvm/TableGen/Error.h"38#include "llvm/TableGen/Record.h"39#include "llvm/TableGen/TableGenBackend.h"40#include <cstdint>41#include <map>42#include <set>43#include <string>44#include <utility>45#include <vector>46 47using namespace llvm;48 49namespace {50 51class CodeEmitterGen {52 const RecordKeeper &RK;53 CodeGenTarget Target;54 const CodeGenHwModes &CGH;55 56public:57 explicit CodeEmitterGen(const RecordKeeper &RK);58 59 void run(raw_ostream &O);60 61private:62 int getVariableBit(const std::string &VarName, const BitsInit *BI, int Bit);63 std::pair<std::string, std::string> getInstructionCases(const Record *R);64 void addInstructionCasesForEncoding(const Record *R,65 const Record *EncodingDef,66 std::string &Case,67 std::string &BitOffsetCase);68 bool addCodeToMergeInOperand(const Record *R, const BitsInit *BI,69 const std::string &VarName, std::string &Case,70 std::string &BitOffsetCase);71 72 void emitInstructionBaseValues(73 raw_ostream &O, ArrayRef<const CodeGenInstruction *> NumberedInstructions,74 unsigned HwMode = DefaultMode);75 void76 emitCaseMap(raw_ostream &O,77 const std::map<std::string, std::vector<std::string>> &CaseMap);78 unsigned BitWidth = 0u;79 bool UseAPInt = false;80};81 82} // end anonymous namespace83 84// If the VarBitInit at position 'bit' matches the specified variable then85// return the variable bit position. Otherwise return -1.86int CodeEmitterGen::getVariableBit(const std::string &VarName,87 const BitsInit *BI, int Bit) {88 if (const VarBitInit *VBI = dyn_cast<VarBitInit>(BI->getBit(Bit))) {89 if (const VarInit *VI = dyn_cast<VarInit>(VBI->getBitVar()))90 if (VI->getName() == VarName)91 return VBI->getBitNum();92 } else if (const VarInit *VI = dyn_cast<VarInit>(BI->getBit(Bit))) {93 if (VI->getName() == VarName)94 return 0;95 }96 97 return -1;98}99 100// Returns true if it succeeds, false if an error.101bool CodeEmitterGen::addCodeToMergeInOperand(const Record *R,102 const BitsInit *BI,103 const std::string &VarName,104 std::string &Case,105 std::string &BitOffsetCase) {106 const CodeGenInstruction &CGI = Target.getInstruction(R);107 108 // Determine if VarName actually contributes to the Inst encoding.109 int Bit = BI->getNumBits() - 1;110 111 // Scan for a bit that this contributed to.112 for (; Bit >= 0;) {113 if (getVariableBit(VarName, BI, Bit) != -1)114 break;115 116 --Bit;117 }118 119 // If we found no bits, ignore this value, otherwise emit the call to get the120 // operand encoding.121 if (Bit < 0)122 return true;123 124 // If the operand matches by name, reference according to that125 // operand number. Non-matching operands are assumed to be in126 // order.127 unsigned OpIdx;128 if (auto SubOp = CGI.Operands.findSubOperandAlias(VarName)) {129 OpIdx = CGI.Operands[SubOp->first].MIOperandNo + SubOp->second;130 } else if (auto MayBeOpIdx = CGI.Operands.findOperandNamed(VarName)) {131 // Get the machine operand number for the indicated operand.132 OpIdx = CGI.Operands[*MayBeOpIdx].MIOperandNo;133 } else {134 PrintError(R, Twine("No operand named ") + VarName + " in record " +135 R->getName());136 return false;137 }138 139 std::pair<unsigned, unsigned> SO = CGI.Operands.getSubOperandNumber(OpIdx);140 StringRef EncoderMethodName =141 CGI.Operands[SO.first].EncoderMethodNames[SO.second];142 143 raw_string_ostream OS(Case);144 indent Indent(6);145 146 OS << Indent << "// op: " << VarName << '\n';147 148 if (UseAPInt)149 OS << Indent << "op.clearAllBits();\n";150 151 if (!EncoderMethodName.empty()) {152 if (UseAPInt)153 OS << Indent << EncoderMethodName << "(MI, " << OpIdx154 << ", op, Fixups, STI);\n";155 else156 OS << Indent << "op = " << EncoderMethodName << "(MI, " << OpIdx157 << ", Fixups, STI);\n";158 } else {159 if (UseAPInt)160 OS << Indent << "getMachineOpValue(MI, MI.getOperand(" << OpIdx161 << "), op, Fixups, STI);\n";162 else163 OS << Indent << "op = getMachineOpValue(MI, MI.getOperand(" << OpIdx164 << "), Fixups, STI);\n";165 }166 167 unsigned BitOffset = -1;168 for (; Bit >= 0;) {169 int VarBit = getVariableBit(VarName, BI, Bit);170 171 // If this bit isn't from a variable, skip it.172 if (VarBit == -1) {173 --Bit;174 continue;175 }176 177 // Figure out the consecutive range of bits covered by this operand, in178 // order to generate better encoding code.179 int BeginInstBit = Bit;180 int BeginVarBit = VarBit;181 int N = 1;182 for (--Bit; Bit >= 0;) {183 VarBit = getVariableBit(VarName, BI, Bit);184 if (VarBit == -1 || VarBit != (BeginVarBit - N))185 break;186 ++N;187 --Bit;188 }189 190 unsigned LoBit = BeginVarBit - N + 1;191 unsigned LoInstBit = BeginInstBit - N + 1;192 BitOffset = LoInstBit;193 if (UseAPInt) {194 if (N > 64)195 OS << Indent << "Value.insertBits(op.extractBits(" << N << ", " << LoBit196 << "), " << LoInstBit << ");\n";197 else198 OS << Indent << "Value.insertBits(op.extractBitsAsZExtValue(" << N199 << ", " << LoBit << "), " << LoInstBit << ", " << N << ");\n";200 } else {201 uint64_t OpMask = maskTrailingOnes<uint64_t>(N) << LoBit;202 OS << Indent << "Value |= (op & " << format_hex(OpMask, 0) << ')';203 int OpShift = BeginInstBit - BeginVarBit;204 if (OpShift > 0)205 OS << " << " << OpShift;206 else if (OpShift < 0)207 OS << " >> " << -OpShift;208 OS << ";\n";209 }210 }211 212 if (BitOffset != (unsigned)-1) {213 BitOffsetCase += " case " + utostr(OpIdx) + ":\n";214 BitOffsetCase += " // op: " + VarName + "\n";215 BitOffsetCase += " return " + utostr(BitOffset) + ";\n";216 }217 218 return true;219}220 221std::pair<std::string, std::string>222CodeEmitterGen::getInstructionCases(const Record *R) {223 std::string Case, BitOffsetCase;224 225 auto Append = [&](const std::string &S) {226 Case += S;227 BitOffsetCase += S;228 };229 230 if (const Record *RV = R->getValueAsOptionalDef("EncodingInfos")) {231 EncodingInfoByHwMode EBM(RV, CGH);232 233 // Invoke the interface to obtain the HwMode ID controlling the234 // EncodingInfo for the current subtarget. This interface will235 // mask off irrelevant HwMode IDs.236 Append(" unsigned HwMode = "237 "STI.getHwMode(MCSubtargetInfo::HwMode_EncodingInfo);\n");238 Case += " switch (HwMode) {\n";239 Case += " default: llvm_unreachable(\"Unknown hardware mode!\"); "240 "break;\n";241 for (auto &[ModeId, Encoding] : EBM) {242 if (ModeId == DefaultMode) {243 Case +=244 " case " + itostr(DefaultMode) + ": InstBitsByHw = InstBits";245 } else {246 Case += " case " + itostr(ModeId) + ": InstBitsByHw = InstBits_" +247 CGH.getMode(ModeId).Name.str();248 }249 Case += "; break;\n";250 }251 Case += " };\n";252 253 // We need to remodify the 'Inst' value from the table we found above.254 if (UseAPInt) {255 int NumWords = APInt::getNumWords(BitWidth);256 Case += " Inst = APInt(" + itostr(BitWidth);257 Case += ", ArrayRef(InstBitsByHw + TableIndex * " + itostr(NumWords) +258 ", " + itostr(NumWords);259 Case += "));\n";260 Case += " Value = Inst;\n";261 } else {262 Case += " Value = InstBitsByHw[TableIndex];\n";263 }264 265 Append(" switch (HwMode) {\n");266 Append(" default: llvm_unreachable(\"Unhandled HwMode\");\n");267 for (auto &[ModeId, Encoding] : EBM) {268 Append(" case " + itostr(ModeId) + ": {\n");269 addInstructionCasesForEncoding(R, Encoding, Case, BitOffsetCase);270 Append(" break;\n");271 Append(" }\n");272 }273 Append(" }\n");274 return {std::move(Case), std::move(BitOffsetCase)};275 }276 addInstructionCasesForEncoding(R, R, Case, BitOffsetCase);277 return {std::move(Case), std::move(BitOffsetCase)};278}279 280void CodeEmitterGen::addInstructionCasesForEncoding(281 const Record *R, const Record *EncodingDef, std::string &Case,282 std::string &BitOffsetCase) {283 const BitsInit *BI = EncodingDef->getValueAsBitsInit("Inst");284 285 // Loop over all of the fields in the instruction, determining which are the286 // operands to the instruction.287 bool Success = true;288 size_t OrigBitOffsetCaseSize = BitOffsetCase.size();289 BitOffsetCase += " switch (OpNum) {\n";290 size_t BitOffsetCaseSizeBeforeLoop = BitOffsetCase.size();291 for (const RecordVal &RV : EncodingDef->getValues()) {292 // Ignore fixed fields in the record, we're looking for values like:293 // bits<5> RST = { ?, ?, ?, ?, ? };294 if (RV.isNonconcreteOK() || RV.getValue()->isComplete())295 continue;296 297 Success &=298 addCodeToMergeInOperand(R, BI, RV.getName().str(), Case, BitOffsetCase);299 }300 // Avoid empty switches.301 if (BitOffsetCase.size() == BitOffsetCaseSizeBeforeLoop)302 BitOffsetCase.resize(OrigBitOffsetCaseSize);303 else304 BitOffsetCase += " }\n";305 306 if (!Success) {307 // Dump the record, so we can see what's going on...308 std::string E;309 raw_string_ostream S(E);310 S << "Dumping record for previous error:\n";311 S << *R;312 PrintNote(E);313 }314 315 StringRef PostEmitter = R->getValueAsString("PostEncoderMethod");316 if (!PostEmitter.empty()) {317 Case += " Value = ";318 Case += PostEmitter;319 Case += "(MI, Value";320 Case += ", STI";321 Case += ");\n";322 }323}324 325static void emitInstBits(raw_ostream &OS, const APInt &Bits) {326 for (unsigned I = 0; I < Bits.getNumWords(); ++I)327 OS << ((I > 0) ? ", " : "") << "UINT64_C(" << Bits.getRawData()[I] << ")";328}329 330void CodeEmitterGen::emitInstructionBaseValues(331 raw_ostream &O, ArrayRef<const CodeGenInstruction *> NumberedInstructions,332 unsigned HwMode) {333 if (HwMode == DefaultMode)334 O << " static const uint64_t InstBits[] = {\n";335 else336 O << " static const uint64_t InstBits_" << CGH.getModeName(HwMode)337 << "[] = {\n";338 339 for (const CodeGenInstruction *CGI : NumberedInstructions) {340 const Record *R = CGI->TheDef;341 const Record *EncodingDef = R;342 if (const Record *RV = R->getValueAsOptionalDef("EncodingInfos")) {343 EncodingInfoByHwMode EBM(RV, CGH);344 if (EBM.hasMode(HwMode)) {345 EncodingDef = EBM.get(HwMode);346 } else {347 // If the HwMode does not match, then Encoding '0'348 // should be generated.349 APInt Value(BitWidth, 0);350 O << " ";351 emitInstBits(O, Value);352 O << "," << '\t' << "// " << R->getName() << "\n";353 continue;354 }355 }356 const BitsInit *BI = EncodingDef->getValueAsBitsInit("Inst");357 358 // Start by filling in fixed values.359 APInt Value(BitWidth, 0);360 for (unsigned I = 0, E = BI->getNumBits(); I != E; ++I) {361 if (const auto *B = dyn_cast<BitInit>(BI->getBit(I)); B && B->getValue())362 Value.setBit(I);363 }364 O << " ";365 emitInstBits(O, Value);366 O << "," << '\t' << "// " << R->getName() << "\n";367 }368 O << " };\n";369}370 371void CodeEmitterGen::emitCaseMap(372 raw_ostream &O,373 const std::map<std::string, std::vector<std::string>> &CaseMap) {374 for (const auto &[Case, InstList] : CaseMap) {375 bool First = true;376 for (const auto &Inst : InstList) {377 if (!First)378 O << "\n";379 O << " case " << Inst << ":";380 First = false;381 }382 O << " {\n";383 O << Case;384 O << " break;\n"385 << " }\n";386 }387}388 389CodeEmitterGen::CodeEmitterGen(const RecordKeeper &RK)390 : RK(RK), Target(RK), CGH(Target.getHwModes()) {391 // For little-endian instruction bit encodings, reverse the bit order.392 Target.reverseBitsForLittleEndianEncoding();393}394 395void CodeEmitterGen::run(raw_ostream &O) {396 emitSourceFileHeader("Machine Code Emitter", O);397 398 ArrayRef<const CodeGenInstruction *> EncodedInstructions =399 Target.getTargetNonPseudoInstructions();400 401 if (Target.hasVariableLengthEncodings()) {402 emitVarLenCodeEmitter(RK, O);403 return;404 }405 // The set of HwModes used by instruction encodings.406 std::set<unsigned> HwModes;407 BitWidth = 0;408 for (const CodeGenInstruction *CGI : EncodedInstructions) {409 const Record *R = CGI->TheDef;410 if (const Record *RV = R->getValueAsOptionalDef("EncodingInfos")) {411 EncodingInfoByHwMode EBM(RV, CGH);412 for (const auto &[Key, Value] : EBM) {413 const BitsInit *BI = Value->getValueAsBitsInit("Inst");414 BitWidth = std::max(BitWidth, BI->getNumBits());415 HwModes.insert(Key);416 }417 continue;418 }419 const BitsInit *BI = R->getValueAsBitsInit("Inst");420 BitWidth = std::max(BitWidth, BI->getNumBits());421 }422 UseAPInt = BitWidth > 64;423 424 // Emit function declaration425 if (UseAPInt) {426 O << "void " << Target.getName()427 << "MCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,\n"428 << " SmallVectorImpl<MCFixup> &Fixups,\n"429 << " APInt &Inst,\n"430 << " APInt &Scratch,\n"431 << " const MCSubtargetInfo &STI) const {\n";432 } else {433 O << "uint64_t " << Target.getName();434 O << "MCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,\n"435 << " SmallVectorImpl<MCFixup> &Fixups,\n"436 << " const MCSubtargetInfo &STI) const {\n";437 }438 439 // Emit instruction base values440 emitInstructionBaseValues(O, EncodedInstructions, DefaultMode);441 if (!HwModes.empty()) {442 // Emit table for instrs whose encodings are controlled by HwModes.443 for (unsigned HwMode : HwModes) {444 if (HwMode == DefaultMode)445 continue;446 emitInstructionBaseValues(O, EncodedInstructions, HwMode);447 }448 449 // This pointer will be assigned to the HwMode table later.450 O << " const uint64_t *InstBitsByHw;\n";451 }452 453 // Map to accumulate all the cases.454 std::map<std::string, std::vector<std::string>> CaseMap;455 std::map<std::string, std::vector<std::string>> BitOffsetCaseMap;456 457 // Construct all cases statement for each opcode458 for (const CodeGenInstruction *CGI : EncodedInstructions) {459 const Record *R = CGI->TheDef;460 std::string InstName =461 (R->getValueAsString("Namespace") + "::" + R->getName()).str();462 std::string Case, BitOffsetCase;463 std::tie(Case, BitOffsetCase) = getInstructionCases(R);464 465 CaseMap[Case].push_back(InstName);466 BitOffsetCaseMap[BitOffsetCase].push_back(std::move(InstName));467 }468 469 unsigned FirstSupportedOpcode = EncodedInstructions.front()->EnumVal;470 O << " constexpr unsigned FirstSupportedOpcode = " << FirstSupportedOpcode471 << ";\n";472 O << R"(473 const unsigned opcode = MI.getOpcode();474 if (opcode < FirstSupportedOpcode)475 reportUnsupportedInst(MI);476 unsigned TableIndex = opcode - FirstSupportedOpcode;477)";478 479 // Emit initial function code480 if (UseAPInt) {481 int NumWords = APInt::getNumWords(BitWidth);482 O << " if (Scratch.getBitWidth() != " << BitWidth << ")\n"483 << " Scratch = Scratch.zext(" << BitWidth << ");\n"484 << " Inst = APInt(" << BitWidth << ", ArrayRef(InstBits + TableIndex * "485 << NumWords << ", " << NumWords << "));\n"486 << " APInt &Value = Inst;\n"487 << " APInt &op = Scratch;\n"488 << " switch (opcode) {\n";489 } else {490 O << " uint64_t Value = InstBits[TableIndex];\n"491 << " uint64_t op = 0;\n"492 << " (void)op; // suppress warning\n"493 << " switch (opcode) {\n";494 }495 496 // Emit each case statement497 emitCaseMap(O, CaseMap);498 499 // Default case: unhandled opcode.500 O << " default:\n"501 << " reportUnsupportedInst(MI);\n"502 << " }\n";503 if (UseAPInt)504 O << " Inst = Value;\n";505 else506 O << " return Value;\n";507 O << "}\n\n";508 509 O << "#ifdef GET_OPERAND_BIT_OFFSET\n"510 << "#undef GET_OPERAND_BIT_OFFSET\n\n"511 << "uint32_t " << Target.getName()512 << "MCCodeEmitter::getOperandBitOffset(const MCInst &MI,\n"513 << " unsigned OpNum,\n"514 << " const MCSubtargetInfo &STI) const {\n"515 << " switch (MI.getOpcode()) {\n";516 emitCaseMap(O, BitOffsetCaseMap);517 O << " default:\n"518 << " reportUnsupportedInst(MI);\n"519 << " }\n"520 << " reportUnsupportedOperand(MI, OpNum);\n"521 << "}\n\n"522 << "#endif // GET_OPERAND_BIT_OFFSET\n\n";523}524 525static TableGen::Emitter::OptClass<CodeEmitterGen>526 X("gen-emitter", "Generate machine code emitter");527