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1// RUN: mlir-opt %s --pass-pipeline="builtin.module(func.func(convert-arm-sme-to-llvm,cse,canonicalize))" -split-input-file | FileCheck %s2// Test conversion of ArmSME ops to LLVM intrinsics.3 4//===----------------------------------------------------------------------===//5// arm_sme.load_tile_slice6//===----------------------------------------------------------------------===//7 8// CHECK-LABEL: func.func @arm_sme_load_tile_slice_hor_i8(9// CHECK-SAME: %[[SRC:.*]]: memref<?x?xi8>,10// CHECK-SAME: %[[MASK:.*]]: vector<[16]xi1>,11// CHECK-SAME: %[[TILE_SLICE_INDEX:.*]]: index)12// CHECK: %[[C0:.*]] = arith.constant 0 : index13// CHECK: %[[MEM_DESC:.*]] = builtin.unrealized_conversion_cast %[[SRC]] : memref<?x?xi8> to !llvm.struct<(ptr, ptr, i64, array<2 x i64>, array<2 x i64>)>14// CHECK: %[[C0_I64:.*]] = builtin.unrealized_conversion_cast %[[C0]] : index to i6415// CHECK: %[[ALIGNED_BASE:.*]] = llvm.extractvalue %[[MEM_DESC]][1] : !llvm.struct<(ptr, ptr, i64, array<2 x i64>, array<2 x i64>)>16// CHECK: %[[STRIDE:.*]] = llvm.extractvalue %[[MEM_DESC]][4, 0] : !llvm.struct<(ptr, ptr, i64, array<2 x i64>, array<2 x i64>)>17// CHECK: %[[OFFSET:.*]] = llvm.mul %[[C0_I64]], %[[STRIDE]] : i6418// CHECK: %[[GEP:.*]] = llvm.getelementptr %[[ALIGNED_BASE]]{{\[}}%[[OFFSET]]] : (!llvm.ptr, i64) -> !llvm.ptr, i819// CHECK: %[[TILE_SLICE_INDEX_I32:.*]] = arith.index_castui %[[TILE_SLICE_INDEX]] : index to i3220// CHECK: "arm_sme.intr.ld1b.horiz"(%[[MASK]], %[[GEP]], %[[TILE_SLICE_INDEX_I32]]) <{tile_id = 0 : i32}> : (vector<[16]xi1>, !llvm.ptr, i32) -> ()21// CHECK: return22// CHECK: }23func.func @arm_sme_load_tile_slice_hor_i8(%src : memref<?x?xi8>, %mask : vector<[16]xi1>, %tile_slice_index : index) {24 %c0 = arith.constant 0 : index25 %tile = arm_sme.get_tile : vector<[16]x[16]xi8>26 %tile_update = arm_sme.load_tile_slice %src[%c0], %mask, %tile, %tile_slice_index : memref<?x?xi8>, vector<[16]xi1>, vector<[16]x[16]xi8>27 "test.some_use" (%tile_update) : (vector<[16]x[16]xi8>) -> ()28 return29}30 31// -----32 33// CHECK-LABEL: @arm_sme_load_tile_slice_hor_i1634// CHECK: "arm_sme.intr.ld1h.horiz"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xi1>, !llvm.ptr, i32) -> ()35func.func @arm_sme_load_tile_slice_hor_i16(%src : memref<?x?xi16>, %mask : vector<[8]xi1>, %tile_slice_index : index) {36 %c0 = arith.constant 0 : index37 %tile = arm_sme.get_tile : vector<[8]x[8]xi16>38 %tile_update = arm_sme.load_tile_slice %src[%c0], %mask, %tile, %tile_slice_index : memref<?x?xi16>, vector<[8]xi1>, vector<[8]x[8]xi16>39 "test.some_use" (%tile_update) : (vector<[8]x[8]xi16>) -> ()40 return41}42 43// -----44 45// CHECK-LABEL: @arm_sme_load_tile_slice_hor_i3246// CHECK: "arm_sme.intr.ld1w.horiz"({{.*}}) <{tile_id = 0 : i32}> : (vector<[4]xi1>, !llvm.ptr, i32) -> ()47func.func @arm_sme_load_tile_slice_hor_i32(%src : memref<?x?xi32>, %mask : vector<[4]xi1>, %tile_slice_index : index) {48 %c0 = arith.constant 0 : index49 %tile = arm_sme.get_tile : vector<[4]x[4]xi32>50 %tile_update = arm_sme.load_tile_slice %src[%c0], %mask, %tile, %tile_slice_index : memref<?x?xi32>, vector<[4]xi1>, vector<[4]x[4]xi32>51 "test.some_use" (%tile_update) : (vector<[4]x[4]xi32>) -> ()52 return53}54 55// -----56 57// CHECK-LABEL: @arm_sme_load_tile_slice_hor_i6458// CHECK: "arm_sme.intr.ld1d.horiz"({{.*}}) <{tile_id = 0 : i32}> : (vector<[2]xi1>, !llvm.ptr, i32) -> ()59func.func @arm_sme_load_tile_slice_hor_i64(%src : memref<?x?xi64>, %mask : vector<[2]xi1>, %tile_slice_index : index) {60 %c0 = arith.constant 0 : index61 %tile = arm_sme.get_tile : vector<[2]x[2]xi64>62 %tile_update = arm_sme.load_tile_slice %src[%c0], %mask, %tile, %tile_slice_index : memref<?x?xi64>, vector<[2]xi1>, vector<[2]x[2]xi64>63 "test.some_use" (%tile_update) : (vector<[2]x[2]xi64>) -> ()64 return65}66 67// -----68 69// CHECK-LABEL: @arm_sme_load_tile_slice_hor_i12870// CHECK: "arm_sme.intr.ld1q.horiz"({{.*}}) <{tile_id = 0 : i32}> : (vector<[1]xi1>, !llvm.ptr, i32) -> ()71func.func @arm_sme_load_tile_slice_hor_i128(%src : memref<?x?xi128>, %mask : vector<[1]xi1>, %tile_slice_index : index) {72 %c0 = arith.constant 0 : index73 %tile = arm_sme.get_tile : vector<[1]x[1]xi128>74 %tile_update = arm_sme.load_tile_slice %src[%c0], %mask, %tile, %tile_slice_index : memref<?x?xi128>, vector<[1]xi1>, vector<[1]x[1]xi128>75 "test.some_use" (%tile_update) : (vector<[1]x[1]xi128>) -> ()76 return77}78 79// -----80 81// CHECK-LABEL: @arm_sme_load_tile_slice_hor_f1682// CHECK: "arm_sme.intr.ld1h.horiz"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xi1>, !llvm.ptr, i32) -> ()83func.func @arm_sme_load_tile_slice_hor_f16(%src : memref<?x?xf16>, %mask : vector<[8]xi1>, %tile_slice_index : index) {84 %c0 = arith.constant 0 : index85 %tile = arm_sme.get_tile : vector<[8]x[8]xf16>86 %tile_update = arm_sme.load_tile_slice %src[%c0], %mask, %tile, %tile_slice_index : memref<?x?xf16>, vector<[8]xi1>, vector<[8]x[8]xf16>87 "test.some_use" (%tile_update) : (vector<[8]x[8]xf16>) -> ()88 return89}90 91// -----92 93// CHECK-LABEL: @arm_sme_load_tile_slice_hor_bf1694// CHECK: "arm_sme.intr.ld1h.horiz"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xi1>, !llvm.ptr, i32) -> ()95func.func @arm_sme_load_tile_slice_hor_bf16(%src : memref<?x?xbf16>, %mask : vector<[8]xi1>, %tile_slice_index : index) {96 %c0 = arith.constant 0 : index97 %tile = arm_sme.get_tile : vector<[8]x[8]xbf16>98 %tile_update = arm_sme.load_tile_slice %src[%c0], %mask, %tile, %tile_slice_index : memref<?x?xbf16>, vector<[8]xi1>, vector<[8]x[8]xbf16>99 "test.some_use" (%tile_update) : (vector<[8]x[8]xbf16>) -> ()100 return101}102 103// -----104 105// CHECK-LABEL: @arm_sme_load_tile_slice_hor_f32106// CHECK: "arm_sme.intr.ld1w.horiz"({{.*}}) <{tile_id = 0 : i32}> : (vector<[4]xi1>, !llvm.ptr, i32) -> ()107func.func @arm_sme_load_tile_slice_hor_f32(%src : memref<?x?xf32>, %mask : vector<[4]xi1>, %tile_slice_index : index) {108 %c0 = arith.constant 0 : index109 %tile = arm_sme.get_tile : vector<[4]x[4]xf32>110 %tile_update = arm_sme.load_tile_slice %src[%c0], %mask, %tile, %tile_slice_index : memref<?x?xf32>, vector<[4]xi1>, vector<[4]x[4]xf32>111 "test.some_use" (%tile_update) : (vector<[4]x[4]xf32>) -> ()112 return113}114 115// -----116 117// CHECK-LABEL: @arm_sme_load_tile_slice_hor_f64118// CHECK: "arm_sme.intr.ld1d.horiz"({{.*}}) <{tile_id = 0 : i32}> : (vector<[2]xi1>, !llvm.ptr, i32) -> ()119func.func @arm_sme_load_tile_slice_hor_f64(%src : memref<?x?xf64>, %mask : vector<[2]xi1>, %tile_slice_index : index) {120 %c0 = arith.constant 0 : index121 %tile = arm_sme.get_tile : vector<[2]x[2]xf64>122 %tile_update = arm_sme.load_tile_slice %src[%c0], %mask, %tile, %tile_slice_index : memref<?x?xf64>, vector<[2]xi1>, vector<[2]x[2]xf64>123 "test.some_use" (%tile_update) : (vector<[2]x[2]xf64>) -> ()124 return125}126 127// -----128 129// CHECK-LABEL: @arm_sme_load_tile_slice_ver_i8130// CHECK: "arm_sme.intr.ld1b.vert"({{.*}}) <{tile_id = 0 : i32}> : (vector<[16]xi1>, !llvm.ptr, i32) -> ()131func.func @arm_sme_load_tile_slice_ver_i8(%src : memref<?x?xi8>, %mask : vector<[16]xi1>, %tile_slice_index : index) {132 %c0 = arith.constant 0 : index133 %tile = arm_sme.get_tile : vector<[16]x[16]xi8>134 %tile_update = arm_sme.load_tile_slice %src[%c0], %mask, %tile, %tile_slice_index layout<vertical> : memref<?x?xi8>, vector<[16]xi1>, vector<[16]x[16]xi8>135 "test.some_use" (%tile_update) : (vector<[16]x[16]xi8>) -> ()136 return137}138 139// -----140 141// CHECK-LABEL: @arm_sme_load_tile_slice_ver_i16142// CHECK: "arm_sme.intr.ld1h.vert"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xi1>, !llvm.ptr, i32) -> ()143func.func @arm_sme_load_tile_slice_ver_i16(%src : memref<?x?xi16>, %mask : vector<[8]xi1>, %tile_slice_index : index) {144 %c0 = arith.constant 0 : index145 %tile = arm_sme.get_tile : vector<[8]x[8]xi16>146 %tile_update = arm_sme.load_tile_slice %src[%c0], %mask, %tile, %tile_slice_index layout<vertical> : memref<?x?xi16>, vector<[8]xi1>, vector<[8]x[8]xi16>147 "test.some_use" (%tile_update) : (vector<[8]x[8]xi16>) -> ()148 return149}150 151// -----152 153// CHECK-LABEL: @arm_sme_load_tile_slice_ver_i32154// CHECK: "arm_sme.intr.ld1w.vert"({{.*}}) <{tile_id = 0 : i32}> : (vector<[4]xi1>, !llvm.ptr, i32) -> ()155func.func @arm_sme_load_tile_slice_ver_i32(%src : memref<?x?xi32>, %mask : vector<[4]xi1>, %tile_slice_index : index) {156 %c0 = arith.constant 0 : index157 %tile = arm_sme.get_tile : vector<[4]x[4]xi32>158 %tile_update = arm_sme.load_tile_slice %src[%c0], %mask, %tile, %tile_slice_index layout<vertical> : memref<?x?xi32>, vector<[4]xi1>, vector<[4]x[4]xi32>159 "test.some_use" (%tile_update) : (vector<[4]x[4]xi32>) -> ()160 return161}162 163// -----164 165// CHECK-LABEL: @arm_sme_load_tile_slice_ver_i64166// CHECK: "arm_sme.intr.ld1d.vert"({{.*}}) <{tile_id = 0 : i32}> : (vector<[2]xi1>, !llvm.ptr, i32) -> ()167func.func @arm_sme_load_tile_slice_ver_i64(%src : memref<?x?xi64>, %mask : vector<[2]xi1>, %tile_slice_index : index) {168 %c0 = arith.constant 0 : index169 %tile = arm_sme.get_tile : vector<[2]x[2]xi64>170 %tile_update = arm_sme.load_tile_slice %src[%c0], %mask, %tile, %tile_slice_index layout<vertical> : memref<?x?xi64>, vector<[2]xi1>, vector<[2]x[2]xi64>171 "test.some_use" (%tile_update) : (vector<[2]x[2]xi64>) -> ()172 return173}174 175// -----176 177// CHECK-LABEL: @arm_sme_load_tile_slice_ver_i128178// CHECK: "arm_sme.intr.ld1q.vert"({{.*}}) <{tile_id = 0 : i32}> : (vector<[1]xi1>, !llvm.ptr, i32) -> ()179func.func @arm_sme_load_tile_slice_ver_i128(%src : memref<?x?xi128>, %mask : vector<[1]xi1>, %tile_slice_index : index) {180 %c0 = arith.constant 0 : index181 %tile = arm_sme.get_tile : vector<[1]x[1]xi128>182 %tile_update = arm_sme.load_tile_slice %src[%c0], %mask, %tile, %tile_slice_index layout<vertical> : memref<?x?xi128>, vector<[1]xi1>, vector<[1]x[1]xi128>183 "test.some_use" (%tile_update) : (vector<[1]x[1]xi128>) -> ()184 return185}186 187// -----188 189// CHECK-LABEL: @arm_sme_load_tile_slice_ver_f16190// CHECK: "arm_sme.intr.ld1h.vert"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xi1>, !llvm.ptr, i32) -> ()191func.func @arm_sme_load_tile_slice_ver_f16(%src : memref<?x?xf16>, %mask : vector<[8]xi1>, %tile_slice_index : index) {192 %c0 = arith.constant 0 : index193 %tile = arm_sme.get_tile : vector<[8]x[8]xf16>194 %tile_update = arm_sme.load_tile_slice %src[%c0], %mask, %tile, %tile_slice_index layout<vertical> : memref<?x?xf16>, vector<[8]xi1>, vector<[8]x[8]xf16>195 "test.some_use" (%tile_update) : (vector<[8]x[8]xf16>) -> ()196 return197}198 199// -----200 201// CHECK-LABEL: @arm_sme_load_tile_slice_ver_bf16202// CHECK: "arm_sme.intr.ld1h.vert"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xi1>, !llvm.ptr, i32) -> ()203func.func @arm_sme_load_tile_slice_ver_bf16(%src : memref<?x?xbf16>, %mask : vector<[8]xi1>, %tile_slice_index : index) {204 %c0 = arith.constant 0 : index205 %tile = arm_sme.get_tile : vector<[8]x[8]xbf16>206 %tile_update = arm_sme.load_tile_slice %src[%c0], %mask, %tile, %tile_slice_index layout<vertical> : memref<?x?xbf16>, vector<[8]xi1>, vector<[8]x[8]xbf16>207 "test.some_use" (%tile_update) : (vector<[8]x[8]xbf16>) -> ()208 return209}210 211// -----212 213// CHECK-LABEL: @arm_sme_load_tile_slice_ver_f32214// CHECK: "arm_sme.intr.ld1w.vert"({{.*}}) <{tile_id = 0 : i32}> : (vector<[4]xi1>, !llvm.ptr, i32) -> ()215func.func @arm_sme_load_tile_slice_ver_f32(%src : memref<?x?xf32>, %mask : vector<[4]xi1>, %tile_slice_index : index) {216 %c0 = arith.constant 0 : index217 %tile = arm_sme.get_tile : vector<[4]x[4]xf32>218 %tile_update = arm_sme.load_tile_slice %src[%c0], %mask, %tile, %tile_slice_index layout<vertical> : memref<?x?xf32>, vector<[4]xi1>, vector<[4]x[4]xf32>219 "test.some_use" (%tile_update) : (vector<[4]x[4]xf32>) -> ()220 return221}222 223// -----224 225// CHECK-LABEL: @arm_sme_load_tile_slice_ver_f64226// CHECK: "arm_sme.intr.ld1d.vert"({{.*}}) <{tile_id = 0 : i32}> : (vector<[2]xi1>, !llvm.ptr, i32) -> ()227func.func @arm_sme_load_tile_slice_ver_f64(%src : memref<?x?xf64>, %mask : vector<[2]xi1>, %tile_slice_index : index) {228 %c0 = arith.constant 0 : index229 %tile = arm_sme.get_tile : vector<[2]x[2]xf64>230 %tile_update = arm_sme.load_tile_slice %src[%c0], %mask, %tile, %tile_slice_index layout<vertical> : memref<?x?xf64>, vector<[2]xi1>, vector<[2]x[2]xf64>231 "test.some_use" (%tile_update) : (vector<[2]x[2]xf64>) -> ()232 return233}234 235//===----------------------------------------------------------------------===//236// arm_sme.store_tile_slice237//===----------------------------------------------------------------------===//238 239// -----240 241// CHECK-LABEL: func.func @arm_sme_store_tile_slice_hor_i8(242// CHECK-SAME: %[[TILE_SLICE_INDEX:.*]]: index,243// CHECK-SAME: %[[MASK:.*]]: vector<[16]xi1>,244// CHECK-SAME: %[[DEST:.*]]: memref<?x?xi8>)245// CHECK: %[[C0:.*]] = arith.constant 0 : index246// CHECK: %[[MEM_DESC:.*]] = builtin.unrealized_conversion_cast %[[DEST]] : memref<?x?xi8> to !llvm.struct<(ptr, ptr, i64, array<2 x i64>, array<2 x i64>)>247// CHECK: %[[C0_I64:.*]] = builtin.unrealized_conversion_cast %[[C0]] : index to i64248// CHECK: %[[ALIGNED_BASE:.*]] = llvm.extractvalue %[[MEM_DESC]][1] : !llvm.struct<(ptr, ptr, i64, array<2 x i64>, array<2 x i64>)>249// CHECK: %[[STRIDE:.*]] = llvm.extractvalue %[[MEM_DESC]][4, 0] : !llvm.struct<(ptr, ptr, i64, array<2 x i64>, array<2 x i64>)>250// CHECK: %[[OFFSET:.*]] = llvm.mul %[[C0_I64]], %[[STRIDE]] : i64251// CHECK: %[[GEP:.*]] = llvm.getelementptr %[[ALIGNED_BASE]]{{\[}}%[[OFFSET]]] : (!llvm.ptr, i64) -> !llvm.ptr, i8252// CHECK: %[[TILE_SLICE_INDEX_I32:.*]] = arith.index_castui %[[TILE_SLICE_INDEX]] : index to i32253// CHECK: "arm_sme.intr.st1b.horiz"(%[[MASK]], %[[GEP]], %[[TILE_SLICE_INDEX_I32]]) <{tile_id = 0 : i32}> : (vector<[16]xi1>, !llvm.ptr, i32) -> ()254// CHECK: return255// CHECK: }256func.func @arm_sme_store_tile_slice_hor_i8(%tile_slice_index : index, %mask : vector<[16]xi1>, %dest : memref<?x?xi8>) -> () {257 %c0 = arith.constant 0 : index258 %tile = arm_sme.get_tile : vector<[16]x[16]xi8>259 arm_sme.store_tile_slice %tile, %tile_slice_index, %mask, %dest[%c0] : memref<?x?xi8>, vector<[16]xi1>, vector<[16]x[16]xi8>260 return261}262 263// -----264 265// CHECK-LABEL: @arm_sme_store_tile_slice_hor_i16266// CHECK: "arm_sme.intr.st1h.horiz"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xi1>, !llvm.ptr, i32) -> ()267func.func @arm_sme_store_tile_slice_hor_i16(%tile_slice_index : index, %mask : vector<[8]xi1>, %dest : memref<?x?xi16>) -> () {268 %c0 = arith.constant 0 : index269 %tile = arm_sme.get_tile : vector<[8]x[8]xi16>270 arm_sme.store_tile_slice %tile, %tile_slice_index, %mask, %dest[%c0] : memref<?x?xi16>, vector<[8]xi1>, vector<[8]x[8]xi16>271 return272}273 274// -----275 276// CHECK-LABEL: @arm_sme_store_tile_slice_hor_i32277// CHECK: "arm_sme.intr.st1w.horiz"({{.*}}) <{tile_id = 0 : i32}> : (vector<[4]xi1>, !llvm.ptr, i32) -> ()278func.func @arm_sme_store_tile_slice_hor_i32(%tile_slice_index : index, %mask : vector<[4]xi1>, %dest : memref<?x?xi32>) -> () {279 %c0 = arith.constant 0 : index280 %tile = arm_sme.get_tile : vector<[4]x[4]xi32>281 arm_sme.store_tile_slice %tile, %tile_slice_index, %mask, %dest[%c0] : memref<?x?xi32>, vector<[4]xi1>, vector<[4]x[4]xi32>282 return283}284 285// -----286 287// CHECK-LABEL: @arm_sme_store_tile_slice_hor_i64288// CHECK: "arm_sme.intr.st1d.horiz"({{.*}}) <{tile_id = 0 : i32}> : (vector<[2]xi1>, !llvm.ptr, i32) -> ()289func.func @arm_sme_store_tile_slice_hor_i64(%tile_slice_index : index, %mask : vector<[2]xi1>, %dest : memref<?x?xi64>) -> () {290 %c0 = arith.constant 0 : index291 %tile = arm_sme.get_tile : vector<[2]x[2]xi64>292 arm_sme.store_tile_slice %tile, %tile_slice_index, %mask, %dest[%c0] : memref<?x?xi64>, vector<[2]xi1>, vector<[2]x[2]xi64>293 return294}295 296// -----297 298// CHECK-LABEL: @arm_sme_store_tile_slice_hor_i128299// CHECK: "arm_sme.intr.st1q.horiz"({{.*}}) <{tile_id = 0 : i32}> : (vector<[1]xi1>, !llvm.ptr, i32) -> ()300func.func @arm_sme_store_tile_slice_hor_i128(%tile_slice_index : index, %mask : vector<[1]xi1>, %dest : memref<?x?xi128>) -> () {301 %c0 = arith.constant 0 : index302 %tile = arm_sme.get_tile : vector<[1]x[1]xi128>303 arm_sme.store_tile_slice %tile, %tile_slice_index, %mask, %dest[%c0] : memref<?x?xi128>, vector<[1]xi1>, vector<[1]x[1]xi128>304 return305}306 307// -----308 309// CHECK-LABEL: @arm_sme_store_tile_slice_hor_f16310// CHECK: "arm_sme.intr.st1h.horiz"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xi1>, !llvm.ptr, i32) -> ()311func.func @arm_sme_store_tile_slice_hor_f16(%tile_slice_index : index, %mask : vector<[8]xi1>, %dest : memref<?x?xf16>) -> () {312 %c0 = arith.constant 0 : index313 %tile = arm_sme.get_tile : vector<[8]x[8]xf16>314 arm_sme.store_tile_slice %tile, %tile_slice_index, %mask, %dest[%c0] : memref<?x?xf16>, vector<[8]xi1>, vector<[8]x[8]xf16>315 return316}317 318// -----319 320// CHECK-LABEL: @arm_sme_store_tile_slice_hor_bf16321// CHECK: "arm_sme.intr.st1h.horiz"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xi1>, !llvm.ptr, i32) -> ()322func.func @arm_sme_store_tile_slice_hor_bf16(%tile_slice_index : index, %mask : vector<[8]xi1>, %dest : memref<?x?xbf16>) -> () {323 %c0 = arith.constant 0 : index324 %tile = arm_sme.get_tile : vector<[8]x[8]xbf16>325 arm_sme.store_tile_slice %tile, %tile_slice_index, %mask, %dest[%c0] : memref<?x?xbf16>, vector<[8]xi1>, vector<[8]x[8]xbf16>326 return327}328 329// -----330 331// CHECK-LABEL: @arm_sme_store_tile_slice_hor_f32332// CHECK: "arm_sme.intr.st1w.horiz"({{.*}}) <{tile_id = 0 : i32}> : (vector<[4]xi1>, !llvm.ptr, i32) -> ()333func.func @arm_sme_store_tile_slice_hor_f32(%tile_slice_index : index, %mask : vector<[4]xi1>, %dest : memref<?x?xf32>) -> () {334 %c0 = arith.constant 0 : index335 %tile = arm_sme.get_tile : vector<[4]x[4]xf32>336 arm_sme.store_tile_slice %tile, %tile_slice_index, %mask, %dest[%c0] : memref<?x?xf32>, vector<[4]xi1>, vector<[4]x[4]xf32>337 return338}339 340// -----341 342// CHECK-LABEL: @arm_sme_store_tile_slice_hor_f64343// CHECK: "arm_sme.intr.st1d.horiz"({{.*}}) <{tile_id = 0 : i32}> : (vector<[2]xi1>, !llvm.ptr, i32) -> ()344func.func @arm_sme_store_tile_slice_hor_f64(%tile_slice_index : index, %mask : vector<[2]xi1>, %dest : memref<?x?xf64>) -> () {345 %c0 = arith.constant 0 : index346 %tile = arm_sme.get_tile : vector<[2]x[2]xf64>347 arm_sme.store_tile_slice %tile, %tile_slice_index, %mask, %dest[%c0] : memref<?x?xf64>, vector<[2]xi1>, vector<[2]x[2]xf64>348 return349}350 351// -----352 353// CHECK-LABEL: @arm_sme_store_tile_slice_ver_i8354// CHECK: "arm_sme.intr.st1b.vert"({{.*}}) <{tile_id = 0 : i32}> : (vector<[16]xi1>, !llvm.ptr, i32) -> ()355func.func @arm_sme_store_tile_slice_ver_i8(%tile_slice_index : index, %mask : vector<[16]xi1>, %dest : memref<?x?xi8>) -> () {356 %c0 = arith.constant 0 : index357 %tile = arm_sme.get_tile : vector<[16]x[16]xi8>358 arm_sme.store_tile_slice %tile, %tile_slice_index, %mask, %dest[%c0] layout<vertical> : memref<?x?xi8>, vector<[16]xi1>, vector<[16]x[16]xi8>359 return360}361 362// -----363 364// CHECK-LABEL: @arm_sme_store_tile_slice_ver_i16365// CHECK: "arm_sme.intr.st1h.vert"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xi1>, !llvm.ptr, i32) -> ()366func.func @arm_sme_store_tile_slice_ver_i16(%tile_slice_index : index, %mask : vector<[8]xi1>, %dest : memref<?x?xi16>) -> () {367 %c0 = arith.constant 0 : index368 %tile = arm_sme.get_tile : vector<[8]x[8]xi16>369 arm_sme.store_tile_slice %tile, %tile_slice_index, %mask, %dest[%c0] layout<vertical> : memref<?x?xi16>, vector<[8]xi1>, vector<[8]x[8]xi16>370 return371}372 373// -----374 375// CHECK-LABEL: @arm_sme_store_tile_slice_ver_i32376// CHECK: "arm_sme.intr.st1w.vert"({{.*}}) <{tile_id = 0 : i32}> : (vector<[4]xi1>, !llvm.ptr, i32) -> ()377func.func @arm_sme_store_tile_slice_ver_i32(%tile_slice_index : index, %mask : vector<[4]xi1>, %dest : memref<?x?xi32>) -> () {378 %c0 = arith.constant 0 : index379 %tile = arm_sme.get_tile : vector<[4]x[4]xi32>380 arm_sme.store_tile_slice %tile, %tile_slice_index, %mask, %dest[%c0] layout<vertical> : memref<?x?xi32>, vector<[4]xi1>, vector<[4]x[4]xi32>381 return382}383 384// -----385 386// CHECK-LABEL: @arm_sme_store_tile_slice_ver_i64387// CHECK: "arm_sme.intr.st1d.vert"({{.*}}) <{tile_id = 0 : i32}> : (vector<[2]xi1>, !llvm.ptr, i32) -> ()388func.func @arm_sme_store_tile_slice_ver_i64(%tile_slice_index : index, %mask : vector<[2]xi1>, %dest : memref<?x?xi64>) -> () {389 %c0 = arith.constant 0 : index390 %tile = arm_sme.get_tile : vector<[2]x[2]xi64>391 arm_sme.store_tile_slice %tile, %tile_slice_index, %mask, %dest[%c0] layout<vertical> : memref<?x?xi64>, vector<[2]xi1>, vector<[2]x[2]xi64>392 return393}394 395// -----396 397// CHECK-LABEL: @arm_sme_store_tile_slice_ver_i128398// CHECK: "arm_sme.intr.st1q.vert"({{.*}}) <{tile_id = 0 : i32}> : (vector<[1]xi1>, !llvm.ptr, i32) -> ()399func.func @arm_sme_store_tile_slice_ver_i128(%tile_slice_index : index, %mask : vector<[1]xi1>, %dest : memref<?x?xi128>) -> () {400 %c0 = arith.constant 0 : index401 %tile = arm_sme.get_tile : vector<[1]x[1]xi128>402 arm_sme.store_tile_slice %tile, %tile_slice_index, %mask, %dest[%c0] layout<vertical> : memref<?x?xi128>, vector<[1]xi1>, vector<[1]x[1]xi128>403 return404}405 406// -----407 408// CHECK-LABEL: @arm_sme_store_tile_slice_ver_f16409// CHECK: "arm_sme.intr.st1h.vert"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xi1>, !llvm.ptr, i32) -> ()410func.func @arm_sme_store_tile_slice_ver_f16(%tile_slice_index : index, %mask : vector<[8]xi1>, %dest : memref<?x?xf16>) -> () {411 %c0 = arith.constant 0 : index412 %tile = arm_sme.get_tile : vector<[8]x[8]xf16>413 arm_sme.store_tile_slice %tile, %tile_slice_index, %mask, %dest[%c0] layout<vertical> : memref<?x?xf16>, vector<[8]xi1>, vector<[8]x[8]xf16>414 return415}416 417// -----418 419// CHECK-LABEL: @arm_sme_store_tile_slice_ver_bf16420// CHECK: "arm_sme.intr.st1h.vert"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xi1>, !llvm.ptr, i32) -> ()421func.func @arm_sme_store_tile_slice_ver_bf16(%tile_slice_index : index, %mask : vector<[8]xi1>, %dest : memref<?x?xbf16>) -> () {422 %c0 = arith.constant 0 : index423 %tile = arm_sme.get_tile : vector<[8]x[8]xbf16>424 arm_sme.store_tile_slice %tile, %tile_slice_index, %mask, %dest[%c0] layout<vertical> : memref<?x?xbf16>, vector<[8]xi1>, vector<[8]x[8]xbf16>425 return426}427 428// -----429 430// CHECK-LABEL: @arm_sme_store_tile_slice_ver_f32431// CHECK: "arm_sme.intr.st1w.vert"({{.*}}) <{tile_id = 0 : i32}> : (vector<[4]xi1>, !llvm.ptr, i32) -> ()432func.func @arm_sme_store_tile_slice_ver_f32(%tile_slice_index : index, %mask : vector<[4]xi1>, %dest : memref<?x?xf32>) -> () {433 %c0 = arith.constant 0 : index434 %tile = arm_sme.get_tile : vector<[4]x[4]xf32>435 arm_sme.store_tile_slice %tile, %tile_slice_index, %mask, %dest[%c0] layout<vertical> : memref<?x?xf32>, vector<[4]xi1>, vector<[4]x[4]xf32>436 return437}438 439// -----440 441// CHECK-LABEL: @arm_sme_store_tile_slice_ver_f64442// CHECK: "arm_sme.intr.st1d.vert"({{.*}}) <{tile_id = 0 : i32}> : (vector<[2]xi1>, !llvm.ptr, i32) -> ()443func.func @arm_sme_store_tile_slice_ver_f64(%tile_slice_index : index, %mask : vector<[2]xi1>, %dest : memref<?x?xf64>) -> () {444 %c0 = arith.constant 0 : index445 %tile = arm_sme.get_tile : vector<[2]x[2]xf64>446 arm_sme.store_tile_slice %tile, %tile_slice_index, %mask, %dest[%c0] layout<vertical> : memref<?x?xf64>, vector<[2]xi1>, vector<[2]x[2]xf64>447 return448}449 450//===----------------------------------------------------------------------===//451// arm_sme.insert_tile_slice452//===----------------------------------------------------------------------===//453 454// -----455 456// CHECK-LABEL: @arm_sme_insert_tile_slice_hor_i32457// CHECK: "arm_sme.intr.write.horiz"({{.*}}) <{tile_id = 0 : i32}> : (i32, vector<[4]xi1>, vector<[4]xi32>) -> ()458func.func @arm_sme_insert_tile_slice_hor_i32(%vector : vector<[4]xi32>, %tile_slice_index : index) -> () {459 %c0 = arith.constant 0 : index460 %tile = arm_sme.get_tile : vector<[4]x[4]xi32>461 %tile_update = arm_sme.insert_tile_slice %vector, %tile[%tile_slice_index] : vector<[4]xi32> into vector<[4]x[4]xi32>462 "test.some_use" (%tile_update) : (vector<[4]x[4]xi32>) -> ()463 return464}465 466// -----467 468// CHECK-LABEL: @arm_sme_insert_tile_slice_ver_bf16469// CHECK: "arm_sme.intr.write.vert"({{.*}}) <{tile_id = 0 : i32}> : (i32, vector<[8]xi1>, vector<[8]xbf16>) -> ()470func.func @arm_sme_insert_tile_slice_ver_bf16(%vector : vector<[8]xbf16>, %tile_slice_index : index) -> () {471 %c0 = arith.constant 0 : index472 %tile = arm_sme.get_tile : vector<[8]x[8]xbf16>473 %tile_update = arm_sme.insert_tile_slice %vector, %tile[%tile_slice_index] layout<vertical> : vector<[8]xbf16> into vector<[8]x[8]xbf16>474 "test.some_use" (%tile_update) : (vector<[8]x[8]xbf16>) -> ()475 return476}477 478//===----------------------------------------------------------------------===//479// arm_sme.extract_tile_slice480//===----------------------------------------------------------------------===//481 482// -----483 484// CHECK-LABEL: @arm_sme_extract_tile_slice_i8485// CHECK: "arm_sme.intr.read.horiz"({{.*}}) <{tile_id = 0 : i32}> : (vector<[16]xi8>, vector<[16]xi1>, i32) -> vector<[16]xi8>486func.func @arm_sme_extract_tile_slice_i8(%tile_slice_index : index) -> vector<[16]xi8> {487 %tile = arm_sme.get_tile : vector<[16]x[16]xi8>488 %slice = arm_sme.extract_tile_slice %tile[%tile_slice_index] : vector<[16]xi8> from vector<[16]x[16]xi8>489 return %slice : vector<[16]xi8>490}491 492// -----493 494// CHECK-LABEL: @arm_sme_extract_tile_slice_i16495// CHECK: "arm_sme.intr.read.horiz"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xi16>, vector<[8]xi1>, i32) -> vector<[8]xi16>496func.func @arm_sme_extract_tile_slice_i16(%tile_slice_index : index) -> vector<[8]xi16> {497 %tile = arm_sme.get_tile : vector<[8]x[8]xi16>498 %slice = arm_sme.extract_tile_slice %tile[%tile_slice_index] : vector<[8]xi16> from vector<[8]x[8]xi16>499 return %slice : vector<[8]xi16>500}501 502// -----503 504// CHECK-LABEL: @arm_sme_extract_tile_slice_i32505// CHECK: "arm_sme.intr.read.horiz"({{.*}}) <{tile_id = 0 : i32}> : (vector<[4]xi32>, vector<[4]xi1>, i32) -> vector<[4]xi32>506func.func @arm_sme_extract_tile_slice_i32(%tile_slice_index : index) -> vector<[4]xi32> {507 %tile = arm_sme.get_tile : vector<[4]x[4]xi32>508 %slice = arm_sme.extract_tile_slice %tile[%tile_slice_index] : vector<[4]xi32> from vector<[4]x[4]xi32>509 return %slice : vector<[4]xi32>510}511 512// -----513 514// CHECK-LABEL: @arm_sme_extract_tile_slice_i64515// CHECK: "arm_sme.intr.read.horiz"({{.*}}) <{tile_id = 0 : i32}> : (vector<[2]xi64>, vector<[2]xi1>, i32) -> vector<[2]xi64>516func.func @arm_sme_extract_tile_slice_i64(%tile_slice_index : index) -> vector<[2]xi64> {517 %tile = arm_sme.get_tile : vector<[2]x[2]xi64>518 %slice = arm_sme.extract_tile_slice %tile[%tile_slice_index] : vector<[2]xi64> from vector<[2]x[2]xi64>519 return %slice : vector<[2]xi64>520}521 522// -----523 524// CHECK-LABEL: @arm_sme_extract_tile_slice_i128525// CHECK: "arm_sme.intr.read.horiz"({{.*}}) <{tile_id = 0 : i32}> : (vector<[1]xi128>, vector<[1]xi1>, i32) -> vector<[1]xi128>526func.func @arm_sme_extract_tile_slice_i128(%tile_slice_index : index) -> vector<[1]xi128> {527 %tile = arm_sme.get_tile : vector<[1]x[1]xi128>528 %slice = arm_sme.extract_tile_slice %tile[%tile_slice_index] : vector<[1]xi128> from vector<[1]x[1]xi128>529 return %slice : vector<[1]xi128>530}531 532// -----533 534// CHECK-LABEL: @arm_sme_extract_tile_slice_f16535// CHECK: "arm_sme.intr.read.horiz"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xf16>, vector<[8]xi1>, i32) -> vector<[8]xf16>536func.func @arm_sme_extract_tile_slice_f16(%tile_slice_index : index) -> vector<[8]xf16> {537 %tile = arm_sme.get_tile : vector<[8]x[8]xf16>538 %slice = arm_sme.extract_tile_slice %tile[%tile_slice_index] : vector<[8]xf16> from vector<[8]x[8]xf16>539 return %slice : vector<[8]xf16>540}541 542// -----543 544// CHECK-LABEL: @arm_sme_extract_tile_slice_bf16545// CHECK: "arm_sme.intr.read.horiz"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xbf16>, vector<[8]xi1>, i32) -> vector<[8]xbf16>546func.func @arm_sme_extract_tile_slice_bf16(%tile_slice_index : index) -> vector<[8]xbf16> {547 %tile = arm_sme.get_tile : vector<[8]x[8]xbf16>548 %slice = arm_sme.extract_tile_slice %tile[%tile_slice_index] : vector<[8]xbf16> from vector<[8]x[8]xbf16>549 return %slice : vector<[8]xbf16>550}551 552// -----553 554// CHECK-LABEL: @arm_sme_extract_tile_slice_f32555// CHECK: "arm_sme.intr.read.horiz"({{.*}}) <{tile_id = 0 : i32}> : (vector<[4]xf32>, vector<[4]xi1>, i32) -> vector<[4]xf32>556func.func @arm_sme_extract_tile_slice_f32(%tile_slice_index : index) -> vector<[4]xf32> {557 %tile = arm_sme.get_tile : vector<[4]x[4]xf32>558 %slice = arm_sme.extract_tile_slice %tile[%tile_slice_index] : vector<[4]xf32> from vector<[4]x[4]xf32>559 return %slice : vector<[4]xf32>560}561 562// -----563 564// CHECK-LABEL: @arm_sme_extract_tile_slice_f64565// CHECK: "arm_sme.intr.read.horiz"({{.*}}) <{tile_id = 0 : i32}> : (vector<[2]xf64>, vector<[2]xi1>, i32) -> vector<[2]xf64>566func.func @arm_sme_extract_tile_slice_f64(%tile_slice_index : index) -> vector<[2]xf64> {567 %tile = arm_sme.get_tile : vector<[2]x[2]xf64>568 %slice = arm_sme.extract_tile_slice %tile[%tile_slice_index] : vector<[2]xf64> from vector<[2]x[2]xf64>569 return %slice : vector<[2]xf64>570}571 572// -----573 574// CHECK-LABEL: @arm_sme_extract_tile_slice_ver_i128575// CHECK: "arm_sme.intr.read.vert"({{.*}}) <{tile_id = 0 : i32}> : (vector<[1]xi128>, vector<[1]xi1>, i32) -> vector<[1]xi128>576func.func @arm_sme_extract_tile_slice_ver_i128(%tile_slice_index : index) -> vector<[1]xi128> {577 %tile = arm_sme.get_tile : vector<[1]x[1]xi128>578 %slice = arm_sme.extract_tile_slice %tile[%tile_slice_index] layout<vertical> : vector<[1]xi128> from vector<[1]x[1]xi128>579 return %slice : vector<[1]xi128>580}581 582//===----------------------------------------------------------------------===//583// arm_sme.streaming_vl584//===----------------------------------------------------------------------===//585 586// -----587 588// CHECK-LABEL: @arm_sme_streaming_vl_bytes589// CHECK: %[[CONST:.*]] = arith.constant 8 : index590// CHECK: %[[CNTSD:.*]] = "arm_sme.intr.cntsd"() : () -> i64591// CHECK: %[[CNTSD_IDX:.*]] = arith.index_cast %[[CNTSD]] : i64 to index592// CHECK: %[[MUL:.*]] = arith.muli %[[CNTSD_IDX]], %[[CONST]] : index593func.func @arm_sme_streaming_vl_bytes() -> index {594 %svl_b = arm_sme.streaming_vl <byte>595 return %svl_b : index596}597 598// -----599 600// CHECK-LABEL: @arm_sme_streaming_vl_half_words601// CHECK: %[[CONST:.*]] = arith.constant 4 : index602// CHECK: %[[CNTSD:.*]] = "arm_sme.intr.cntsd"() : () -> i64603// CHECK: %[[CNTSD_IDX:.*]] = arith.index_cast %[[CNTSD]] : i64 to index604// CHECK: %[[MUL:.*]] = arith.muli %[[CNTSD_IDX]], %[[CONST]] : index605func.func @arm_sme_streaming_vl_half_words() -> index {606 %svl_h = arm_sme.streaming_vl <half>607 return %svl_h : index608}609 610// -----611 612// CHECK-LABEL: @arm_sme_streaming_vl_words613// CHECK: %[[CONST:.*]] = arith.constant 2 : index614// CHECK: %[[CNTSD:.*]] = "arm_sme.intr.cntsd"() : () -> i64615// CHECK: %[[CNTSD_IDX:.*]] = arith.index_cast %[[CNTSD]] : i64 to index616// CHECK: %[[MUL:.*]] = arith.muli %[[CNTSD_IDX]], %[[CONST]] : index617func.func @arm_sme_streaming_vl_words() -> index {618 %svl_w = arm_sme.streaming_vl <word>619 return %svl_w : index620}621 622// -----623 624// CHECK-LABEL: @arm_sme_streaming_vl_double_words625// CHECK: "arm_sme.intr.cntsd"() : () -> i64626func.func @arm_sme_streaming_vl_double_words() -> index {627 %svl_d = arm_sme.streaming_vl <double>628 return %svl_d : index629}630 631//===----------------------------------------------------------------------===//632// arm_sme.fmopa_2way633//===----------------------------------------------------------------------===//634 635// -----636 637// CHECK-LABEL: arm_sme_fmopa_2way_f16f16_to_f32638// CHECK: "arm_sme.intr.mopa.wide"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xi1>, vector<[8]xi1>, vector<[8]xf16>, vector<[8]xf16>) -> ()639func.func @arm_sme_fmopa_2way_f16f16_to_f32(%vecA: vector<[8]xf16>, %vecB: vector<[8]xf16>) {640 %result = arm_sme.fmopa_2way %vecA, %vecB : vector<[8]xf16>, vector<[8]xf16> into vector<[4]x[4]xf32>641 "test.some_use"(%result) : (vector<[4]x[4]xf32>) -> ()642}643 644// -----645 646// CHECK-LABEL: arm_sme_fmopa_2way_bf16bf16_to_f32647// CHECK: "arm_sme.intr.mopa.wide"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xi1>, vector<[8]xi1>, vector<[8]xbf16>, vector<[8]xbf16>) -> ()648func.func @arm_sme_fmopa_2way_bf16bf16_to_f32(%vecA: vector<[8]xbf16>, %vecB: vector<[8]xbf16>) {649 %result = arm_sme.fmopa_2way %vecA, %vecB : vector<[8]xbf16>, vector<[8]xbf16> into vector<[4]x[4]xf32>650 "test.some_use"(%result) : (vector<[4]x[4]xf32>) -> ()651}652 653//===----------------------------------------------------------------------===//654// arm_sme.fmops_2way655//===----------------------------------------------------------------------===//656 657// -----658 659// CHECK-LABEL: arm_sme_fmops_2way_f16f16_to_f32660// CHECK: "arm_sme.intr.mops.wide"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xi1>, vector<[8]xi1>, vector<[8]xf16>, vector<[8]xf16>) -> ()661func.func @arm_sme_fmops_2way_f16f16_to_f32(%vecA: vector<[8]xf16>, %vecB: vector<[8]xf16>) {662 %result = arm_sme.fmops_2way %vecA, %vecB : vector<[8]xf16>, vector<[8]xf16> into vector<[4]x[4]xf32>663 "test.some_use"(%result) : (vector<[4]x[4]xf32>) -> ()664}665 666// -----667 668// CHECK-LABEL: arm_sme_fmops_2way_bf16bf16_to_f32669// CHECK: "arm_sme.intr.mops.wide"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xi1>, vector<[8]xi1>, vector<[8]xbf16>, vector<[8]xbf16>) -> ()670func.func @arm_sme_fmops_2way_bf16bf16_to_f32(%vecA: vector<[8]xbf16>, %vecB: vector<[8]xbf16>) {671 %result = arm_sme.fmops_2way %vecA, %vecB : vector<[8]xbf16>, vector<[8]xbf16> into vector<[4]x[4]xf32>672 "test.some_use"(%result) : (vector<[4]x[4]xf32>) -> ()673}674 675//===----------------------------------------------------------------------===//676// arm_sme.smopa_2way677//===----------------------------------------------------------------------===//678 679// -----680 681// CHECK-LABEL: arm_sme_smopa_2way_i16i16_to_i32682// CHECK: "arm_sme.intr.smopa.za32"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xi1>, vector<[8]xi1>, vector<[8]xi16>, vector<[8]xi16>) -> ()683func.func @arm_sme_smopa_2way_i16i16_to_i32(%vecA: vector<[8]xi16>, %vecB: vector<[8]xi16>) {684 %result = arm_sme.smopa_2way %vecA, %vecB : vector<[8]xi16>, vector<[8]xi16> into vector<[4]x[4]xi32>685 "test.some_use"(%result) : (vector<[4]x[4]xi32>) -> ()686}687 688//===----------------------------------------------------------------------===//689// arm_sme.smops_2way690//===----------------------------------------------------------------------===//691 692// -----693 694// CHECK-LABEL: arm_sme_smops_2way_i16i16_to_i32695// CHECK: "arm_sme.intr.smops.za32"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xi1>, vector<[8]xi1>, vector<[8]xi16>, vector<[8]xi16>) -> ()696func.func @arm_sme_smops_2way_i16i16_to_i32(%vecA: vector<[8]xi16>, %vecB: vector<[8]xi16>) {697 %result = arm_sme.smops_2way %vecA, %vecB : vector<[8]xi16>, vector<[8]xi16> into vector<[4]x[4]xi32>698 "test.some_use"(%result) : (vector<[4]x[4]xi32>) -> ()699}700 701//===----------------------------------------------------------------------===//702// arm_sme.umopa_2way703//===----------------------------------------------------------------------===//704 705// -----706 707// CHECK-LABEL: arm_sme_umopa_2way_i16i16_to_i32708// CHECK: "arm_sme.intr.umopa.za32"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xi1>, vector<[8]xi1>, vector<[8]xi16>, vector<[8]xi16>) -> ()709func.func @arm_sme_umopa_2way_i16i16_to_i32(%vecA: vector<[8]xi16>, %vecB: vector<[8]xi16>) {710 %result = arm_sme.umopa_2way %vecA, %vecB : vector<[8]xi16>, vector<[8]xi16> into vector<[4]x[4]xi32>711 "test.some_use"(%result) : (vector<[4]x[4]xi32>) -> ()712 return713}714 715//===----------------------------------------------------------------------===//716// arm_sme.umops_2way717//===----------------------------------------------------------------------===//718 719// -----720 721// CHECK-LABEL: arm_sme_umops_2way_i16i16_to_i32722// CHECK: "arm_sme.intr.umops.za32"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xi1>, vector<[8]xi1>, vector<[8]xi16>, vector<[8]xi16>) -> ()723func.func @arm_sme_umops_2way_i16i16_to_i32(%vecA: vector<[8]xi16>, %vecB: vector<[8]xi16>) {724 %result = arm_sme.umops_2way %vecA, %vecB : vector<[8]xi16>, vector<[8]xi16> into vector<[4]x[4]xi32>725 "test.some_use"(%result) : (vector<[4]x[4]xi32>) -> ()726 return727}728 729//===----------------------------------------------------------------------===//730// arm_sme.smopa_4way731//===----------------------------------------------------------------------===//732 733// -----734 735// CHECK-LABEL: arm_sme_smopa_4way_i8i8_to_i32736// CHECK: "arm_sme.intr.smopa.wide"({{.*}}) <{tile_id = 0 : i32}> : (vector<[16]xi1>, vector<[16]xi1>, vector<[16]xi8>, vector<[16]xi8>) -> ()737func.func @arm_sme_smopa_4way_i8i8_to_i32(%vecA: vector<[16]xi8>, %vecB: vector<[16]xi8>) {738 %result = arm_sme.smopa_4way %vecA, %vecB : vector<[16]xi8>, vector<[16]xi8> into vector<[4]x[4]xi32>739 "test.some_use"(%result) : (vector<[4]x[4]xi32>) -> ()740 return741}742 743// -----744 745// CHECK-LABEL: arm_sme_smopa_4way_i16i16_to_i64746// CHECK: "arm_sme.intr.smopa.wide"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xi1>, vector<[8]xi1>, vector<[8]xi16>, vector<[8]xi16>) -> ()747func.func @arm_sme_smopa_4way_i16i16_to_i64(%vecA: vector<[8]xi16>, %vecB: vector<[8]xi16>) {748 %result = arm_sme.smopa_4way %vecA, %vecB : vector<[8]xi16>, vector<[8]xi16> into vector<[2]x[2]xi64>749 "test.some_use"(%result) : (vector<[2]x[2]xi64>) -> ()750 return751}752 753//===----------------------------------------------------------------------===//754// arm_sme.smops_4way755//===----------------------------------------------------------------------===//756 757// -----758 759// CHECK-LABEL: arm_sme_smops_4way_i8i8_to_i32760// CHECK: "arm_sme.intr.smops.wide"({{.*}}) <{tile_id = 0 : i32}> : (vector<[16]xi1>, vector<[16]xi1>, vector<[16]xi8>, vector<[16]xi8>) -> ()761func.func @arm_sme_smops_4way_i8i8_to_i32(%vecA: vector<[16]xi8>, %vecB: vector<[16]xi8>) {762 %result = arm_sme.smops_4way %vecA, %vecB : vector<[16]xi8>, vector<[16]xi8> into vector<[4]x[4]xi32>763 "test.some_use"(%result) : (vector<[4]x[4]xi32>) -> ()764 return765}766 767// -----768 769// CHECK-LABEL: arm_sme_smops_4way_i16i16_to_i64770// CHECK: "arm_sme.intr.smops.wide"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xi1>, vector<[8]xi1>, vector<[8]xi16>, vector<[8]xi16>) -> ()771func.func @arm_sme_smops_4way_i16i16_to_i64(%vecA: vector<[8]xi16>, %vecB: vector<[8]xi16>) {772 %result = arm_sme.smops_4way %vecA, %vecB : vector<[8]xi16>, vector<[8]xi16> into vector<[2]x[2]xi64>773 "test.some_use"(%result) : (vector<[2]x[2]xi64>) -> ()774 return775}776 777//===----------------------------------------------------------------------===//778// arm_sme.umopa_4way779//===----------------------------------------------------------------------===//780 781// -----782 783// CHECK-LABEL: arm_sme_umopa_4way_i8i8_to_i32784// CHECK: "arm_sme.intr.umopa.wide"({{.*}}) <{tile_id = 0 : i32}> : (vector<[16]xi1>, vector<[16]xi1>, vector<[16]xi8>, vector<[16]xi8>) -> ()785func.func @arm_sme_umopa_4way_i8i8_to_i32(%vecA: vector<[16]xi8>, %vecB: vector<[16]xi8>) {786 %result = arm_sme.umopa_4way %vecA, %vecB : vector<[16]xi8>, vector<[16]xi8> into vector<[4]x[4]xi32>787 "test.some_use"(%result) : (vector<[4]x[4]xi32>) -> ()788 return789}790 791// -----792 793// CHECK-LABEL: arm_sme_umopa_4way_i16i16_to_i64794// CHECK: "arm_sme.intr.umopa.wide"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xi1>, vector<[8]xi1>, vector<[8]xi16>, vector<[8]xi16>) -> ()795func.func @arm_sme_umopa_4way_i16i16_to_i64(%vecA: vector<[8]xi16>, %vecB: vector<[8]xi16>) {796 %result = arm_sme.umopa_4way %vecA, %vecB : vector<[8]xi16>, vector<[8]xi16> into vector<[2]x[2]xi64>797 "test.some_use"(%result) : (vector<[2]x[2]xi64>) -> ()798 return799}800 801//===----------------------------------------------------------------------===//802// arm_sme.umops_4way803//===----------------------------------------------------------------------===//804 805// -----806 807// CHECK-LABEL: arm_sme_umops_4way_i8i8_to_i32808// CHECK: "arm_sme.intr.umops.wide"({{.*}}) <{tile_id = 0 : i32}> : (vector<[16]xi1>, vector<[16]xi1>, vector<[16]xi8>, vector<[16]xi8>) -> ()809func.func @arm_sme_umops_4way_i8i8_to_i32(%vecA: vector<[16]xi8>, %vecB: vector<[16]xi8>) {810 %result = arm_sme.umops_4way %vecA, %vecB : vector<[16]xi8>, vector<[16]xi8> into vector<[4]x[4]xi32>811 "test.some_use"(%result) : (vector<[4]x[4]xi32>) -> ()812 return813}814 815// -----816 817// CHECK-LABEL: arm_sme_umops_4way_i16i16_to_i64818// CHECK: "arm_sme.intr.umops.wide"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xi1>, vector<[8]xi1>, vector<[8]xi16>, vector<[8]xi16>) -> ()819func.func @arm_sme_umops_4way_i16i16_to_i64(%vecA: vector<[8]xi16>, %vecB: vector<[8]xi16>) {820 %result = arm_sme.umops_4way %vecA, %vecB : vector<[8]xi16>, vector<[8]xi16> into vector<[2]x[2]xi64>821 "test.some_use"(%result) : (vector<[2]x[2]xi64>) -> ()822 return823}824 825//===----------------------------------------------------------------------===//826// arm_sme.sumopa_4way827//===----------------------------------------------------------------------===//828 829// -----830 831// CHECK-LABEL: arm_sme_sumopa_4way_i8i8_to_i32832// CHECK: "arm_sme.intr.sumopa.wide"({{.*}}) <{tile_id = 0 : i32}> : (vector<[16]xi1>, vector<[16]xi1>, vector<[16]xi8>, vector<[16]xi8>) -> ()833func.func @arm_sme_sumopa_4way_i8i8_to_i32(%vecA: vector<[16]xi8>, %vecB: vector<[16]xi8>) {834 %result = arm_sme.sumopa_4way %vecA, %vecB : vector<[16]xi8>, vector<[16]xi8> into vector<[4]x[4]xi32>835 "test.some_use"(%result) : (vector<[4]x[4]xi32>) -> ()836 return837}838 839// -----840 841// CHECK-LABEL: arm_sme_sumopa_4way_i16i16_to_i64842// CHECK: "arm_sme.intr.sumopa.wide"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xi1>, vector<[8]xi1>, vector<[8]xi16>, vector<[8]xi16>) -> ()843func.func @arm_sme_sumopa_4way_i16i16_to_i64(%vecA: vector<[8]xi16>, %vecB: vector<[8]xi16>) {844 %result = arm_sme.sumopa_4way %vecA, %vecB : vector<[8]xi16>, vector<[8]xi16> into vector<[2]x[2]xi64>845 "test.some_use"(%result) : (vector<[2]x[2]xi64>) -> ()846 return847}848 849//===----------------------------------------------------------------------===//850// arm_sme.sumops_4way851//===----------------------------------------------------------------------===//852 853// -----854 855// CHECK-LABEL: arm_sme_sumops_4way_i8i8_to_i32856// CHECK: "arm_sme.intr.sumops.wide"({{.*}}) <{tile_id = 0 : i32}> : (vector<[16]xi1>, vector<[16]xi1>, vector<[16]xi8>, vector<[16]xi8>) -> ()857func.func @arm_sme_sumops_4way_i8i8_to_i32(%vecA: vector<[16]xi8>, %vecB: vector<[16]xi8>) {858 %result = arm_sme.sumops_4way %vecA, %vecB : vector<[16]xi8>, vector<[16]xi8> into vector<[4]x[4]xi32>859 "test.some_use"(%result) : (vector<[4]x[4]xi32>) -> ()860 return861}862 863// -----864 865// CHECK-LABEL: arm_sme_sumops_4way_i16i16_to_i64866// CHECK: "arm_sme.intr.sumops.wide"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xi1>, vector<[8]xi1>, vector<[8]xi16>, vector<[8]xi16>) -> ()867func.func @arm_sme_sumops_4way_i16i16_to_i64(%vecA: vector<[8]xi16>, %vecB: vector<[8]xi16>) {868 %result = arm_sme.sumops_4way %vecA, %vecB : vector<[8]xi16>, vector<[8]xi16> into vector<[2]x[2]xi64>869 "test.some_use"(%result) : (vector<[2]x[2]xi64>) -> ()870 return871}872 873//===----------------------------------------------------------------------===//874// arm_sme.usmopa_4way875//===----------------------------------------------------------------------===//876 877// -----878 879// CHECK-LABEL: arm_sme_usmopa_4way_i8i8_to_i32880// CHECK: "arm_sme.intr.usmopa.wide"({{.*}}) <{tile_id = 0 : i32}> : (vector<[16]xi1>, vector<[16]xi1>, vector<[16]xi8>, vector<[16]xi8>) -> ()881func.func @arm_sme_usmopa_4way_i8i8_to_i32(%vecA: vector<[16]xi8>, %vecB: vector<[16]xi8>) {882 %result = arm_sme.usmopa_4way %vecA, %vecB : vector<[16]xi8>, vector<[16]xi8> into vector<[4]x[4]xi32>883 "test.some_use"(%result) : (vector<[4]x[4]xi32>) -> ()884 return885}886 887// -----888 889// CHECK-LABEL: arm_sme_usmopa_4way_i16i16_to_i64890// CHECK: "arm_sme.intr.usmopa.wide"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xi1>, vector<[8]xi1>, vector<[8]xi16>, vector<[8]xi16>) -> ()891func.func @arm_sme_usmopa_4way_i16i16_to_i64(%vecA: vector<[8]xi16>, %vecB: vector<[8]xi16>) {892 %result = arm_sme.usmopa_4way %vecA, %vecB : vector<[8]xi16>, vector<[8]xi16> into vector<[2]x[2]xi64>893 "test.some_use"(%result) : (vector<[2]x[2]xi64>) -> ()894 return895}896 897//===----------------------------------------------------------------------===//898// arm_sme.usmops_4way899//===----------------------------------------------------------------------===//900 901// -----902 903// CHECK-LABEL: arm_sme_usmops_4way_i8i8_to_i32904// CHECK: "arm_sme.intr.usmops.wide"({{.*}}) <{tile_id = 0 : i32}> : (vector<[16]xi1>, vector<[16]xi1>, vector<[16]xi8>, vector<[16]xi8>) -> ()905func.func @arm_sme_usmops_4way_i8i8_to_i32(%vecA: vector<[16]xi8>, %vecB: vector<[16]xi8>) {906 %result = arm_sme.usmops_4way %vecA, %vecB : vector<[16]xi8>, vector<[16]xi8> into vector<[4]x[4]xi32>907 "test.some_use"(%result) : (vector<[4]x[4]xi32>) -> ()908 return909}910 911// -----912 913// CHECK-LABEL: arm_sme_usmops_4way_i16i16_to_i64914// CHECK: "arm_sme.intr.usmops.wide"({{.*}}) <{tile_id = 0 : i32}> : (vector<[8]xi1>, vector<[8]xi1>, vector<[8]xi16>, vector<[8]xi16>) -> ()915func.func @arm_sme_usmops_4way_i16i16_to_i64(%vecA: vector<[8]xi16>, %vecB: vector<[8]xi16>) {916 %result = arm_sme.usmops_4way %vecA, %vecB : vector<[8]xi16>, vector<[8]xi16> into vector<[2]x[2]xi64>917 "test.some_use"(%result) : (vector<[2]x[2]xi64>) -> ()918 return919}920 921//===----------------------------------------------------------------------===//922// Operations on SME tile types allowed after conversion923//===----------------------------------------------------------------------===//924 925// -----926 927// The following operations on SME tile types are permitted after conversion:928//929// - arm_sme.copy_tile930// - arm_sme.get_tile931// - cf.br932// - any unregistered op such as 'test.some_use'.933//934// this test verifies this. Conversion will fail for operations with SME tile935// types not in this list, this is tested in 'unsupported.mlir'.936 937func.func @ops_on_tiles_legal_post_conversion(%ub : index) {938 %c0 = arith.constant 0 : index939 %c1 = arith.constant 1 : index940 %tile = arm_sme.get_tile : vector<[4]x[4]xf32>941 %copy = arm_sme.copy_tile %tile : vector<[4]x[4]xf32>942 cf.br ^bb1(%copy : vector<[4]x[4]xf32>)943^bb1(%x : vector<[4]x[4]xf32>):944 "test.some_use"(%x) : (vector<[4]x[4]xf32>) -> ()945 return946}947