325 lines · plain
1// RUN: mlir-opt -convert-spirv-to-llvm %s | FileCheck %s2 3//===----------------------------------------------------------------------===//4// spirv.BitCount5//===----------------------------------------------------------------------===//6 7// CHECK-LABEL: @bitcount_scalar8spirv.func @bitcount_scalar(%arg0: i16) "None" {9 // CHECK: llvm.intr.ctpop(%{{.*}}) : (i16) -> i1610 %0 = spirv.BitCount %arg0: i1611 spirv.Return12}13 14// CHECK-LABEL: @bitcount_vector15spirv.func @bitcount_vector(%arg0: vector<3xi32>) "None" {16 // CHECK: llvm.intr.ctpop(%{{.*}}) : (vector<3xi32>) -> vector<3xi32>17 %0 = spirv.BitCount %arg0: vector<3xi32>18 spirv.Return19}20 21//===----------------------------------------------------------------------===//22// spirv.BitReverse23//===----------------------------------------------------------------------===//24 25// CHECK-LABEL: @bitreverse_scalar26spirv.func @bitreverse_scalar(%arg0: i64) "None" {27 // CHECK: llvm.intr.bitreverse(%{{.*}}) : (i64) -> i6428 %0 = spirv.BitReverse %arg0: i6429 spirv.Return30}31 32// CHECK-LABEL: @bitreverse_vector33spirv.func @bitreverse_vector(%arg0: vector<4xi32>) "None" {34 // CHECK: llvm.intr.bitreverse(%{{.*}}) : (vector<4xi32>) -> vector<4xi32>35 %0 = spirv.BitReverse %arg0: vector<4xi32>36 spirv.Return37}38 39//===----------------------------------------------------------------------===//40// spirv.BitFieldInsert41//===----------------------------------------------------------------------===//42 43// CHECK-LABEL: @bitfield_insert_scalar_same_bit_width44// CHECK-SAME: %[[BASE:.*]]: i32, %[[INSERT:.*]]: i32, %[[OFFSET:.*]]: i32, %[[COUNT:.*]]: i3245spirv.func @bitfield_insert_scalar_same_bit_width(%base: i32, %insert: i32, %offset: i32, %count: i32) "None" {46 // CHECK: %[[MINUS_ONE:.*]] = llvm.mlir.constant(-1 : i32) : i3247 // CHECK: %[[T0:.*]] = llvm.shl %[[MINUS_ONE]], %[[COUNT]] : i3248 // CHECK: %[[T1:.*]] = llvm.xor %[[T0]], %[[MINUS_ONE]] : i3249 // CHECK: %[[T2:.*]] = llvm.shl %[[T1]], %[[OFFSET]] : i3250 // CHECK: %[[MASK:.*]] = llvm.xor %[[T2]], %[[MINUS_ONE]] : i3251 // CHECK: %[[NEW_BASE:.*]] = llvm.and %[[BASE]], %[[MASK]] : i3252 // CHECK: %[[SHIFTED_INSERT:.*]] = llvm.shl %[[INSERT]], %[[OFFSET]] : i3253 // CHECK: llvm.or %[[NEW_BASE]], %[[SHIFTED_INSERT]] : i3254 %0 = spirv.BitFieldInsert %base, %insert, %offset, %count : i32, i32, i3255 spirv.Return56}57 58// CHECK-LABEL: @bitfield_insert_scalar_smaller_bit_width59// CHECK-SAME: %[[BASE:.*]]: i64, %[[INSERT:.*]]: i64, %[[OFFSET:.*]]: i8, %[[COUNT:.*]]: i860spirv.func @bitfield_insert_scalar_smaller_bit_width(%base: i64, %insert: i64, %offset: i8, %count: i8) "None" {61 // CHECK: %[[EXT_OFFSET:.*]] = llvm.zext %[[OFFSET]] : i8 to i6462 // CHECK: %[[EXT_COUNT:.*]] = llvm.zext %[[COUNT]] : i8 to i6463 // CHECK: %[[MINUS_ONE:.*]] = llvm.mlir.constant(-1 : i64) : i6464 // CHECK: %[[T0:.*]] = llvm.shl %[[MINUS_ONE]], %[[EXT_COUNT]] : i6465 // CHECK: %[[T1:.*]] = llvm.xor %[[T0]], %[[MINUS_ONE]] : i6466 // CHECK: %[[T2:.*]] = llvm.shl %[[T1]], %[[EXT_OFFSET]] : i6467 // CHECK: %[[MASK:.*]] = llvm.xor %[[T2]], %[[MINUS_ONE]] : i6468 // CHECK: %[[NEW_BASE:.*]] = llvm.and %[[BASE]], %[[MASK]] : i6469 // CHECK: %[[SHIFTED_INSERT:.*]] = llvm.shl %[[INSERT]], %[[EXT_OFFSET]] : i6470 // CHECK: llvm.or %[[NEW_BASE]], %[[SHIFTED_INSERT]] : i6471 %0 = spirv.BitFieldInsert %base, %insert, %offset, %count : i64, i8, i872 spirv.Return73}74 75// CHECK-LABEL: @bitfield_insert_scalar_greater_bit_width76// CHECK-SAME: %[[BASE:.*]]: i16, %[[INSERT:.*]]: i16, %[[OFFSET:.*]]: i32, %[[COUNT:.*]]: i6477spirv.func @bitfield_insert_scalar_greater_bit_width(%base: i16, %insert: i16, %offset: i32, %count: i64) "None" {78 // CHECK: %[[TRUNC_OFFSET:.*]] = llvm.trunc %[[OFFSET]] : i32 to i1679 // CHECK: %[[TRUNC_COUNT:.*]] = llvm.trunc %[[COUNT]] : i64 to i1680 // CHECK: %[[MINUS_ONE:.*]] = llvm.mlir.constant(-1 : i16) : i1681 // CHECK: %[[T0:.*]] = llvm.shl %[[MINUS_ONE]], %[[TRUNC_COUNT]] : i1682 // CHECK: %[[T1:.*]] = llvm.xor %[[T0]], %[[MINUS_ONE]] : i1683 // CHECK: %[[T2:.*]] = llvm.shl %[[T1]], %[[TRUNC_OFFSET]] : i1684 // CHECK: %[[MASK:.*]] = llvm.xor %[[T2]], %[[MINUS_ONE]] : i1685 // CHECK: %[[NEW_BASE:.*]] = llvm.and %[[BASE]], %[[MASK]] : i1686 // CHECK: %[[SHIFTED_INSERT:.*]] = llvm.shl %[[INSERT]], %[[TRUNC_OFFSET]] : i1687 // CHECK: llvm.or %[[NEW_BASE]], %[[SHIFTED_INSERT]] : i1688 %0 = spirv.BitFieldInsert %base, %insert, %offset, %count : i16, i32, i6489 spirv.Return90}91 92// CHECK-LABEL: @bitfield_insert_vector93// CHECK-SAME: %[[BASE:.*]]: vector<2xi32>, %[[INSERT:.*]]: vector<2xi32>, %[[OFFSET:.*]]: i32, %[[COUNT:.*]]: i3294spirv.func @bitfield_insert_vector(%base: vector<2xi32>, %insert: vector<2xi32>, %offset: i32, %count: i32) "None" {95 // CHECK: %[[OFFSET_V0:.*]] = llvm.mlir.poison : vector<2xi32>96 // CHECK: %[[ZERO:.*]] = llvm.mlir.constant(0 : i32) : i3297 // CHECK: %[[OFFSET_V1:.*]] = llvm.insertelement %[[OFFSET]], %[[OFFSET_V0]][%[[ZERO]] : i32] : vector<2xi32>98 // CHECK: %[[ONE:.*]] = llvm.mlir.constant(1 : i32) : i3299 // CHECK: %[[OFFSET_V2:.*]] = llvm.insertelement %[[OFFSET]], %[[OFFSET_V1]][%[[ONE]] : i32] : vector<2xi32>100 // CHECK: %[[COUNT_V0:.*]] = llvm.mlir.poison : vector<2xi32>101 // CHECK: %[[ZERO:.*]] = llvm.mlir.constant(0 : i32) : i32102 // CHECK: %[[COUNT_V1:.*]] = llvm.insertelement %[[COUNT]], %[[COUNT_V0]][%[[ZERO]] : i32] : vector<2xi32>103 // CHECK: %[[ONE:.*]] = llvm.mlir.constant(1 : i32) : i32104 // CHECK: %[[COUNT_V2:.*]] = llvm.insertelement %[[COUNT]], %[[COUNT_V1]][%[[ONE]] : i32] : vector<2xi32>105 // CHECK: %[[MINUS_ONE:.*]] = llvm.mlir.constant(dense<-1> : vector<2xi32>) : vector<2xi32>106 // CHECK: %[[T0:.*]] = llvm.shl %[[MINUS_ONE]], %[[COUNT_V2]] : vector<2xi32>107 // CHECK: %[[T1:.*]] = llvm.xor %[[T0]], %[[MINUS_ONE]] : vector<2xi32>108 // CHECK: %[[T2:.*]] = llvm.shl %[[T1]], %[[OFFSET_V2]] : vector<2xi32>109 // CHECK: %[[MASK:.*]] = llvm.xor %[[T2]], %[[MINUS_ONE]] : vector<2xi32>110 // CHECK: %[[NEW_BASE:.*]] = llvm.and %[[BASE]], %[[MASK]] : vector<2xi32>111 // CHECK: %[[SHIFTED_INSERT:.*]] = llvm.shl %[[INSERT]], %[[OFFSET_V2]] : vector<2xi32>112 // CHECK: llvm.or %[[NEW_BASE]], %[[SHIFTED_INSERT]] : vector<2xi32>113 %0 = spirv.BitFieldInsert %base, %insert, %offset, %count : vector<2xi32>, i32, i32114 spirv.Return115}116 117//===----------------------------------------------------------------------===//118// spirv.BitFieldSExtract119//===----------------------------------------------------------------------===//120 121// CHECK-LABEL: @bitfield_sextract_scalar_same_bit_width122// CHECK-SAME: %[[BASE:.*]]: i64, %[[OFFSET:.*]]: i64, %[[COUNT:.*]]: i64123spirv.func @bitfield_sextract_scalar_same_bit_width(%base: i64, %offset: i64, %count: i64) "None" {124 // CHECK: %[[SIZE:.]] = llvm.mlir.constant(64 : i64) : i64125 // CHECK: %[[T0:.*]] = llvm.add %[[COUNT]], %[[OFFSET]] : i64126 // CHECK: %[[T1:.*]] = llvm.sub %[[SIZE]], %[[T0]] : i64127 // CHECK: %[[SHIFTED_LEFT:.*]] = llvm.shl %[[BASE]], %[[T1]] : i64128 // CHECK: %[[T2:.*]] = llvm.add %[[OFFSET]], %[[T1]] : i64129 // CHECK: llvm.ashr %[[SHIFTED_LEFT]], %[[T2]] : i64130 %0 = spirv.BitFieldSExtract %base, %offset, %count : i64, i64, i64131 spirv.Return132}133 134// CHECK-LABEL: @bitfield_sextract_scalar_smaller_bit_width135// CHECK-SAME: %[[BASE:.*]]: i32, %[[OFFSET:.*]]: i8, %[[COUNT:.*]]: i8136spirv.func @bitfield_sextract_scalar_smaller_bit_width(%base: i32, %offset: i8, %count: i8) "None" {137 // CHECK: %[[EXT_OFFSET:.*]] = llvm.zext %[[OFFSET]] : i8 to i32138 // CHECK: %[[EXT_COUNT:.*]] = llvm.zext %[[COUNT]] : i8 to i32139 // CHECK: %[[SIZE:.]] = llvm.mlir.constant(32 : i32) : i32140 // CHECK: %[[T0:.*]] = llvm.add %[[EXT_COUNT]], %[[EXT_OFFSET]] : i32141 // CHECK: %[[T1:.*]] = llvm.sub %[[SIZE]], %[[T0]] : i32142 // CHECK: %[[SHIFTED_LEFT:.*]] = llvm.shl %[[BASE]], %[[T1]] : i32143 // CHECK: %[[T2:.*]] = llvm.add %[[EXT_OFFSET]], %[[T1]] : i32144 // CHECK: llvm.ashr %[[SHIFTED_LEFT]], %[[T2]] : i32145 %0 = spirv.BitFieldSExtract %base, %offset, %count : i32, i8, i8146 spirv.Return147}148 149// CHECK-LABEL: @bitfield_sextract_scalar_greater_bit_width150// CHECK-SAME: %[[BASE:.*]]: i32, %[[OFFSET:.*]]: i64, %[[COUNT:.*]]: i64151spirv.func @bitfield_sextract_scalar_greater_bit_width(%base: i32, %offset: i64, %count: i64) "None" {152 // CHECK: %[[TRUNC_OFFSET:.*]] = llvm.trunc %[[OFFSET]] : i64 to i32153 // CHECK: %[[TRUNC_COUNT:.*]] = llvm.trunc %[[COUNT]] : i64 to i32154 // CHECK: %[[SIZE:.]] = llvm.mlir.constant(32 : i32) : i32155 // CHECK: %[[T0:.*]] = llvm.add %[[TRUNC_COUNT]], %[[TRUNC_OFFSET]] : i32156 // CHECK: %[[T1:.*]] = llvm.sub %[[SIZE]], %[[T0]] : i32157 // CHECK: %[[SHIFTED_LEFT:.*]] = llvm.shl %[[BASE]], %[[T1]] : i32158 // CHECK: %[[T2:.*]] = llvm.add %[[TRUNC_OFFSET]], %[[T1]] : i32159 // CHECK: llvm.ashr %[[SHIFTED_LEFT]], %[[T2]] : i32160 %0 = spirv.BitFieldSExtract %base, %offset, %count : i32, i64, i64161 spirv.Return162}163 164// CHECK-LABEL: @bitfield_sextract_vector165// CHECK-SAME: %[[BASE:.*]]: vector<2xi32>, %[[OFFSET:.*]]: i32, %[[COUNT:.*]]: i32166spirv.func @bitfield_sextract_vector(%base: vector<2xi32>, %offset: i32, %count: i32) "None" {167 // CHECK: %[[OFFSET_V0:.*]] = llvm.mlir.poison : vector<2xi32>168 // CHECK: %[[ZERO:.*]] = llvm.mlir.constant(0 : i32) : i32169 // CHECK: %[[OFFSET_V1:.*]] = llvm.insertelement %[[OFFSET]], %[[OFFSET_V0]][%[[ZERO]] : i32] : vector<2xi32>170 // CHECK: %[[ONE:.*]] = llvm.mlir.constant(1 : i32) : i32171 // CHECK: %[[OFFSET_V2:.*]] = llvm.insertelement %[[OFFSET]], %[[OFFSET_V1]][%[[ONE]] : i32] : vector<2xi32>172 // CHECK: %[[COUNT_V0:.*]] = llvm.mlir.poison : vector<2xi32>173 // CHECK: %[[ZERO:.*]] = llvm.mlir.constant(0 : i32) : i32174 // CHECK: %[[COUNT_V1:.*]] = llvm.insertelement %[[COUNT]], %[[COUNT_V0]][%[[ZERO]] : i32] : vector<2xi32>175 // CHECK: %[[ONE:.*]] = llvm.mlir.constant(1 : i32) : i32176 // CHECK: %[[COUNT_V2:.*]] = llvm.insertelement %[[COUNT]], %[[COUNT_V1]][%[[ONE]] : i32] : vector<2xi32>177 // CHECK: %[[SIZE:.*]] = llvm.mlir.constant(dense<32> : vector<2xi32>) : vector<2xi32>178 // CHECK: %[[T0:.*]] = llvm.add %[[COUNT_V2]], %[[OFFSET_V2]] : vector<2xi32>179 // CHECK: %[[T1:.*]] = llvm.sub %[[SIZE]], %[[T0]] : vector<2xi32>180 // CHECK: %[[SHIFTED_LEFT:.*]] = llvm.shl %[[BASE]], %[[T1]] : vector<2xi32>181 // CHECK: %[[T2:.*]] = llvm.add %[[OFFSET_V2]], %[[T1]] : vector<2xi32>182 // CHECK: llvm.ashr %[[SHIFTED_LEFT]], %[[T2]] : vector<2xi32>183 %0 = spirv.BitFieldSExtract %base, %offset, %count : vector<2xi32>, i32, i32184 spirv.Return185}186 187//===----------------------------------------------------------------------===//188// spirv.BitFieldUExtract189//===----------------------------------------------------------------------===//190 191// CHECK-LABEL: @bitfield_uextract_scalar_same_bit_width192// CHECK-SAME: %[[BASE:.*]]: i32, %[[OFFSET:.*]]: i32, %[[COUNT:.*]]: i32193spirv.func @bitfield_uextract_scalar_same_bit_width(%base: i32, %offset: i32, %count: i32) "None" {194 // CHECK: %[[MINUS_ONE:.*]] = llvm.mlir.constant(-1 : i32) : i32195 // CHECK: %[[T0:.*]] = llvm.shl %[[MINUS_ONE]], %[[COUNT]] : i32196 // CHECK: %[[MASK:.*]] = llvm.xor %[[T0]], %[[MINUS_ONE]] : i32197 // CHECK: %[[SHIFTED_BASE:.*]] = llvm.lshr %[[BASE]], %[[OFFSET]] : i32198 // CHECK: llvm.and %[[SHIFTED_BASE]], %[[MASK]] : i32199 %0 = spirv.BitFieldUExtract %base, %offset, %count : i32, i32, i32200 spirv.Return201}202 203// CHECK-LABEL: @bitfield_uextract_scalar_smaller_bit_width204// CHECK-SAME: %[[BASE:.*]]: i32, %[[OFFSET:.*]]: i16, %[[COUNT:.*]]: i8205spirv.func @bitfield_uextract_scalar_smaller_bit_width(%base: i32, %offset: i16, %count: i8) "None" {206 // CHECK: %[[EXT_OFFSET:.*]] = llvm.zext %[[OFFSET]] : i16 to i32207 // CHECK: %[[EXT_COUNT:.*]] = llvm.zext %[[COUNT]] : i8 to i32208 // CHECK: %[[MINUS_ONE:.*]] = llvm.mlir.constant(-1 : i32) : i32209 // CHECK: %[[T0:.*]] = llvm.shl %[[MINUS_ONE]], %[[EXT_COUNT]] : i32210 // CHECK: %[[MASK:.*]] = llvm.xor %[[T0]], %[[MINUS_ONE]] : i32211 // CHECK: %[[SHIFTED_BASE:.*]] = llvm.lshr %[[BASE]], %[[EXT_OFFSET]] : i32212 // CHECK: llvm.and %[[SHIFTED_BASE]], %[[MASK]] : i32213 %0 = spirv.BitFieldUExtract %base, %offset, %count : i32, i16, i8214 spirv.Return215}216 217// CHECK-LABEL: @bitfield_uextract_scalar_greater_bit_width218// CHECK-SAME: %[[BASE:.*]]: i8, %[[OFFSET:.*]]: i16, %[[COUNT:.*]]: i8219spirv.func @bitfield_uextract_scalar_greater_bit_width(%base: i8, %offset: i16, %count: i8) "None" {220 // CHECK: %[[TRUNC_OFFSET:.*]] = llvm.trunc %[[OFFSET]] : i16 to i8221 // CHECK: %[[MINUS_ONE:.*]] = llvm.mlir.constant(-1 : i8) : i8222 // CHECK: %[[T0:.*]] = llvm.shl %[[MINUS_ONE]], %[[COUNT]] : i8223 // CHECK: %[[MASK:.*]] = llvm.xor %[[T0]], %[[MINUS_ONE]] : i8224 // CHECK: %[[SHIFTED_BASE:.*]] = llvm.lshr %[[BASE]], %[[TRUNC_OFFSET]] : i8225 // CHECK: llvm.and %[[SHIFTED_BASE]], %[[MASK]] : i8226 %0 = spirv.BitFieldUExtract %base, %offset, %count : i8, i16, i8227 spirv.Return228}229 230// CHECK-LABEL: @bitfield_uextract_vector231// CHECK-SAME: %[[BASE:.*]]: vector<2xi32>, %[[OFFSET:.*]]: i32, %[[COUNT:.*]]: i32232spirv.func @bitfield_uextract_vector(%base: vector<2xi32>, %offset: i32, %count: i32) "None" {233 // CHECK: %[[OFFSET_V0:.*]] = llvm.mlir.poison : vector<2xi32>234 // CHECK: %[[ZERO:.*]] = llvm.mlir.constant(0 : i32) : i32235 // CHECK: %[[OFFSET_V1:.*]] = llvm.insertelement %[[OFFSET]], %[[OFFSET_V0]][%[[ZERO]] : i32] : vector<2xi32>236 // CHECK: %[[ONE:.*]] = llvm.mlir.constant(1 : i32) : i32237 // CHECK: %[[OFFSET_V2:.*]] = llvm.insertelement %[[OFFSET]], %[[OFFSET_V1]][%[[ONE]] : i32] : vector<2xi32>238 // CHECK: %[[COUNT_V0:.*]] = llvm.mlir.poison : vector<2xi32>239 // CHECK: %[[ZERO:.*]] = llvm.mlir.constant(0 : i32) : i32240 // CHECK: %[[COUNT_V1:.*]] = llvm.insertelement %[[COUNT]], %[[COUNT_V0]][%[[ZERO]] : i32] : vector<2xi32>241 // CHECK: %[[ONE:.*]] = llvm.mlir.constant(1 : i32) : i32242 // CHECK: %[[COUNT_V2:.*]] = llvm.insertelement %[[COUNT]], %[[COUNT_V1]][%[[ONE]] : i32] : vector<2xi32>243 // CHECK: %[[MINUS_ONE:.*]] = llvm.mlir.constant(dense<-1> : vector<2xi32>) : vector<2xi32>244 // CHECK: %[[T0:.*]] = llvm.shl %[[MINUS_ONE]], %[[COUNT_V2]] : vector<2xi32>245 // CHECK: %[[MASK:.*]] = llvm.xor %[[T0]], %[[MINUS_ONE]] : vector<2xi32>246 // CHECK: %[[SHIFTED_BASE:.*]] = llvm.lshr %[[BASE]], %[[OFFSET_V2]] : vector<2xi32>247 // CHECK: llvm.and %[[SHIFTED_BASE]], %[[MASK]] : vector<2xi32>248 %0 = spirv.BitFieldUExtract %base, %offset, %count : vector<2xi32>, i32, i32249 spirv.Return250}251 252//===----------------------------------------------------------------------===//253// spirv.BitwiseAnd254//===----------------------------------------------------------------------===//255 256// CHECK-LABEL: @bitwise_and_scalar257spirv.func @bitwise_and_scalar(%arg0: i32, %arg1: i32) "None" {258 // CHECK: llvm.and %{{.*}}, %{{.*}} : i32259 %0 = spirv.BitwiseAnd %arg0, %arg1 : i32260 spirv.Return261}262 263// CHECK-LABEL: @bitwise_and_vector264spirv.func @bitwise_and_vector(%arg0: vector<4xi64>, %arg1: vector<4xi64>) "None" {265 // CHECK: llvm.and %{{.*}}, %{{.*}} : vector<4xi64>266 %0 = spirv.BitwiseAnd %arg0, %arg1 : vector<4xi64>267 spirv.Return268}269 270//===----------------------------------------------------------------------===//271// spirv.BitwiseOr272//===----------------------------------------------------------------------===//273 274// CHECK-LABEL: @bitwise_or_scalar275spirv.func @bitwise_or_scalar(%arg0: i64, %arg1: i64) "None" {276 // CHECK: llvm.or %{{.*}}, %{{.*}} : i64277 %0 = spirv.BitwiseOr %arg0, %arg1 : i64278 spirv.Return279}280 281// CHECK-LABEL: @bitwise_or_vector282spirv.func @bitwise_or_vector(%arg0: vector<3xi8>, %arg1: vector<3xi8>) "None" {283 // CHECK: llvm.or %{{.*}}, %{{.*}} : vector<3xi8>284 %0 = spirv.BitwiseOr %arg0, %arg1 : vector<3xi8>285 spirv.Return286}287 288//===----------------------------------------------------------------------===//289// spirv.BitwiseXor290//===----------------------------------------------------------------------===//291 292// CHECK-LABEL: @bitwise_xor_scalar293spirv.func @bitwise_xor_scalar(%arg0: i32, %arg1: i32) "None" {294 // CHECK: llvm.xor %{{.*}}, %{{.*}} : i32295 %0 = spirv.BitwiseXor %arg0, %arg1 : i32296 spirv.Return297}298 299// CHECK-LABEL: @bitwise_xor_vector300spirv.func @bitwise_xor_vector(%arg0: vector<2xi16>, %arg1: vector<2xi16>) "None" {301 // CHECK: llvm.xor %{{.*}}, %{{.*}} : vector<2xi16>302 %0 = spirv.BitwiseXor %arg0, %arg1 : vector<2xi16>303 spirv.Return304}305 306//===----------------------------------------------------------------------===//307// spirv.Not308//===----------------------------------------------------------------------===//309 310// CHECK-LABEL: @not_scalar311spirv.func @not_scalar(%arg0: i32) "None" {312 // CHECK: %[[CONST:.*]] = llvm.mlir.constant(-1 : i32) : i32313 // CHECK: llvm.xor %{{.*}}, %[[CONST]] : i32314 %0 = spirv.Not %arg0 : i32315 spirv.Return316}317 318// CHECK-LABEL: @not_vector319spirv.func @not_vector(%arg0: vector<2xi16>) "None" {320 // CHECK: %[[CONST:.*]] = llvm.mlir.constant(dense<-1> : vector<2xi16>) : vector<2xi16>321 // CHECK: llvm.xor %{{.*}}, %[[CONST]] : vector<2xi16>322 %0 = spirv.Not %arg0 : vector<2xi16>323 spirv.Return324}325