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1// RUN: mlir-opt -split-input-file -verify-diagnostics %s | FileCheck %s2 3//===----------------------------------------------------------------------===//4// spirv.GroupNonUniformBallot5//===----------------------------------------------------------------------===//6 7func.func @group_non_uniform_ballot(%predicate: i1) -> vector<4xi32> {8 // CHECK: %{{.*}} = spirv.GroupNonUniformBallot <Workgroup> %{{.*}}: vector<4xi32>9 %0 = spirv.GroupNonUniformBallot <Workgroup> %predicate : vector<4xi32>10 return %0: vector<4xi32>11}12 13// -----14 15func.func @group_non_uniform_ballot(%predicate: i1) -> vector<4xi32> {16 // expected-error @+1 {{execution scope must be 'Workgroup' or 'Subgroup'}}17 %0 = spirv.GroupNonUniformBallot <Device> %predicate : vector<4xi32>18 return %0: vector<4xi32>19}20 21// -----22 23func.func @group_non_uniform_ballot(%predicate: i1) -> vector<4xsi32> {24 // expected-error @+1 {{op result #0 must be vector of 8/16/32/64-bit signless/unsigned integer values of length 4, but got 'vector<4xsi32>'}}25 %0 = spirv.GroupNonUniformBallot <Workgroup> %predicate : vector<4xsi32>26 return %0: vector<4xsi32>27}28 29// -----30 31//===----------------------------------------------------------------------===//32// spirv.GroupNonUniformBallotFindLSB33//===----------------------------------------------------------------------===//34 35func.func @group_non_uniform_ballot_find_lsb(%value : vector<4xi32>) -> i32 {36 // CHECK: %{{.*}} = spirv.GroupNonUniformBallotFindLSB <Subgroup> %{{.*}}: vector<4xi32>, i3237 %0 = spirv.GroupNonUniformBallotFindLSB <Subgroup> %value : vector<4xi32>, i3238 return %0: i3239}40 41// -----42 43func.func @group_non_uniform_ballot_find_lsb(%value : vector<4xi32>) -> i32 {44 // expected-error @+1 {{execution scope must be 'Workgroup' or 'Subgroup'}}45 %0 = spirv.GroupNonUniformBallotFindLSB <Device> %value : vector<4xi32>, i3246 return %0: i3247}48 49// -----50 51func.func @group_non_uniform_ballot_find_lsb(%value : vector<4xi32>) -> si32 {52 // expected-error @+1 {{op result #0 must be 8/16/32/64-bit signless/unsigned integer, but got 'si32'}}53 %0 = spirv.GroupNonUniformBallotFindLSB <Subgroup> %value : vector<4xi32>, si3254 return %0: si3255}56 57// -----58 59//===----------------------------------------------------------------------===//60// spirv.GroupNonUniformBallotFindLSB61//===----------------------------------------------------------------------===//62 63func.func @group_non_uniform_ballot_find_msb(%value : vector<4xi32>) -> i32 {64 // CHECK: %{{.*}} = spirv.GroupNonUniformBallotFindMSB <Subgroup> %{{.*}}: vector<4xi32>, i3265 %0 = spirv.GroupNonUniformBallotFindMSB <Subgroup> %value : vector<4xi32>, i3266 return %0: i3267}68 69// -----70 71func.func @group_non_uniform_ballot_find_msb(%value : vector<4xi32>) -> i32 {72 // expected-error @+1 {{execution scope must be 'Workgroup' or 'Subgroup'}}73 %0 = spirv.GroupNonUniformBallotFindMSB <Device> %value : vector<4xi32>, i3274 return %0: i3275}76 77// -----78 79func.func @group_non_uniform_ballot_find_msb(%value : vector<4xi32>) -> si32 {80 // expected-error @+1 {{op result #0 must be 8/16/32/64-bit signless/unsigned integer, but got 'si32'}}81 %0 = spirv.GroupNonUniformBallotFindMSB <Subgroup> %value : vector<4xi32>, si3282 return %0: si3283}84 85// -----86 87//===----------------------------------------------------------------------===//88// spirv.NonUniformGroupBroadcast89//===----------------------------------------------------------------------===//90 91func.func @group_non_uniform_broadcast_scalar(%value: f32) -> f32 {92 %one = spirv.Constant 1 : i3293 // CHECK: spirv.GroupNonUniformBroadcast <Workgroup> %{{.*}}, %{{.*}} : f32, i3294 %0 = spirv.GroupNonUniformBroadcast <Workgroup> %value, %one : f32, i3295 return %0: f3296}97 98// -----99 100func.func @group_non_uniform_broadcast_vector(%value: vector<4xf32>) -> vector<4xf32> {101 %one = spirv.Constant 1 : i32102 // CHECK: spirv.GroupNonUniformBroadcast <Subgroup> %{{.*}}, %{{.*}} : vector<4xf32>, i32103 %0 = spirv.GroupNonUniformBroadcast <Subgroup> %value, %one : vector<4xf32>, i32104 return %0: vector<4xf32>105}106 107// -----108 109func.func @group_non_uniform_broadcast_negative_scope(%value: f32, %localid: i32 ) -> f32 {110 %one = spirv.Constant 1 : i32111 // expected-error @+1 {{execution scope must be 'Workgroup' or 'Subgroup'}}112 %0 = spirv.GroupNonUniformBroadcast <Device> %value, %one : f32, i32113 return %0: f32114}115 116// -----117 118func.func @group_non_uniform_broadcast_negative_non_const(%value: f32, %localid: i32) -> f32 {119 // expected-error @+1 {{id must be the result of a constant op}}120 %0 = spirv.GroupNonUniformBroadcast <Subgroup> %value, %localid : f32, i32121 return %0: f32122}123 124// -----125 126//===----------------------------------------------------------------------===//127// spirv.GroupNonUniformElect128//===----------------------------------------------------------------------===//129 130// CHECK-LABEL: @group_non_uniform_elect131func.func @group_non_uniform_elect() -> i1 {132 // CHECK: %{{.+}} = spirv.GroupNonUniformElect <Workgroup> : i1133 %0 = spirv.GroupNonUniformElect <Workgroup> : i1134 return %0: i1135}136 137// -----138 139func.func @group_non_uniform_elect() -> i1 {140 // expected-error @+1 {{execution scope must be 'Workgroup' or 'Subgroup'}}141 %0 = spirv.GroupNonUniformElect <CrossDevice> : i1142 return %0: i1143}144 145// -----146 147//===----------------------------------------------------------------------===//148// spirv.GroupNonUniformFAdd149//===----------------------------------------------------------------------===//150 151// CHECK-LABEL: @group_non_uniform_fadd_reduce152func.func @group_non_uniform_fadd_reduce(%val: f32) -> f32 {153 // CHECK: %{{.+}} = spirv.GroupNonUniformFAdd <Workgroup> <Reduce> %{{.+}} : f32 -> f32154 %0 = spirv.GroupNonUniformFAdd <Workgroup> <Reduce> %val : f32 -> f32155 return %0: f32156}157 158// CHECK-LABEL: @group_non_uniform_fadd_clustered_reduce159func.func @group_non_uniform_fadd_clustered_reduce(%val: vector<2xf32>) -> vector<2xf32> {160 %four = spirv.Constant 4 : i32161 // CHECK: %{{.+}} = spirv.GroupNonUniformFAdd <Workgroup> <ClusteredReduce> %{{.+}} cluster_size(%{{.+}}) : vector<2xf32>, i32 -> vector<2xf32>162 %0 = spirv.GroupNonUniformFAdd <Workgroup> <ClusteredReduce> %val cluster_size(%four) : vector<2xf32>, i32 -> vector<2xf32>163 return %0: vector<2xf32>164}165 166//===----------------------------------------------------------------------===//167// spirv.GroupNonUniformFMul168//===----------------------------------------------------------------------===//169 170// CHECK-LABEL: @group_non_uniform_fmul_reduce171func.func @group_non_uniform_fmul_reduce(%val: f32) -> f32 {172 // CHECK: %{{.+}} = spirv.GroupNonUniformFMul <Workgroup> <Reduce> %{{.+}} : f32 -> f32173 %0 = spirv.GroupNonUniformFMul <Workgroup> <Reduce> %val : f32 -> f32174 return %0: f32175}176 177// CHECK-LABEL: @group_non_uniform_fmul_clustered_reduce178func.func @group_non_uniform_fmul_clustered_reduce(%val: vector<2xf32>) -> vector<2xf32> {179 %four = spirv.Constant 4 : i32180 // CHECK: %{{.+}} = spirv.GroupNonUniformFMul <Workgroup> <ClusteredReduce> %{{.+}} cluster_size(%{{.+}}) : vector<2xf32>, i32 -> vector<2xf32>181 %0 = spirv.GroupNonUniformFMul <Workgroup> <ClusteredReduce> %val cluster_size(%four) : vector<2xf32>, i32 -> vector<2xf32>182 return %0: vector<2xf32>183}184 185// -----186 187func.func @group_non_uniform_bf16_fmul_reduce(%val: bf16) -> bf16 {188 // expected-error @+1 {{op operand #0 must be 16/32/64-bit float or fixed-length vector of 16/32/64-bit float values of length 2/3/4/8/16, but got 'bf16'}}189 %0 = spirv.GroupNonUniformFMul <Workgroup> <Reduce> %val : bf16 -> bf16190 return %0: bf16191}192 193// -----194 195//===----------------------------------------------------------------------===//196// spirv.GroupNonUniformFMax197//===----------------------------------------------------------------------===//198 199// CHECK-LABEL: @group_non_uniform_fmax_reduce200func.func @group_non_uniform_fmax_reduce(%val: f32) -> f32 {201 // CHECK: %{{.+}} = spirv.GroupNonUniformFMax <Workgroup> <Reduce> %{{.+}} : f32 -> f32202 %0 = spirv.GroupNonUniformFMax <Workgroup> <Reduce> %val : f32 -> f32203 return %0: f32204}205 206// -----207 208func.func @group_non_uniform_bf16_fmax_reduce(%val: bf16) -> bf16 {209 // expected-error @+1 {{op operand #0 must be 16/32/64-bit float or fixed-length vector of 16/32/64-bit float values of length 2/3/4/8/16, but got 'bf16'}}210 %0 = spirv.GroupNonUniformFMax <Workgroup> <Reduce> %val : bf16 -> bf16211 return %0: bf16212}213 214// -----215 216//===----------------------------------------------------------------------===//217// spirv.GroupNonUniformFMin218//===----------------------------------------------------------------------===//219 220// CHECK-LABEL: @group_non_uniform_fmin_reduce221func.func @group_non_uniform_fmin_reduce(%val: f32) -> f32 {222 // CHECK: %{{.+}} = spirv.GroupNonUniformFMin <Workgroup> <Reduce> %{{.+}} : f32 -> f32223 %0 = spirv.GroupNonUniformFMin <Workgroup> <Reduce> %val : f32 -> f32224 return %0: f32225}226 227// -----228 229//===----------------------------------------------------------------------===//230// spirv.GroupNonUniformIAdd231//===----------------------------------------------------------------------===//232 233// CHECK-LABEL: @group_non_uniform_iadd_reduce234func.func @group_non_uniform_iadd_reduce(%val: i32) -> i32 {235 // CHECK: %{{.+}} = spirv.GroupNonUniformIAdd <Workgroup> <Reduce> %{{.+}} : i32 -> i32236 %0 = spirv.GroupNonUniformIAdd <Workgroup> <Reduce> %val : i32 -> i32237 return %0: i32238}239 240// CHECK-LABEL: @group_non_uniform_iadd_clustered_reduce241func.func @group_non_uniform_iadd_clustered_reduce(%val: vector<2xi32>) -> vector<2xi32> {242 %four = spirv.Constant 4 : i32243 // CHECK: %{{.+}} = spirv.GroupNonUniformIAdd <Workgroup> <ClusteredReduce> %{{.+}} cluster_size(%{{.+}}) : vector<2xi32>, i32 -> vector<2xi32>244 %0 = spirv.GroupNonUniformIAdd <Workgroup> <ClusteredReduce> %val cluster_size(%four) : vector<2xi32>, i32 -> vector<2xi32>245 return %0: vector<2xi32>246}247 248// -----249 250func.func @group_non_uniform_iadd_reduce(%val: i32) -> i32 {251 // expected-error @+1 {{execution scope must be 'Workgroup' or 'Subgroup'}}252 %0 = spirv.GroupNonUniformIAdd <Device> <Reduce> %val : i32 -> i32253 return %0: i32254}255 256// -----257 258func.func @group_non_uniform_iadd_clustered_reduce(%val: vector<2xi32>) -> vector<2xi32> {259 // expected-error @+1 {{cluster size operand must be provided for 'ClusteredReduce' group operation}}260 %0 = spirv.GroupNonUniformIAdd <Workgroup> <ClusteredReduce> %val : vector<2xi32> -> vector<2xi32>261 return %0: vector<2xi32>262}263 264// -----265 266func.func @group_non_uniform_iadd_clustered_reduce(%val: vector<2xi32>, %size: i32) -> vector<2xi32> {267 // expected-error @+1 {{cluster size operand must come from a constant op}}268 %0 = spirv.GroupNonUniformIAdd <Workgroup> <ClusteredReduce> %val cluster_size(%size) : vector<2xi32>, i32 -> vector<2xi32>269 return %0: vector<2xi32>270}271 272// -----273 274func.func @group_non_uniform_iadd_clustered_reduce(%val: vector<2xi32>) -> vector<2xi32> {275 %five = spirv.Constant 5 : i32276 // expected-error @+1 {{cluster size operand must be a power of two}}277 %0 = spirv.GroupNonUniformIAdd <Workgroup> <ClusteredReduce> %val cluster_size(%five) : vector<2xi32>, i32 -> vector<2xi32>278 return %0: vector<2xi32>279}280 281// -----282 283//===----------------------------------------------------------------------===//284// spirv.GroupNonUniformIMul285//===----------------------------------------------------------------------===//286 287// CHECK-LABEL: @group_non_uniform_imul_reduce288func.func @group_non_uniform_imul_reduce(%val: i32) -> i32 {289 // CHECK: %{{.+}} = spirv.GroupNonUniformIMul <Workgroup> <Reduce> %{{.+}} : i32 -> i32290 %0 = spirv.GroupNonUniformIMul <Workgroup> <Reduce> %val : i32 -> i32291 return %0: i32292}293 294// CHECK-LABEL: @group_non_uniform_imul_clustered_reduce295func.func @group_non_uniform_imul_clustered_reduce(%val: vector<2xi32>) -> vector<2xi32> {296 %four = spirv.Constant 4 : i32297 // CHECK: %{{.+}} = spirv.GroupNonUniformIMul <Workgroup> <ClusteredReduce> %{{.+}} cluster_size(%{{.+}}) : vector<2xi32>, i32 -> vector<2xi32>298 %0 = spirv.GroupNonUniformIMul <Workgroup> <ClusteredReduce> %val cluster_size(%four) : vector<2xi32>, i32 -> vector<2xi32>299 return %0: vector<2xi32>300}301 302// -----303 304//===----------------------------------------------------------------------===//305// spirv.GroupNonUniformSMax306//===----------------------------------------------------------------------===//307 308// CHECK-LABEL: @group_non_uniform_smax_reduce309func.func @group_non_uniform_smax_reduce(%val: i32) -> i32 {310 // CHECK: %{{.+}} = spirv.GroupNonUniformSMax <Workgroup> <Reduce> %{{.+}} : i32 -> i32311 %0 = spirv.GroupNonUniformSMax <Workgroup> <Reduce> %val : i32 -> i32312 return %0: i32313}314 315// -----316 317//===----------------------------------------------------------------------===//318// spirv.GroupNonUniformSMin319//===----------------------------------------------------------------------===//320 321// CHECK-LABEL: @group_non_uniform_smin_reduce322func.func @group_non_uniform_smin_reduce(%val: i32) -> i32 {323 // CHECK: %{{.+}} = spirv.GroupNonUniformSMin <Workgroup> <Reduce> %{{.+}} : i32 -> i32324 %0 = spirv.GroupNonUniformSMin <Workgroup> <Reduce> %val : i32 -> i32325 return %0: i32326}327 328// -----329 330//===----------------------------------------------------------------------===//331// spirv.GroupNonUniformShuffle332//===----------------------------------------------------------------------===//333 334// CHECK-LABEL: @group_non_uniform_shuffle1335func.func @group_non_uniform_shuffle1(%val: f32, %id: i32) -> f32 {336 // CHECK: %{{.+}} = spirv.GroupNonUniformShuffle <Subgroup> %{{.+}}, %{{.+}} : f32, i32337 %0 = spirv.GroupNonUniformShuffle <Subgroup> %val, %id : f32, i32338 return %0: f32339}340 341// CHECK-LABEL: @group_non_uniform_shuffle2342func.func @group_non_uniform_shuffle2(%val: vector<2xf32>, %id: i32) -> vector<2xf32> {343 // CHECK: %{{.+}} = spirv.GroupNonUniformShuffle <Subgroup> %{{.+}}, %{{.+}} : vector<2xf32>, i32344 %0 = spirv.GroupNonUniformShuffle <Subgroup> %val, %id : vector<2xf32>, i32345 return %0: vector<2xf32>346}347 348// -----349 350func.func @group_non_uniform_shuffle(%val: vector<2xf32>, %id: i32) -> vector<2xf32> {351 // expected-error @+1 {{execution scope must be 'Workgroup' or 'Subgroup'}}352 %0 = spirv.GroupNonUniformShuffle <Device> %val, %id : vector<2xf32>, i32353 return %0: vector<2xf32>354}355 356// -----357 358func.func @group_non_uniform_shuffle(%val: vector<2xf32>, %id: si32) -> vector<2xf32> {359 // expected-error @+1 {{second operand must be a singless/unsigned integer}}360 %0 = spirv.GroupNonUniformShuffle <Subgroup> %val, %id : vector<2xf32>, si32361 return %0: vector<2xf32>362}363 364// -----365 366//===----------------------------------------------------------------------===//367// spirv.GroupNonUniformShuffleXor368//===----------------------------------------------------------------------===//369 370// CHECK-LABEL: @group_non_uniform_shuffle1371func.func @group_non_uniform_shuffle1(%val: f32, %id: i32) -> f32 {372 // CHECK: %{{.+}} = spirv.GroupNonUniformShuffleXor <Subgroup> %{{.+}}, %{{.+}} : f32, i32373 %0 = spirv.GroupNonUniformShuffleXor <Subgroup> %val, %id : f32, i32374 return %0: f32375}376 377// CHECK-LABEL: @group_non_uniform_shuffle2378func.func @group_non_uniform_shuffle2(%val: vector<2xf32>, %id: i32) -> vector<2xf32> {379 // CHECK: %{{.+}} = spirv.GroupNonUniformShuffleXor <Subgroup> %{{.+}}, %{{.+}} : vector<2xf32>, i32380 %0 = spirv.GroupNonUniformShuffleXor <Subgroup> %val, %id : vector<2xf32>, i32381 return %0: vector<2xf32>382}383 384// -----385 386func.func @group_non_uniform_shuffle(%val: vector<2xf32>, %id: i32) -> vector<2xf32> {387 // expected-error @+1 {{execution scope must be 'Workgroup' or 'Subgroup'}}388 %0 = spirv.GroupNonUniformShuffleXor <Device> %val, %id : vector<2xf32>, i32389 return %0: vector<2xf32>390}391 392// -----393 394func.func @group_non_uniform_shuffle(%val: vector<2xf32>, %id: si32) -> vector<2xf32> {395 // expected-error @+1 {{second operand must be a singless/unsigned integer}}396 %0 = spirv.GroupNonUniformShuffleXor <Subgroup> %val, %id : vector<2xf32>, si32397 return %0: vector<2xf32>398}399 400// -----401 402//===----------------------------------------------------------------------===//403// spirv.GroupNonUniformShuffleUp404//===----------------------------------------------------------------------===//405 406// CHECK-LABEL: @group_non_uniform_shuffle1407func.func @group_non_uniform_shuffle1(%val: f32, %id: i32) -> f32 {408 // CHECK: %{{.+}} = spirv.GroupNonUniformShuffleUp <Subgroup> %{{.+}}, %{{.+}} : f32, i32409 %0 = spirv.GroupNonUniformShuffleUp <Subgroup> %val, %id : f32, i32410 return %0: f32411}412 413// CHECK-LABEL: @group_non_uniform_shuffle2414func.func @group_non_uniform_shuffle2(%val: vector<2xf32>, %id: i32) -> vector<2xf32> {415 // CHECK: %{{.+}} = spirv.GroupNonUniformShuffleUp <Subgroup> %{{.+}}, %{{.+}} : vector<2xf32>, i32416 %0 = spirv.GroupNonUniformShuffleUp <Subgroup> %val, %id : vector<2xf32>, i32417 return %0: vector<2xf32>418}419 420// -----421 422func.func @group_non_uniform_shuffle(%val: vector<2xf32>, %id: i32) -> vector<2xf32> {423 // expected-error @+1 {{execution scope must be 'Workgroup' or 'Subgroup'}}424 %0 = spirv.GroupNonUniformShuffleUp <Device> %val, %id : vector<2xf32>, i32425 return %0: vector<2xf32>426}427 428// -----429 430func.func @group_non_uniform_shuffle(%val: vector<2xf32>, %id: si32) -> vector<2xf32> {431 // expected-error @+1 {{second operand must be a singless/unsigned integer}}432 %0 = spirv.GroupNonUniformShuffleUp <Subgroup> %val, %id : vector<2xf32>, si32433 return %0: vector<2xf32>434}435 436// -----437 438//===----------------------------------------------------------------------===//439// spirv.GroupNonUniformShuffleDown440//===----------------------------------------------------------------------===//441 442// CHECK-LABEL: @group_non_uniform_shuffle1443func.func @group_non_uniform_shuffle1(%val: f32, %id: i32) -> f32 {444 // CHECK: %{{.+}} = spirv.GroupNonUniformShuffleDown <Subgroup> %{{.+}}, %{{.+}} : f32, i32445 %0 = spirv.GroupNonUniformShuffleDown <Subgroup> %val, %id : f32, i32446 return %0: f32447}448 449// CHECK-LABEL: @group_non_uniform_shuffle2450func.func @group_non_uniform_shuffle2(%val: vector<2xf32>, %id: i32) -> vector<2xf32> {451 // CHECK: %{{.+}} = spirv.GroupNonUniformShuffleDown <Subgroup> %{{.+}}, %{{.+}} : vector<2xf32>, i32452 %0 = spirv.GroupNonUniformShuffleDown <Subgroup> %val, %id : vector<2xf32>, i32453 return %0: vector<2xf32>454}455 456// -----457 458func.func @group_non_uniform_shuffle(%val: vector<2xf32>, %id: i32) -> vector<2xf32> {459 // expected-error @+1 {{execution scope must be 'Workgroup' or 'Subgroup'}}460 %0 = spirv.GroupNonUniformShuffleDown <Device> %val, %id : vector<2xf32>, i32461 return %0: vector<2xf32>462}463 464// -----465 466func.func @group_non_uniform_shuffle(%val: vector<2xf32>, %id: si32) -> vector<2xf32> {467 // expected-error @+1 {{second operand must be a singless/unsigned integer}}468 %0 = spirv.GroupNonUniformShuffleDown <Subgroup> %val, %id : vector<2xf32>, si32469 return %0: vector<2xf32>470}471 472// -----473 474//===----------------------------------------------------------------------===//475// spirv.GroupNonUniformUMax476//===----------------------------------------------------------------------===//477 478// CHECK-LABEL: @group_non_uniform_umax_reduce479func.func @group_non_uniform_umax_reduce(%val: i32) -> i32 {480 // CHECK: %{{.+}} = spirv.GroupNonUniformUMax <Workgroup> <Reduce> %{{.+}} : i32 -> i32481 %0 = spirv.GroupNonUniformUMax <Workgroup> <Reduce> %val : i32 -> i32482 return %0: i32483}484 485// -----486 487//===----------------------------------------------------------------------===//488// spirv.GroupNonUniformUMin489//===----------------------------------------------------------------------===//490 491// CHECK-LABEL: @group_non_uniform_umin_reduce492func.func @group_non_uniform_umin_reduce(%val: i32) -> i32 {493 // CHECK: %{{.+}} = spirv.GroupNonUniformUMin <Workgroup> <Reduce> %{{.+}} : i32 -> i32494 %0 = spirv.GroupNonUniformUMin <Workgroup> <Reduce> %val : i32 -> i32495 return %0: i32496}497 498// -----499 500//===----------------------------------------------------------------------===//501// spirv.GroupNonUniformBitwiseAnd502//===----------------------------------------------------------------------===//503 504// CHECK-LABEL: @group_non_uniform_bitwise_and505func.func @group_non_uniform_bitwise_and(%val: i32) -> i32 {506 // CHECK: %{{.+}} = spirv.GroupNonUniformBitwiseAnd <Workgroup> <Reduce> %{{.+}} : i32 -> i32507 %0 = spirv.GroupNonUniformBitwiseAnd <Workgroup> <Reduce> %val : i32 -> i32508 return %0: i32509}510 511// -----512 513func.func @group_non_uniform_bitwise_and(%val: i1) -> i1 {514 // expected-error @+1 {{operand #0 must be 8/16/32/64-bit integer or fixed-length vector of 8/16/32/64-bit integer values of length 2/3/4/8/16, but got 'i1'}}515 %0 = spirv.GroupNonUniformBitwiseAnd <Workgroup> <Reduce> %val : i1 -> i1516 return %0: i1517}518 519// -----520 521//===----------------------------------------------------------------------===//522// spirv.GroupNonUniformBitwiseOr523//===----------------------------------------------------------------------===//524 525// CHECK-LABEL: @group_non_uniform_bitwise_or526func.func @group_non_uniform_bitwise_or(%val: i32) -> i32 {527 // CHECK: %{{.+}} = spirv.GroupNonUniformBitwiseOr <Workgroup> <Reduce> %{{.+}} : i32 -> i32528 %0 = spirv.GroupNonUniformBitwiseOr <Workgroup> <Reduce> %val : i32 -> i32529 return %0: i32530}531 532// -----533 534func.func @group_non_uniform_bitwise_or(%val: i1) -> i1 {535 // expected-error @+1 {{operand #0 must be 8/16/32/64-bit integer or fixed-length vector of 8/16/32/64-bit integer values of length 2/3/4/8/16, but got 'i1'}}536 %0 = spirv.GroupNonUniformBitwiseOr <Workgroup> <Reduce> %val : i1 -> i1537 return %0: i1538}539 540// -----541 542//===----------------------------------------------------------------------===//543// spirv.GroupNonUniformBitwiseXor544//===----------------------------------------------------------------------===//545 546// CHECK-LABEL: @group_non_uniform_bitwise_xor547func.func @group_non_uniform_bitwise_xor(%val: i32) -> i32 {548 // CHECK: %{{.+}} = spirv.GroupNonUniformBitwiseXor <Workgroup> <Reduce> %{{.+}} : i32 -> i32549 %0 = spirv.GroupNonUniformBitwiseXor <Workgroup> <Reduce> %val : i32 -> i32550 return %0: i32551}552 553// -----554 555func.func @group_non_uniform_bitwise_xor(%val: i1) -> i1 {556 // expected-error @+1 {{operand #0 must be 8/16/32/64-bit integer or fixed-length vector of 8/16/32/64-bit integer values of length 2/3/4/8/16, but got 'i1'}}557 %0 = spirv.GroupNonUniformBitwiseXor <Workgroup> <Reduce> %val : i1 -> i1558 return %0: i1559}560 561// -----562 563//===----------------------------------------------------------------------===//564// spirv.GroupNonUniformLogicalAnd565//===----------------------------------------------------------------------===//566 567// CHECK-LABEL: @group_non_uniform_logical_and568func.func @group_non_uniform_logical_and(%val: i1) -> i1 {569 // CHECK: %{{.+}} = spirv.GroupNonUniformLogicalAnd <Workgroup> <Reduce> %{{.+}} : i1 -> i1570 %0 = spirv.GroupNonUniformLogicalAnd <Workgroup> <Reduce> %val : i1 -> i1571 return %0: i1572}573 574// -----575 576func.func @group_non_uniform_logical_and(%val: i32) -> i32 {577 // expected-error @+1 {{operand #0 must be bool or fixed-length vector of bool values of length 2/3/4/8/16, but got 'i32'}}578 %0 = spirv.GroupNonUniformLogicalAnd <Workgroup> <Reduce> %val : i32 -> i32579 return %0: i32580}581 582// -----583 584//===----------------------------------------------------------------------===//585// spirv.GroupNonUniformLogicalOr586//===----------------------------------------------------------------------===//587 588// CHECK-LABEL: @group_non_uniform_logical_or589func.func @group_non_uniform_logical_or(%val: i1) -> i1 {590 // CHECK: %{{.+}} = spirv.GroupNonUniformLogicalOr <Workgroup> <Reduce> %{{.+}} : i1 -> i1591 %0 = spirv.GroupNonUniformLogicalOr <Workgroup> <Reduce> %val : i1 -> i1592 return %0: i1593}594 595// -----596 597func.func @group_non_uniform_logical_or(%val: i32) -> i32 {598 // expected-error @+1 {{operand #0 must be bool or fixed-length vector of bool values of length 2/3/4/8/16, but got 'i32'}}599 %0 = spirv.GroupNonUniformLogicalOr <Workgroup> <Reduce> %val : i32 -> i32600 return %0: i32601}602 603// -----604 605//===----------------------------------------------------------------------===//606// spirv.GroupNonUniformLogicalXor607//===----------------------------------------------------------------------===//608 609// CHECK-LABEL: @group_non_uniform_logical_xor610func.func @group_non_uniform_logical_xor(%val: i1) -> i1 {611 // CHECK: %{{.+}} = spirv.GroupNonUniformLogicalXor <Workgroup> <Reduce> %{{.+}} : i1 -> i1612 %0 = spirv.GroupNonUniformLogicalXor <Workgroup> <Reduce> %val : i1 -> i1613 return %0: i1614}615 616// -----617 618func.func @group_non_uniform_logical_xor(%val: i32) -> i32 {619 // expected-error @+1 {{operand #0 must be bool or fixed-length vector of bool values of length 2/3/4/8/16, but got 'i32'}}620 %0 = spirv.GroupNonUniformLogicalXor <Workgroup> <Reduce> %val : i32 -> i32621 return %0: i32622}623 624// -----625 626//===----------------------------------------------------------------------===//627// spirv.GroupNonUniformRotateKHR628//===----------------------------------------------------------------------===//629 630// CHECK-LABEL: @group_non_uniform_rotate_khr631func.func @group_non_uniform_rotate_khr(%val: f32, %delta: i32) -> f32 {632 // CHECK: %{{.+}} = spirv.GroupNonUniformRotateKHR <Subgroup> %{{.+}} : f32, i32 -> f32633 %0 = spirv.GroupNonUniformRotateKHR <Subgroup> %val, %delta : f32, i32 -> f32634 return %0: f32635}636 637// -----638 639// CHECK-LABEL: @group_non_uniform_rotate_khr640func.func @group_non_uniform_rotate_khr(%val: f32, %delta: i32) -> f32 {641 // CHECK: %{{.+}} = spirv.GroupNonUniformRotateKHR <Workgroup> %{{.+}} : f32, i32, i32 -> f32642 %four = spirv.Constant 4 : i32643 %0 = spirv.GroupNonUniformRotateKHR <Workgroup> %val, %delta, cluster_size(%four) : f32, i32, i32 -> f32644 return %0: f32645}646 647// -----648 649func.func @group_non_uniform_rotate_khr(%val: f32, %delta: i32) -> f32 {650 %four = spirv.Constant 4 : i32651 // expected-error @+1 {{execution scope must be 'Workgroup' or 'Subgroup'}}652 %0 = spirv.GroupNonUniformRotateKHR <Device> %val, %delta, cluster_size(%four) : f32, i32, i32 -> f32653 return %0: f32654}655 656// -----657 658func.func @group_non_uniform_rotate_khr(%val: f32, %delta: si32) -> f32 {659 %four = spirv.Constant 4 : i32660 // expected-error @+1 {{op operand #1 must be 8/16/32/64-bit signless/unsigned integer, but got 'si32'}}661 %0 = spirv.GroupNonUniformRotateKHR <Subgroup> %val, %delta, cluster_size(%four) : f32, si32, i32 -> f32662 return %0: f32663}664 665// -----666 667func.func @group_non_uniform_rotate_khr(%val: f32, %delta: i32) -> f32 {668 %four = spirv.Constant 4 : si32669 // expected-error @+1 {{op operand #2 must be 8/16/32/64-bit signless/unsigned integer, but got 'si32'}}670 %0 = spirv.GroupNonUniformRotateKHR <Subgroup> %val, %delta, cluster_size(%four) : f32, i32, si32 -> f32671 return %0: f32672}673 674// -----675 676func.func @group_non_uniform_rotate_khr(%val: f32, %delta: i32, %four: i32) -> f32 {677 // expected-error @+1 {{cluster size operand must come from a constant op}}678 %0 = spirv.GroupNonUniformRotateKHR <Subgroup> %val, %delta, cluster_size(%four) : f32, i32, i32 -> f32679 return %0: f32680}681 682// -----683 684func.func @group_non_uniform_rotate_khr(%val: f32, %delta: i32) -> f32 {685 %five = spirv.Constant 5 : i32686 // expected-error @+1 {{cluster size operand must be a power of two}}687 %0 = spirv.GroupNonUniformRotateKHR <Subgroup> %val, %delta, cluster_size(%five) : f32, i32, i32 -> f32688 return %0: f32689}690 691// -----692 693//===----------------------------------------------------------------------===//694// spirv.GroupNonUniformAll695//===----------------------------------------------------------------------===//696 697// CHECK-LABEL: @group_non_uniform_all698func.func @group_non_uniform_all(%predicate: i1) -> i1 {699 // CHECK: %{{.+}} = spirv.GroupNonUniformAll <Subgroup> %{{.+}} : i1700 %0 = spirv.GroupNonUniformAll <Subgroup> %predicate : i1701 return %0: i1702}703 704// -----705 706func.func @group_non_uniform_all(%predicate: i1) -> i1 {707 // expected-error @+1 {{execution_scope must be Scope of value Subgroup}}708 %0 = spirv.GroupNonUniformAll <Device> %predicate : i1709 return %0: i1710}711 712// -----713 714//===----------------------------------------------------------------------===//715// spirv.GroupNonUniformAny716//===----------------------------------------------------------------------===//717 718// CHECK-LABEL: @group_non_uniform_any719func.func @group_non_uniform_any(%predicate: i1) -> i1 {720 // CHECK: %{{.+}} = spirv.GroupNonUniformAny <Subgroup> %{{.+}} : i1721 %0 = spirv.GroupNonUniformAny <Subgroup> %predicate : i1722 return %0: i1723}724 725// -----726 727func.func @group_non_uniform_any(%predicate: i1) -> i1 {728 // expected-error @+1 {{execution_scope must be Scope of value Subgroup}}729 %0 = spirv.GroupNonUniformAny <Device> %predicate : i1730 return %0: i1731}732 733// -----734 735//===----------------------------------------------------------------------===//736// spirv.GroupNonUniformAllEqual737//===----------------------------------------------------------------------===//738 739// CHECK-LABEL: @group_non_uniform_all_equal740func.func @group_non_uniform_all_equal(%value: f32) -> i1 {741 // CHECK: %{{.+}} = spirv.GroupNonUniformAllEqual <Subgroup> %{{.+}} : f32, i1742 %0 = spirv.GroupNonUniformAllEqual <Subgroup> %value : f32, i1743 return %0: i1744}745 746// -----747 748// CHECK-LABEL: @group_non_uniform_all_equal749func.func @group_non_uniform_all_equal(%value: vector<4xi32>) -> i1 {750 // CHECK: %{{.+}} = spirv.GroupNonUniformAllEqual <Subgroup> %{{.+}} : vector<4xi32>, i1751 %0 = spirv.GroupNonUniformAllEqual <Subgroup> %value : vector<4xi32>, i1752 return %0: i1753}754 755 756// -----757 758func.func @group_non_uniform_all_equal(%value: f32) -> i1 {759 // expected-error @+1 {{execution_scope must be Scope of value Subgroup}}760 %0 = spirv.GroupNonUniformAllEqual <Device> %value : f32, i1761 return %0: i1762}763