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1// RUN: mlir-opt %s -split-input-file -test-bit-width-constrained-vector-linearize=target-vector-bitwidth=128 | FileCheck %s --check-prefixes=ALL,BW-1282// RUN: mlir-opt %s -split-input-file -test-bit-width-constrained-vector-linearize=target-vector-bitwidth=0 | FileCheck %s --check-prefixes=ALL,BW-03 4// A vector<2x2xf32> has inner-most dimension with 64-bits. Check that at5// bitwidth threshold 128 (>= 64), operations are linearized, and at6// bitwidth threshold 0 (< 64), operations are not linearized.7 8// ALL-LABEL: test_result_bitwidth_649func.func @test_result_bitwidth_64(%arg0: vector<2x2xf32>) -> vector<2x2xf32> {10 11 // BW-128: arith.constant {{.*}} vector<4xf32>12 // BW-0: arith.constant {{.*}} vector<2x2xf32>13 %0 = arith.constant dense<[[1.0, 2.0], [3.0, 4.0]]> : vector<2x2xf32>14 15 // BW-128: math.sin {{.*}} vector<4xf32>16 // BW-0: math.sin {{.*}} vector<2x2xf32>17 %1 = math.sin %arg0 : vector<2x2xf32>18 19 return %0 : vector<2x2xf32>20}21 22// -----23 24// The size of the 'index' type is backend specific, so we cannot guarantee that25// the inner-most dimension below (of size 2*nbBits(index)) is below any bitwidth26// threshold. Test that operations with vectors of index type are not linearized.27 28// ALL-LABEL: test_index_no_linearize29func.func @test_index_no_linearize(%arg0: vector<2x2xindex>, %arg1: vector<2x2xindex>) -> vector<2x2xindex> {30 31 // BW-128: %[[ADD:.*]] = arith.addi {{.*}} : vector<2x2xindex>32 // BW-0: %[[ADD:.*]] = arith.addi {{.*}} : vector<2x2xindex>33 %0 = arith.addi %arg0, %arg1 : vector<2x2xindex>34 return %0 : vector<2x2xindex>35}36 37// -----38 39// The logic for the insert op with regards to the bitwidth threshold is40// different to the other ops, so we test it here. Specifically, the logic41// is based on the bitwidth of the value to store.42 43// ALL-LABEL: test_vector_insert44// ALL-SAME: (%[[DEST:.*]]: vector<2x8x4xf32>, %[[SRC:.*]]: vector<8x4xf32>) -> vector<2x8x4xf32> {45func.func @test_vector_insert(%arg0: vector<2x8x4xf32>, %arg1: vector<8x4xf32>) -> vector<2x8x4xf32> {46 47 // BW-128-DAG: %[[ARG_SRC:.*]] = vector.shape_cast %[[SRC]] : vector<8x4xf32> to vector<32xf32>48 // BW-128-DAG: %[[ARG_DEST:.*]] = vector.shape_cast %[[DEST]] : vector<2x8x4xf32> to vector<64xf32>49 // BW-128: %[[SHUFFLE:.*]] = vector.shuffle %[[ARG_DEST]], %[[ARG_SRC]]50 // BW-128: %[[RES:.*]] = vector.shape_cast %[[SHUFFLE]] : vector<64xf32> to vector<2x8x4xf32>51 // BW-128: return %[[RES]] : vector<2x8x4xf32>52 53 // BW-0: %[[RES:.*]] = vector.insert %[[SRC]], %[[DEST]] [0] : vector<8x4xf32> into vector<2x8x4xf32>54 // BW-0: return %[[RES]] : vector<2x8x4xf32>55 56 %0 = vector.insert %arg1, %arg0[0]: vector<8x4xf32> into vector<2x8x4xf32>57 return %0 : vector<2x8x4xf32>58}59