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1// REQUIRES: target=x86{{.*}}2 3// RUN: mlir-opt %s \4// RUN: -convert-vector-to-llvm="enable-x86vector" -convert-to-llvm \5// RUN: -reconcile-unrealized-casts | \6// RUN: mlir-translate --mlir-to-llvmir | \7// RUN: llc -mcpu=sapphirerapids | \8// RUN: FileCheck %s9 10func.func @avx512bf16_dot_128(%src: vector<4xf32>, %a: vector<8xbf16>,11 %b: vector<8xbf16>) -> vector<4xf32> {12 %0 = x86vector.avx512.dot %src, %a, %b : vector<8xbf16> -> vector<4xf32>13 return %0 : vector<4xf32>14}15// CHECK-LABEL: avx512bf16_dot_128:16// CHECK: vdpbf16ps{{.*}}%xmm17 18func.func @avx512bf16_dot_256(%src: vector<8xf32>, %a: vector<16xbf16>,19 %b: vector<16xbf16>) -> vector<8xf32> {20 %0 = x86vector.avx512.dot %src, %a, %b : vector<16xbf16> -> vector<8xf32>21 return %0 : vector<8xf32>22}23// CHECK-LABEL: avx512bf16_dot_256:24// CHECK: vdpbf16ps{{.*}}%ymm25 26func.func @avx512bf16_dot_512(%src: vector<16xf32>, %a: vector<32xbf16>,27 %b: vector<32xbf16>) -> vector<16xf32> {28 %0 = x86vector.avx512.dot %src, %a, %b : vector<32xbf16> -> vector<16xf32>29 return %0 : vector<16xf32>30}31// CHECK-LABEL: avx512bf16_dot_512:32// CHECK: vdpbf16ps{{.*}}%zmm33