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1//--------------------------------------------------------------------------------------------------2// WHEN CREATING A NEW TEST, PLEASE JUST COPY & PASTE WITHOUT EDITS.3//4// Set-up that's shared across all tests in this directory. In principle, this5// config could be moved to lit.local.cfg. However, there are downstream users that6// do not use these LIT config files. Hence why this is kept inline.7//8// DEFINE: %{sparsifier_opts} = enable-runtime-library=true9// DEFINE: %{sparsifier_opts_sve} = enable-arm-sve=true %{sparsifier_opts}10// DEFINE: %{compile} = mlir-opt %s --sparsifier="%{sparsifier_opts}"11// DEFINE: %{compile_sve} = mlir-opt %s --sparsifier="%{sparsifier_opts_sve}"12// DEFINE: %{run_libs} = -shared-libs=%mlir_c_runner_utils,%mlir_runner_utils13// DEFINE: %{run_libs_sve} = -shared-libs=%native_mlir_runner_utils,%native_mlir_c_runner_utils14// DEFINE: %{run_opts} = -e main -entry-point-result=void15// DEFINE: %{run} = mlir-runner %{run_opts} %{run_libs}16// DEFINE: %{run_sve} = %mcr_aarch64_cmd --march=aarch64 --mattr="+sve" %{run_opts} %{run_libs_sve}17//18// DEFINE: %{env} =19//--------------------------------------------------------------------------------------------------20 21// RUN: %{compile} | %{run} | FileCheck %s22//23// Do the same run, but now with direct IR generation.24// REDEFINE: %{sparsifier_opts} = enable-runtime-library=false enable-buffer-initialization=true25// RUN: %{compile} | %{run} | FileCheck %s26//27// Do the same run, but now with direct IR generation and vectorization.28// REDEFINE: %{sparsifier_opts} = enable-runtime-library=false enable-buffer-initialization=true vl=2 reassociate-fp-reductions=true enable-index-optimizations=true29// RUN: %{compile} | %{run} | FileCheck %s30//31// Do the same run, but now with direct IR generation and VLA vectorization.32// RUN: %if mlir_arm_sve_tests %{ %{compile_sve} | %{run_sve} | FileCheck %s %}33 34#DCSR = #sparse_tensor.encoding<{35 map = (d0, d1) -> (d0 : compressed, d1 : compressed),36 posWidth = 8,37 crdWidth = 838}>39 40#DCSC = #sparse_tensor.encoding<{41 map = (d0, d1) -> (d1 : compressed, d0 : compressed),42 posWidth = 64,43 crdWidth = 6444}>45 46#CSC = #sparse_tensor.encoding<{47 map = (d0, d1) -> (d1 : dense, d0 : compressed),48 posWidth = 16,49 crdWidth = 3250}>51 52//53// Integration test that tests conversions between sparse tensors,54// where the position and index sizes in the overhead storage change55// in addition to layout.56//57module {58 func.func @main() {59 %c1 = arith.constant 1 : index60 %t1 = arith.constant sparse<61 [ [0,0], [0,1], [0,63], [1,0], [1,1], [31,0], [31,63] ],62 [ 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0 ]> : tensor<32x64xf64>63 %t2 = tensor.cast %t1 : tensor<32x64xf64> to tensor<?x?xf64>64 65 // Dense to sparse.66 %1 = sparse_tensor.convert %t1 : tensor<32x64xf64> to tensor<32x64xf64, #DCSR>67 %2 = sparse_tensor.convert %t1 : tensor<32x64xf64> to tensor<32x64xf64, #DCSC>68 %3 = sparse_tensor.convert %t1 : tensor<32x64xf64> to tensor<32x64xf64, #CSC>69 70 // Sparse to sparse.71 %4 = sparse_tensor.convert %1 : tensor<32x64xf64, #DCSR> to tensor<32x64xf64, #DCSC>72 %5 = sparse_tensor.convert %2 : tensor<32x64xf64, #DCSC> to tensor<32x64xf64, #DCSR>73 %6 = sparse_tensor.convert %3 : tensor<32x64xf64, #CSC> to tensor<32x64xf64, #DCSR>74 75 //76 // Verify the outputs.77 //78 // CHECK: ---- Sparse Tensor ----79 // CHECK-NEXT: nse = 780 // CHECK-NEXT: dim = ( 32, 64 )81 // CHECK-NEXT: lvl = ( 32, 64 )82 // CHECK-NEXT: pos[0] : ( 0, 3 )83 // CHECK-NEXT: crd[0] : ( 0, 1, 31 )84 // CHECK-NEXT: pos[1] : ( 0, 3, 5, 7 )85 // CHECK-NEXT: crd[1] : ( 0, 1, 63, 0, 1, 0, 63 )86 // CHECK-NEXT: values : ( 1, 2, 3, 4, 5, 6, 7 )87 // CHECK-NEXT: ----88 //89 // CHECK: ---- Sparse Tensor ----90 // CHECK-NEXT: nse = 791 // CHECK-NEXT: dim = ( 32, 64 )92 // CHECK-NEXT: lvl = ( 64, 32 )93 // CHECK-NEXT: pos[0] : ( 0, 3 )94 // CHECK-NEXT: crd[0] : ( 0, 1, 63 )95 // CHECK-NEXT: pos[1] : ( 0, 3, 5, 7 )96 // CHECK-NEXT: crd[1] : ( 0, 1, 31, 0, 1, 0, 31 )97 // CHECK-NEXT: values : ( 1, 4, 6, 2, 5, 3, 7 )98 // CHECK-NEXT: ----99 //100 // CHECK: ---- Sparse Tensor ----101 // CHECK-NEXT: nse = 7102 // CHECK-NEXT: dim = ( 32, 64 )103 // CHECK-NEXT: lvl = ( 64, 32 )104 // CHECK-NEXT: pos[1] : ( 0, 3, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 7 )105 // CHECK-NEXT: crd[1] : ( 0, 1, 31, 0, 1, 0, 31 )106 // CHECK-NEXT: values : ( 1, 4, 6, 2, 5, 3, 7 )107 // CHECK-NEXT: ----108 //109 // CHECK: ---- Sparse Tensor ----110 // CHECK-NEXT: nse = 7111 // CHECK-NEXT: dim = ( 32, 64 )112 // CHECK-NEXT: lvl = ( 64, 32 )113 // CHECK-NEXT: pos[0] : ( 0, 3 )114 // CHECK-NEXT: crd[0] : ( 0, 1, 63 )115 // CHECK-NEXT: pos[1] : ( 0, 3, 5, 7 )116 // CHECK-NEXT: crd[1] : ( 0, 1, 31, 0, 1, 0, 31 )117 // CHECK-NEXT: values : ( 1, 4, 6, 2, 5, 3, 7 )118 // CHECK-NEXT: ----119 //120 // CHECK: ---- Sparse Tensor ----121 // CHECK-NEXT: nse = 7122 // CHECK-NEXT: dim = ( 32, 64 )123 // CHECK-NEXT: lvl = ( 32, 64 )124 // CHECK-NEXT: pos[0] : ( 0, 3 )125 // CHECK-NEXT: crd[0] : ( 0, 1, 31 )126 // CHECK-NEXT: pos[1] : ( 0, 3, 5, 7 )127 // CHECK-NEXT: crd[1] : ( 0, 1, 63, 0, 1, 0, 63 )128 // CHECK-NEXT: values : ( 1, 2, 3, 4, 5, 6, 7 )129 // CHECK-NEXT: ----130 //131 // CHECK: ---- Sparse Tensor ----132 // CHECK-NEXT: nse = 7133 // CHECK-NEXT: dim = ( 32, 64 )134 // CHECK-NEXT: lvl = ( 32, 64 )135 // CHECK-NEXT: pos[0] : ( 0, 3 )136 // CHECK-NEXT: crd[0] : ( 0, 1, 31 )137 // CHECK-NEXT: pos[1] : ( 0, 3, 5, 7 )138 // CHECK-NEXT: crd[1] : ( 0, 1, 63, 0, 1, 0, 63 )139 // CHECK-NEXT: values : ( 1, 2, 3, 4, 5, 6, 7 )140 // CHECK-NEXT: ----141 //142 sparse_tensor.print %1 : tensor<32x64xf64, #DCSR>143 sparse_tensor.print %2 : tensor<32x64xf64, #DCSC>144 sparse_tensor.print %3 : tensor<32x64xf64, #CSC>145 sparse_tensor.print %4 : tensor<32x64xf64, #DCSC>146 sparse_tensor.print %5 : tensor<32x64xf64, #DCSR>147 sparse_tensor.print %6 : tensor<32x64xf64, #DCSR>148 149 // Release the resources.150 bufferization.dealloc_tensor %1 : tensor<32x64xf64, #DCSR>151 bufferization.dealloc_tensor %2 : tensor<32x64xf64, #DCSC>152 bufferization.dealloc_tensor %3 : tensor<32x64xf64, #CSC>153 bufferization.dealloc_tensor %4 : tensor<32x64xf64, #DCSC>154 bufferization.dealloc_tensor %5 : tensor<32x64xf64, #DCSR>155 bufferization.dealloc_tensor %6 : tensor<32x64xf64, #DCSR>156 157 return158 }159}160