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1//--------------------------------------------------------------------------------------------------2// WHEN CREATING A NEW TEST, PLEASE JUST COPY & PASTE WITHOUT EDITS.3//4// Set-up that's shared across all tests in this directory. In principle, this5// config could be moved to lit.local.cfg. However, there are downstream users that6// do not use these LIT config files. Hence why this is kept inline.7//8// DEFINE: %{sparsifier_opts} = enable-runtime-library=true9// DEFINE: %{sparsifier_opts_sve} = enable-arm-sve=true %{sparsifier_opts}10// DEFINE: %{compile} = mlir-opt %s --sparsifier="%{sparsifier_opts}"11// DEFINE: %{compile_sve} = mlir-opt %s --sparsifier="%{sparsifier_opts_sve}"12// DEFINE: %{run_libs} = -shared-libs=%mlir_c_runner_utils,%mlir_runner_utils13// DEFINE: %{run_libs_sve} = -shared-libs=%native_mlir_runner_utils,%native_mlir_c_runner_utils14// DEFINE: %{run_opts} = -e main -entry-point-result=void15// DEFINE: %{run} = mlir-runner %{run_opts} %{run_libs}16// DEFINE: %{run_sve} = %mcr_aarch64_cmd --march=aarch64 --mattr="+sve" %{run_opts} %{run_libs_sve}17//18// DEFINE: %{env} =19//--------------------------------------------------------------------------------------------------20 21// RUN: %{compile} | %{run} | FileCheck %s22//23// Do the same run, but now with direct IR generation.24// REDEFINE: %{sparsifier_opts} = enable-runtime-library=false enable-buffer-initialization=true25// RUN: %{compile} | %{run} | FileCheck %s26//27// Do the same run, but now with vectorization.28// REDEFINE: %{sparsifier_opts} = enable-runtime-library=false vl=4 enable-buffer-initialization=true29// RUN: %{compile} | %{run} | FileCheck %s30//31// Do the same run, but now with VLA vectorization.32// RUN: %if mlir_arm_sve_tests %{ %{compile_sve} | %{run_sve} | FileCheck %s %}33 34#DCSR = #sparse_tensor.encoding<{35 map = (d0, d1) -> (d0 : compressed, d1 : compressed)36}>37 38#sel_trait = {39 indexing_maps = [40 affine_map<(i,j) -> (i,j)>, // C (in)41 affine_map<(i,j) -> (i,j)>, // L (in)42 affine_map<(i,j) -> (i,j)>, // R (in)43 affine_map<(i,j) -> (i,j)> // X (out)44 ],45 iterator_types = ["parallel", "parallel"]46}47 48module {49 func.func @sparse_select(%cond: tensor<5x5xi1>,50 %arga: tensor<5x5xf64, #DCSR>,51 %argb: tensor<5x5xf64, #DCSR>) -> tensor<5x5xf64, #DCSR> {52 %xv = tensor.empty() : tensor<5x5xf64, #DCSR>53 %0 = linalg.generic #sel_trait54 ins(%cond, %arga, %argb: tensor<5x5xi1>, tensor<5x5xf64, #DCSR>, tensor<5x5xf64, #DCSR>)55 outs(%xv: tensor<5x5xf64, #DCSR>) {56 ^bb(%c: i1, %a: f64, %b: f64, %x: f64):57 %1 = arith.select %c, %a, %b : f6458 linalg.yield %1 : f6459 } -> tensor<5x5xf64, #DCSR>60 return %0 : tensor<5x5xf64, #DCSR>61 }62 63 // Driver method to call and verify vector kernels.64 func.func @main() {65 %c0 = arith.constant 0 : index66 %f0 = arith.constant 0.0 : f6467 68 %cond = arith.constant sparse<69 [ [0, 0], [1, 1], [2, 2], [3, 3], [4, 4] ],70 [ 1, 1, 1, 1, 1 ]71 > : tensor<5x5xi1>72 %lhs = arith.constant sparse<73 [ [0, 0], [1, 1], [2, 2], [3, 3], [4, 4] ],74 [ 0.1, 1.1, 2.1, 3.1, 4.1 ]75 > : tensor<5x5xf64>76 %rhs = arith.constant sparse<77 [ [0, 1], [1, 2], [2, 3], [3, 4], [4, 4]],78 [ 1.1, 2.2, 3.3, 4.4 , 5.5 ]79 > : tensor<5x5xf64>80 81 %sl = sparse_tensor.convert %lhs : tensor<5x5xf64> to tensor<5x5xf64, #DCSR>82 %sr = sparse_tensor.convert %rhs : tensor<5x5xf64> to tensor<5x5xf64, #DCSR>83 84 // Call sparse matrix kernels.85 %1 = call @sparse_select(%cond, %sl, %sr) : (tensor<5x5xi1>,86 tensor<5x5xf64, #DCSR>,87 tensor<5x5xf64, #DCSR>) -> tensor<5x5xf64, #DCSR>88 89 90 //91 // CHECK: ---- Sparse Tensor ----92 // CHECK-NEXT: nse = 993 // CHECK-NEXT: dim = ( 5, 5 )94 // CHECK-NEXT: lvl = ( 5, 5 )95 // CHECK-NEXT: pos[0] : ( 0, 5 )96 // CHECK-NEXT: crd[0] : ( 0, 1, 2, 3, 4 )97 // CHECK-NEXT: pos[1] : ( 0, 2, 4, 6, 8, 9 )98 // CHECK-NEXT: crd[1] : ( 0, 1, 1, 2, 2, 3, 3, 4, 4 )99 // CHECK-NEXT: values : ( 0.1, 1.1, 1.1, 2.2, 2.1, 3.3, 3.1, 4.4, 4.1 )100 // CHECK-NEXT: ----101 //102 sparse_tensor.print %1 : tensor<5x5xf64, #DCSR>103 104 // Release the resources.105 bufferization.dealloc_tensor %sl: tensor<5x5xf64, #DCSR>106 bufferization.dealloc_tensor %sr: tensor<5x5xf64, #DCSR>107 bufferization.dealloc_tensor %1: tensor<5x5xf64, #DCSR>108 109 return110 }111}112