806 lines · plain
1; RUN: mlir-translate -import-llvm -split-input-file %s | FileCheck %s2 3; CHECK-LABEL: @integer_arith4; CHECK-SAME: %[[ARG1:[a-zA-Z0-9]+]]5; CHECK-SAME: %[[ARG2:[a-zA-Z0-9]+]]6; CHECK-SAME: %[[ARG3:[a-zA-Z0-9]+]]7; CHECK-SAME: %[[ARG4:[a-zA-Z0-9]+]]8define void @integer_arith(i32 %arg1, i32 %arg2, i64 %arg3, i64 %arg4) {9 ; CHECK: %[[C1:[0-9]+]] = llvm.mlir.constant(-7 : i32) : i3210 ; CHECK: %[[C2:[0-9]+]] = llvm.mlir.constant(42 : i32) : i3211 ; CHECK: llvm.add %[[ARG1]], %[[C1]] : i3212 %1 = add i32 %arg1, -713 ; CHECK: llvm.add %[[C2]], %[[ARG2]] : i3214 %2 = add i32 42, %arg215 ; CHECK: llvm.sub %[[ARG3]], %[[ARG4]] : i6416 %3 = sub i64 %arg3, %arg417 ; CHECK: llvm.mul %[[ARG1]], %[[ARG2]] : i3218 %4 = mul i32 %arg1, %arg219 ; CHECK: llvm.udiv %[[ARG3]], %[[ARG4]] : i6420 %5 = udiv i64 %arg3, %arg421 ; CHECK: llvm.sdiv %[[ARG1]], %[[ARG2]] : i3222 %6 = sdiv i32 %arg1, %arg223 ; CHECK: llvm.urem %[[ARG3]], %[[ARG4]] : i6424 %7 = urem i64 %arg3, %arg425 ; CHECK: llvm.srem %[[ARG1]], %[[ARG2]] : i3226 %8 = srem i32 %arg1, %arg227 ; CHECK: llvm.shl %[[ARG3]], %[[ARG4]] : i6428 %9 = shl i64 %arg3, %arg429 ; CHECK: llvm.lshr %[[ARG1]], %[[ARG2]] : i3230 %10 = lshr i32 %arg1, %arg231 ; CHECK: llvm.ashr %[[ARG3]], %[[ARG4]] : i6432 %11 = ashr i64 %arg3, %arg433 ; CHECK: llvm.and %[[ARG1]], %[[ARG2]] : i3234 %12 = and i32 %arg1, %arg235 ; CHECK: llvm.or %[[ARG3]], %[[ARG4]] : i6436 %13 = or i64 %arg3, %arg437 ; CHECK: llvm.xor %[[ARG1]], %[[ARG2]] : i3238 %14 = xor i32 %arg1, %arg239 ret void40}41 42; // -----43 44; CHECK-LABEL: @integer_compare45; CHECK-SAME: %[[ARG1:[a-zA-Z0-9]+]]46; CHECK-SAME: %[[ARG2:[a-zA-Z0-9]+]]47; CHECK-SAME: %[[ARG3:[a-zA-Z0-9]+]]48; CHECK-SAME: %[[ARG4:[a-zA-Z0-9]+]]49define i1 @integer_compare(i32 %arg1, i32 %arg2, <4 x i64> %arg3, <4 x i64> %arg4) {50 ; CHECK: llvm.icmp "eq" %[[ARG3]], %[[ARG4]] : vector<4xi64>51 %1 = icmp eq <4 x i64> %arg3, %arg452 ; CHECK: llvm.icmp "slt" %[[ARG1]], %[[ARG2]] : i3253 %2 = icmp slt i32 %arg1, %arg254 ; CHECK: llvm.icmp "sle" %[[ARG1]], %[[ARG2]] : i3255 %3 = icmp sle i32 %arg1, %arg256 ; CHECK: llvm.icmp "sgt" %[[ARG1]], %[[ARG2]] : i3257 %4 = icmp sgt i32 %arg1, %arg258 ; CHECK: llvm.icmp "sge" %[[ARG1]], %[[ARG2]] : i3259 %5 = icmp sge i32 %arg1, %arg260 ; CHECK: llvm.icmp "ult" %[[ARG1]], %[[ARG2]] : i3261 %6 = icmp ult i32 %arg1, %arg262 ; CHECK: llvm.icmp "ule" %[[ARG1]], %[[ARG2]] : i3263 %7 = icmp ule i32 %arg1, %arg264 ; Verify scalar comparisons return a scalar boolean65 ; CHECK: llvm.icmp "ugt" %[[ARG1]], %[[ARG2]] : i3266 %8 = icmp ugt i32 %arg1, %arg267 ret i1 %868}69 70; // -----71 72; CHECK-LABEL: @fp_arith73; CHECK-SAME: %[[ARG1:[a-zA-Z0-9]+]]74; CHECK-SAME: %[[ARG2:[a-zA-Z0-9]+]]75; CHECK-SAME: %[[ARG3:[a-zA-Z0-9]+]]76; CHECK-SAME: %[[ARG4:[a-zA-Z0-9]+]]77define void @fp_arith(float %arg1, float %arg2, double %arg3, double %arg4) {78 ; CHECK: %[[C1:[0-9]+]] = llvm.mlir.constant(3.030000e+01 : f32) : f3279 ; CHECK: %[[C2:[0-9]+]] = llvm.mlir.constant(3.030000e+01 : f64) : f6480 ; CHECK: llvm.fadd %[[C1]], %[[ARG1]] : f3281 %1 = fadd float 0x403E4CCCC0000000, %arg182 ; CHECK: llvm.fadd %[[ARG1]], %[[ARG2]] : f3283 %2 = fadd float %arg1, %arg284 ; CHECK: llvm.fadd %[[C2]], %[[ARG3]] : f6485 %3 = fadd double 3.030000e+01, %arg386 ; CHECK: llvm.fsub %[[ARG1]], %[[ARG2]] : f3287 %4 = fsub float %arg1, %arg288 ; CHECK: llvm.fmul %[[ARG3]], %[[ARG4]] : f6489 %5 = fmul double %arg3, %arg490 ; CHECK: llvm.fdiv %[[ARG1]], %[[ARG2]] : f3291 %6 = fdiv float %arg1, %arg292 ; CHECK: llvm.frem %[[ARG3]], %[[ARG4]] : f6493 %7 = frem double %arg3, %arg494 ; CHECK: llvm.fneg %[[ARG1]] : f3295 %8 = fneg float %arg196 ret void97}98 99; // -----100 101; CHECK-LABEL: @fp_compare102; CHECK-SAME: %[[ARG1:[a-zA-Z0-9]+]]103; CHECK-SAME: %[[ARG2:[a-zA-Z0-9]+]]104; CHECK-SAME: %[[ARG3:[a-zA-Z0-9]+]]105; CHECK-SAME: %[[ARG4:[a-zA-Z0-9]+]]106define <4 x i1> @fp_compare(float %arg1, float %arg2, <4 x double> %arg3, <4 x double> %arg4) {107 ; CHECK: llvm.fcmp "_false" %[[ARG1]], %[[ARG2]] : f32108 %1 = fcmp false float %arg1, %arg2109 ; CHECK: llvm.fcmp "oeq" %[[ARG1]], %[[ARG2]] : f32110 %2 = fcmp oeq float %arg1, %arg2111 ; CHECK: llvm.fcmp "ogt" %[[ARG1]], %[[ARG2]] : f32112 %3 = fcmp ogt float %arg1, %arg2113 ; CHECK: llvm.fcmp "oge" %[[ARG1]], %[[ARG2]] : f32114 %4 = fcmp oge float %arg1, %arg2115 ; CHECK: llvm.fcmp "olt" %[[ARG1]], %[[ARG2]] : f32116 %5 = fcmp olt float %arg1, %arg2117 ; CHECK: llvm.fcmp "ole" %[[ARG1]], %[[ARG2]] : f32118 %6 = fcmp ole float %arg1, %arg2119 ; CHECK: llvm.fcmp "one" %[[ARG1]], %[[ARG2]] : f32120 %7 = fcmp one float %arg1, %arg2121 ; CHECK: llvm.fcmp "ord" %[[ARG1]], %[[ARG2]] : f32122 %8 = fcmp ord float %arg1, %arg2123 ; CHECK: llvm.fcmp "ueq" %[[ARG1]], %[[ARG2]] : f32124 %9 = fcmp ueq float %arg1, %arg2125 ; CHECK: llvm.fcmp "ugt" %[[ARG1]], %[[ARG2]] : f32126 %10 = fcmp ugt float %arg1, %arg2127 ; CHECK: llvm.fcmp "uge" %[[ARG1]], %[[ARG2]] : f32128 %11 = fcmp uge float %arg1, %arg2129 ; CHECK: llvm.fcmp "ult" %[[ARG1]], %[[ARG2]] : f32130 %12 = fcmp ult float %arg1, %arg2131 ; CHECK: llvm.fcmp "ule" %[[ARG1]], %[[ARG2]] : f32132 %13 = fcmp ule float %arg1, %arg2133 ; CHECK: llvm.fcmp "une" %[[ARG1]], %[[ARG2]] : f32134 %14 = fcmp une float %arg1, %arg2135 ; CHECK: llvm.fcmp "uno" %[[ARG1]], %[[ARG2]] : f32136 %15 = fcmp uno float %arg1, %arg2137 ; Verify vector comparisons return a vector of booleans138 ; CHECK: llvm.fcmp "_true" %[[ARG3]], %[[ARG4]] : vector<4xf64>139 %16 = fcmp true <4 x double> %arg3, %arg4140 ret <4 x i1> %16141}142 143; // -----144 145; CHECK-LABEL: @fp_casts146; CHECK-SAME: %[[ARG1:[a-zA-Z0-9]+]]147; CHECK-SAME: %[[ARG2:[a-zA-Z0-9]+]]148; CHECK-SAME: %[[ARG3:[a-zA-Z0-9]+]]149define void @fp_casts(float %arg1, double %arg2, i32 %arg3) {150 ; CHECK: llvm.fptrunc %[[ARG2]] : f64 to f32151 ; CHECK: llvm.fpext %[[ARG1]] : f32 to f64152 ; CHECK: llvm.fptosi %[[ARG2]] : f64 to i16153 ; CHECK: llvm.fptoui %[[ARG1]] : f32 to i32154 ; CHECK: llvm.sitofp %[[ARG3]] : i32 to f32155 ; CHECK: llvm.uitofp %[[ARG3]] : i32 to f64156 %1 = fptrunc double %arg2 to float157 %2 = fpext float %arg1 to double158 %3 = fptosi double %arg2 to i16159 %4 = fptoui float %arg1 to i32160 %5 = sitofp i32 %arg3 to float161 %6 = uitofp i32 %arg3 to double162 ret void163}164 165; // -----166 167; CHECK-LABEL: @integer_extension_and_truncation168; CHECK-SAME: %[[ARG1:[a-zA-Z0-9]+]]169define void @integer_extension_and_truncation(i32 %arg1) {170 ; CHECK: llvm.sext %[[ARG1]] : i32 to i64171 ; CHECK: llvm.zext %[[ARG1]] : i32 to i64172 ; CHECK: llvm.trunc %[[ARG1]] : i32 to i16173 %1 = sext i32 %arg1 to i64174 %2 = zext i32 %arg1 to i64175 %3 = trunc i32 %arg1 to i16176 ret void177}178 179; // -----180 181; CHECK-LABEL: @pointer_casts182; CHECK-SAME: %[[ARG1:[a-zA-Z0-9]+]]183; CHECK-SAME: %[[ARG2:[a-zA-Z0-9]+]]184define ptr @pointer_casts(ptr %arg1, i64 %arg2) {185 ; CHECK: %[[NULL:[0-9]+]] = llvm.mlir.zero : !llvm.ptr186 ; CHECK: llvm.ptrtoint %[[ARG1]] : !llvm.ptr to i64187 ; CHECK: llvm.inttoptr %[[ARG2]] : i64 to !llvm.ptr188 ; CHECK: llvm.bitcast %[[ARG1]] : !llvm.ptr to !llvm.ptr189 ; CHECK: llvm.return %[[NULL]] : !llvm.ptr190 %1 = ptrtoint ptr %arg1 to i64191 %2 = inttoptr i64 %arg2 to ptr192 %3 = bitcast ptr %arg1 to ptr193 ret ptr null194}195 196; // -----197 198; CHECK-LABEL: @addrspace_casts199; CHECK-SAME: %[[ARG1:[a-zA-Z0-9]+]]200define ptr addrspace(2) @addrspace_casts(ptr addrspace(1) %arg1) {201 ; CHECK: llvm.addrspacecast %[[ARG1]] : !llvm.ptr<1> to !llvm.ptr<2>202 ; CHECK: llvm.return {{.*}} : !llvm.ptr<2>203 %1 = addrspacecast ptr addrspace(1) %arg1 to ptr addrspace(2)204 ret ptr addrspace(2) %1205}206 207; // -----208 209; CHECK-LABEL: @integer_arith210; CHECK-SAME: %[[ARG1:[a-zA-Z0-9]+]]211; CHECK-SAME: %[[ARG2:[a-zA-Z0-9]+]]212; CHECK-SAME: %[[ARG3:[a-zA-Z0-9]+]]213; CHECK-SAME: %[[ARG4:[a-zA-Z0-9]+]]214define void @integer_arith(i32 %arg1, i32 %arg2, i64 %arg3, i64 %arg4) {215 ; CHECK: %[[C1:[0-9]+]] = llvm.mlir.constant(-7 : i32) : i32216 ; CHECK: %[[C2:[0-9]+]] = llvm.mlir.constant(42 : i32) : i32217 ; CHECK: llvm.add %[[ARG1]], %[[C1]] : i32218 ; CHECK: llvm.add %[[C2]], %[[ARG2]] : i32219 ; CHECK: llvm.sub %[[ARG3]], %[[ARG4]] : i64220 ; CHECK: llvm.mul %[[ARG1]], %[[ARG2]] : i32221 ; CHECK: llvm.udiv %[[ARG3]], %[[ARG4]] : i64222 ; CHECK: llvm.sdiv %[[ARG1]], %[[ARG2]] : i32223 ; CHECK: llvm.urem %[[ARG3]], %[[ARG4]] : i64224 ; CHECK: llvm.srem %[[ARG1]], %[[ARG2]] : i32225 ; CHECK: llvm.shl %[[ARG3]], %[[ARG4]] : i64226 ; CHECK: llvm.lshr %[[ARG1]], %[[ARG2]] : i32227 ; CHECK: llvm.ashr %[[ARG3]], %[[ARG4]] : i64228 ; CHECK: llvm.and %[[ARG1]], %[[ARG2]] : i32229 ; CHECK: llvm.or %[[ARG3]], %[[ARG4]] : i64230 ; CHECK: llvm.xor %[[ARG1]], %[[ARG2]] : i32231 %1 = add i32 %arg1, -7232 %2 = add i32 42, %arg2233 %3 = sub i64 %arg3, %arg4234 %4 = mul i32 %arg1, %arg2235 %5 = udiv i64 %arg3, %arg4236 %6 = sdiv i32 %arg1, %arg2237 %7 = urem i64 %arg3, %arg4238 %8 = srem i32 %arg1, %arg2239 %9 = shl i64 %arg3, %arg4240 %10 = lshr i32 %arg1, %arg2241 %11 = ashr i64 %arg3, %arg4242 %12 = and i32 %arg1, %arg2243 %13 = or i64 %arg3, %arg4244 %14 = xor i32 %arg1, %arg2245 ret void246}247 248; // -----249 250; CHECK-LABEL: @extract_element251; CHECK-SAME: %[[VEC:[a-zA-Z0-9]+]]252; CHECK-SAME: %[[IDX:[a-zA-Z0-9]+]]253define half @extract_element(ptr %vec, i32 %idx) {254 ; CHECK: %[[V1:.+]] = llvm.load %[[VEC]] {{.*}} : !llvm.ptr -> vector<4xf16>255 ; CHECK: %[[V2:.+]] = llvm.extractelement %[[V1]][%[[IDX]] : i32] : vector<4xf16>256 ; CHECK: llvm.return %[[V2]]257 %1 = load <4 x half>, ptr %vec258 %2 = extractelement <4 x half> %1, i32 %idx259 ret half %2260}261 262; // -----263 264; CHECK-LABEL: @insert_element265; CHECK-SAME: %[[VEC:[a-zA-Z0-9]+]]266; CHECK-SAME: %[[VAL:[a-zA-Z0-9]+]]267; CHECK-SAME: %[[IDX:[a-zA-Z0-9]+]]268define <4 x half> @insert_element(ptr %vec, half %val, i32 %idx) {269 ; CHECK: %[[V1:.+]] = llvm.load %[[VEC]] {{.*}} : !llvm.ptr -> vector<4xf16>270 ; CHECK: %[[V2:.+]] = llvm.insertelement %[[VAL]], %[[V1]][%[[IDX]] : i32] : vector<4xf16>271 ; CHECK: llvm.return %[[V2]]272 %1 = load <4 x half>, ptr %vec273 %2 = insertelement <4 x half> %1, half %val, i32 %idx274 ret <4 x half> %2275}276 277; // -----278 279; CHECK-LABEL: @insert_extract_value_struct280; CHECK-SAME: %[[PTR:[a-zA-Z0-9]+]]281define float @insert_extract_value_struct({{i32},{float, double}}* %ptr) {282 ; CHECK: %[[C0:.+]] = llvm.mlir.constant(2.000000e+00 : f64)283 ; CHECK: %[[VT:.+]] = llvm.load %[[PTR]]284 %1 = load {{i32},{float, double}}, {{i32},{float, double}}* %ptr285 ; CHECK: %[[EV:.+]] = llvm.extractvalue %[[VT]][1, 0] :286 ; CHECK-SAME: !llvm.struct<(struct<(i32)>, struct<(f32, f64)>)>287 %2 = extractvalue {{i32},{float, double}} %1, 1, 0288 ; CHECK: %[[IV:.+]] = llvm.insertvalue %[[C0]], %[[VT]][1, 1] :289 ; CHECK-SAME: !llvm.struct<(struct<(i32)>, struct<(f32, f64)>)>290 %3 = insertvalue {{i32},{float, double}} %1, double 2.0, 1, 1291 ; CHECK: llvm.store %[[IV]], %[[PTR]]292 store {{i32},{float, double}} %3, {{i32},{float, double}}* %ptr293 ; CHECK: llvm.return %[[EV]]294 ret float %2295}296 297; // -----298 299; CHECK-LABEL: @insert_extract_value_array300; CHECK-SAME: %[[ARG1:[a-zA-Z0-9]+]]301define void @insert_extract_value_array([4 x [4 x i8]] %arg1) {302 ; CHECK: %[[C0:.+]] = llvm.mlir.constant(0 : i8)303 ; CHECK: llvm.insertvalue %[[C0]], %[[ARG1]][0, 0] : !llvm.array<4 x array<4 x i8>>304 %1 = insertvalue [4 x [4 x i8 ]] %arg1, i8 0, 0, 0305 ; CHECK: llvm.extractvalue %[[ARG1]][1] : !llvm.array<4 x array<4 x i8>>306 %2 = extractvalue [4 x [4 x i8 ]] %arg1, 1307 ; CHECK: llvm.extractvalue %[[ARG1]][0, 1] : !llvm.array<4 x array<4 x i8>>308 %3 = extractvalue [4 x [4 x i8 ]] %arg1, 0, 1309 ret void310}311 312; // -----313 314; CHECK-LABEL: @select315; CHECK-SAME: %[[ARG1:[a-zA-Z0-9]+]]316; CHECK-SAME: %[[ARG2:[a-zA-Z0-9]+]]317; CHECK-SAME: %[[COND:[a-zA-Z0-9]+]]318define void @select(i32 %arg0, i32 %arg1, i1 %cond) {319 ; CHECK: llvm.select %[[COND]], %[[ARG1]], %[[ARG2]] : i1, i32320 %1 = select i1 %cond, i32 %arg0, i32 %arg1321 ret void322}323 324; // -----325 326; CHECK-LABEL: func @shuffle_vec327; CHECK-SAME: %[[ARG1:[a-zA-Z0-9]+]]328; CHECK-SAME: %[[ARG2:[a-zA-Z0-9]+]]329define <4 x half> @shuffle_vec(<4 x half> %arg1, <4 x half> %arg2) {330 ; CHECK: llvm.shufflevector %[[ARG1]], %[[ARG2]] [2, 3, -1, -1] : vector<4xf16>331 %1 = shufflevector <4 x half> %arg1, <4 x half> %arg2, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>332 ret <4 x half> %1333}334 335; // -----336 337; CHECK-LABEL: @alloca338; CHECK-SAME: %[[SIZE:[a-zA-Z0-9]+]]339define ptr @alloca(i64 %size) {340 ; CHECK: %[[C1:[0-9]+]] = llvm.mlir.constant(1 : i32) : i32341 ; CHECK: llvm.alloca %[[C1]] x f64 {alignment = 8 : i64} : (i32) -> !llvm.ptr342 ; CHECK: llvm.alloca %[[SIZE]] x i32 {alignment = 8 : i64} : (i64) -> !llvm.ptr343 ; CHECK: llvm.alloca %[[SIZE]] x i32 {alignment = 4 : i64} : (i64) -> !llvm.ptr<3>344 ; CHECK: llvm.alloca inalloca %[[SIZE]] x i32 {alignment = 4 : i64} : (i64) -> !llvm.ptr345 %1 = alloca double346 %2 = alloca i32, i64 %size, align 8347 %3 = alloca i32, i64 %size, addrspace(3)348 %4 = alloca inalloca i32, i64 %size349 ret ptr %1350}351 352; // -----353 354; CHECK-LABEL: @load_store355; CHECK-SAME: %[[PTR:[a-zA-Z0-9]+]]356define void @load_store(ptr %ptr) {357 ; CHECK: %[[V1:[0-9]+]] = llvm.load %[[PTR]] {alignment = 8 : i64} : !llvm.ptr -> f64358 ; CHECK: %[[V2:[0-9]+]] = llvm.load volatile %[[PTR]] {alignment = 16 : i64, nontemporal} : !llvm.ptr -> f64359 %1 = load double, ptr %ptr360 %2 = load volatile double, ptr %ptr, align 16, !nontemporal !0361 362 ; CHECK: llvm.store %[[V1]], %[[PTR]] {alignment = 8 : i64} : f64, !llvm.ptr363 ; CHECK: llvm.store volatile %[[V2]], %[[PTR]] {alignment = 16 : i64, nontemporal} : f64, !llvm.ptr364 store double %1, ptr %ptr365 store volatile double %2, ptr %ptr, align 16, !nontemporal !0366 ret void367}368 369!0 = !{i32 1}370 371; // -----372 373; CHECK-LABEL: @invariant_load374; CHECK-SAME: %[[PTR:[a-zA-Z0-9]+]]375define float @invariant_load(ptr %ptr) {376 ; CHECK: %[[V:[0-9]+]] = llvm.load %[[PTR]] invariant {alignment = 4 : i64} : !llvm.ptr -> f32377 %1 = load float, ptr %ptr, align 4, !invariant.load !0378 ; CHECK: llvm.return %[[V]]379 ret float %1380}381 382!0 = !{}383 384; // -----385 386; CHECK-LABEL: @invariant_group_load387; CHECK-SAME: %[[PTR:[a-zA-Z0-9]+]]388define float @invariant_group_load(ptr %ptr) {389 ; CHECK: %[[VAL:.+]] = llvm.load %[[PTR]] invariant_group {alignment = 4 : i64} : !llvm.ptr -> f32390 %1 = load float, ptr %ptr, align 4, !invariant.group !0391 ; CHECK: llvm.return %[[VAL]]392 ret float %1393}394 395!0 = !{}396 397; // -----398 399; CHECK-LABEL: @invariant_group_store400; CHECK-SAME: %[[VAL:[a-zA-Z0-9]+]]401; CHECK-SAME: %[[PTR:[a-zA-Z0-9]+]]402define void @invariant_group_store(float %val, ptr %ptr) {403 ; CHECK: llvm.store %[[VAL]], %[[PTR]] invariant_group {alignment = 4 : i64} : f32, !llvm.ptr404 store float %val, ptr %ptr, align 4, !invariant.group !0405 ; CHECK: llvm.return406 ret void407}408 409!0 = !{}410 411; // -----412 413; CHECK-LABEL: @atomic_load_store414; CHECK-SAME: %[[PTR:[a-zA-Z0-9]+]]415define void @atomic_load_store(ptr %ptr) {416 ; CHECK: %[[V1:[0-9]+]] = llvm.load %[[PTR]] atomic acquire {alignment = 8 : i64} : !llvm.ptr -> f64417 ; CHECK: %[[V2:[0-9]+]] = llvm.load volatile %[[PTR]] atomic syncscope("singlethreaded") acquire {alignment = 16 : i64} : !llvm.ptr -> f64418 %1 = load atomic double, ptr %ptr acquire, align 8419 %2 = load atomic volatile double, ptr %ptr syncscope("singlethreaded") acquire, align 16420 421 ; CHECK: llvm.store %[[V1]], %[[PTR]] atomic release {alignment = 8 : i64} : f64, !llvm.ptr422 ; CHECK: llvm.store volatile %[[V2]], %[[PTR]] atomic syncscope("singlethreaded") release {alignment = 16 : i64} : f64, !llvm.ptr423 store atomic double %1, ptr %ptr release, align 8424 store atomic volatile double %2, ptr %ptr syncscope("singlethreaded") release, align 16425 ret void426}427 428; // -----429 430; CHECK-LABEL: @atomic_rmw431; CHECK-SAME: %[[PTR1:[a-zA-Z0-9]+]]432; CHECK-SAME: %[[VAL1:[a-zA-Z0-9]+]]433; CHECK-SAME: %[[PTR2:[a-zA-Z0-9]+]]434; CHECK-SAME: %[[VAL2:[a-zA-Z0-9]+]]435define void @atomic_rmw(ptr %ptr1, i32 %val1, ptr %ptr2, float %val2) {436 ; CHECK: llvm.atomicrmw xchg %[[PTR1]], %[[VAL1]] acquire437 %1 = atomicrmw xchg ptr %ptr1, i32 %val1 acquire438 ; CHECK: llvm.atomicrmw add %[[PTR1]], %[[VAL1]] release439 %2 = atomicrmw add ptr %ptr1, i32 %val1 release440 ; CHECK: llvm.atomicrmw sub %[[PTR1]], %[[VAL1]] acq_rel441 %3 = atomicrmw sub ptr %ptr1, i32 %val1 acq_rel442 ; CHECK: llvm.atomicrmw _and %[[PTR1]], %[[VAL1]] seq_cst443 %4 = atomicrmw and ptr %ptr1, i32 %val1 seq_cst444 ; CHECK: llvm.atomicrmw nand %[[PTR1]], %[[VAL1]] acquire445 %5 = atomicrmw nand ptr %ptr1, i32 %val1 acquire446 ; CHECK: llvm.atomicrmw _or %[[PTR1]], %[[VAL1]] acquire447 %6 = atomicrmw or ptr %ptr1, i32 %val1 acquire448 ; CHECK: llvm.atomicrmw _xor %[[PTR1]], %[[VAL1]] acquire449 %7 = atomicrmw xor ptr %ptr1, i32 %val1 acquire450 ; CHECK: llvm.atomicrmw max %[[PTR1]], %[[VAL1]] acquire451 %8 = atomicrmw max ptr %ptr1, i32 %val1 acquire452 ; CHECK: llvm.atomicrmw min %[[PTR1]], %[[VAL1]] acquire453 %9 = atomicrmw min ptr %ptr1, i32 %val1 acquire454 ; CHECK: llvm.atomicrmw umax %[[PTR1]], %[[VAL1]] acquire455 %10 = atomicrmw umax ptr %ptr1, i32 %val1 acquire456 ; CHECK: llvm.atomicrmw umin %[[PTR1]], %[[VAL1]] acquire457 %11 = atomicrmw umin ptr %ptr1, i32 %val1 acquire458 ; CHECK: llvm.atomicrmw fadd %[[PTR2]], %[[VAL2]] acquire459 %12 = atomicrmw fadd ptr %ptr2, float %val2 acquire460 ; CHECK: llvm.atomicrmw fsub %[[PTR2]], %[[VAL2]] acquire461 %13 = atomicrmw fsub ptr %ptr2, float %val2 acquire462 ; CHECK: llvm.atomicrmw fmax %[[PTR2]], %[[VAL2]] acquire463 %14 = atomicrmw fmax ptr %ptr2, float %val2 acquire464 ; CHECK: llvm.atomicrmw fmin %[[PTR2]], %[[VAL2]] acquire465 %15 = atomicrmw fmin ptr %ptr2, float %val2 acquire466 ; CHECK: llvm.atomicrmw uinc_wrap %[[PTR1]], %[[VAL1]] acquire467 %16 = atomicrmw uinc_wrap ptr %ptr1, i32 %val1 acquire468 ; CHECK: llvm.atomicrmw udec_wrap %[[PTR1]], %[[VAL1]] acquire469 %17 = atomicrmw udec_wrap ptr %ptr1, i32 %val1 acquire470 ; CHECK: llvm.atomicrmw usub_cond %[[PTR1]], %[[VAL1]] acquire471 %18 = atomicrmw usub_cond ptr %ptr1, i32 %val1 acquire472 ; CHECK: llvm.atomicrmw usub_sat %[[PTR1]], %[[VAL1]] acquire473 %19 = atomicrmw usub_sat ptr %ptr1, i32 %val1 acquire474 ; CHECK: llvm.atomicrmw fmaximum %[[PTR2]], %[[VAL2]] acquire475 %20 = atomicrmw fmaximum ptr %ptr2, float %val2 acquire476 ; CHECK: llvm.atomicrmw fminimum %[[PTR2]], %[[VAL2]] acquire477 %21 = atomicrmw fminimum ptr %ptr2, float %val2 acquire478 479 ; CHECK: llvm.atomicrmw volatile480 ; CHECK-SAME: syncscope("singlethread")481 ; CHECK-SAME: {alignment = 8 : i64}482 %22 = atomicrmw volatile udec_wrap ptr %ptr1, i32 %val1 syncscope("singlethread") acquire, align 8483 ret void484}485 486; // -----487 488; CHECK-LABEL: @atomic_cmpxchg489; CHECK-SAME: %[[PTR1:[a-zA-Z0-9]+]]490; CHECK-SAME: %[[VAL1:[a-zA-Z0-9]+]]491; CHECK-SAME: %[[VAL2:[a-zA-Z0-9]+]]492define void @atomic_cmpxchg(ptr %ptr1, i32 %val1, i32 %val2) {493 ; CHECK: llvm.cmpxchg %[[PTR1]], %[[VAL1]], %[[VAL2]] seq_cst seq_cst494 %1 = cmpxchg ptr %ptr1, i32 %val1, i32 %val2 seq_cst seq_cst495 ; CHECK: llvm.cmpxchg %[[PTR1]], %[[VAL1]], %[[VAL2]] monotonic seq_cst496 %2 = cmpxchg ptr %ptr1, i32 %val1, i32 %val2 monotonic seq_cst497 498 ; CHECK: llvm.cmpxchg weak volatile499 ; CHECK-SAME: syncscope("singlethread")500 ; CHECK-SAME: {alignment = 8 : i64}501 %3 = cmpxchg weak volatile ptr %ptr1, i32 %val1, i32 %val2 syncscope("singlethread") monotonic seq_cst, align 8502 ret void503}504 505; // -----506 507; CHECK: llvm.func @fn(i32) -> f32508declare float @fn(i32)509 510; CHECK-LABEL: @direct_call511; CHECK-SAME: %[[ARG1:[a-zA-Z0-9]+]]512define float @direct_call(i32 %arg1) {513 ; CHECK: llvm.call @fn(%[[ARG1]])514 %1 = call float @fn(i32 %arg1)515 ret float %1516}517 518; // -----519 520; CHECK-LABEL: @indirect_call521; CHECK-SAME: %[[PTR:[a-zA-Z0-9]+]]522define void @indirect_call(ptr addrspace(42) %fn) {523 ; CHECK: %[[C0:[0-9]+]] = llvm.mlir.constant(0 : i16) : i16524 ; CHECK: llvm.call %[[PTR]](%[[C0]]) : !llvm.ptr<42>, (i16) -> ()525 call addrspace(42) void %fn(i16 0)526 ret void527}528 529; // -----530 531; CHECK-LABEL: @indirect_vararg_call532; CHECK-SAME: %[[PTR:[a-zA-Z0-9]+]]533define void @indirect_vararg_call(ptr addrspace(42) %fn) {534 ; CHECK: %[[C0:[0-9]+]] = llvm.mlir.constant(0 : i16) : i16535 ; CHECK: llvm.call %[[PTR]](%[[C0]]) vararg(!llvm.func<void (...)>) : !llvm.ptr<42>, (i16) -> ()536 call addrspace(42) void (...) %fn(i16 0)537 ret void538}539 540; // -----541 542; CHECK-LABEL: @inlineasm543; CHECK-SAME: %[[ARG1:[a-zA-Z0-9]+]]544define i32 @inlineasm(i32 %arg1) {545 ; CHECK: %[[RES:.+]] = llvm.inline_asm has_side_effects is_align_stack asm_dialect = intel "bswap $0", "=r,r" %[[ARG1]] : (i32) -> i32546 %1 = call i32 asm sideeffect alignstack inteldialect "bswap $0", "=r,r"(i32 %arg1)547 ; CHECK: return %[[RES]]548 ret i32 %1549}550 551; // -----552 553; CHECK-LABEL: @inlineasm2554define void @inlineasm2() {555 %p = alloca ptr, align 8556 ; CHECK: {{.*}} = llvm.alloca %0 x !llvm.ptr {alignment = 8 : i64} : (i32) -> !llvm.ptr557 ; CHECK-NEXT: llvm.inline_asm has_side_effects tail_call_kind = <tail> asm_dialect = att operand_attrs = [{elementtype = !llvm.ptr}] "", "*m,~{memory}" {{.*}} : (!llvm.ptr) -> !llvm.void558 tail call void asm sideeffect "", "*m,~{memory}"(ptr elementtype(ptr) %p)559 560 ; CHECK: llvm.inline_asm has_side_effects tail_call_kind = <notail> asm_dialect = att operand_attrs = [{elementtype = !llvm.ptr}] "", "*m,~{memory}" {{.*}} : (!llvm.ptr) -> !llvm.void561 notail call void asm sideeffect "", "*m,~{memory}"(ptr elementtype(ptr) %p)562 ret void563}564 565; // -----566 567; CHECK: llvm.func @inlineasm3568; CHECK-SAME:(%[[A0:.*]]: !llvm.ptr, %[[A1:.*]]: i64, %[[A2:.*]]: !llvm.ptr, %[[A3:.*]]: i64) {569define void @inlineasm3(570 ptr %ptr0,571 i64 %b,572 ptr %ptr1,573 i64 %c574 ) {575 ; CHECK: llvm.inline_asm asm_dialect = att operand_attrs =576 ; CHECK-SAME: [{elementtype = !llvm.array<16 x i64>}, {},577 ; CHECK-SAME: {elementtype = !llvm.array<16 x i64>}, {}, {}, {},578 ; CHECK-SAME: {elementtype = !llvm.array<16 x i64>}]579 ; CHECK-SAME: "ldr x4, [$2], #8 \0A\09ldr x5, [$1] \0A\09mul x6, x4, $4 \0A\09",580 ; CHECK-SAME: "=r,=r,=r,=*m,r,*m,0,1,2,*m,~{x4},~{x5},~{x6},~{x7},~{cc}"581 ; CHECK-SAME: %[[A0]], %[[A1]], %[[A2]], %[[A3]], %[[A0]], %[[A2]], %[[A0]] :582 ; CHECK-SAME: (!llvm.ptr, i64, !llvm.ptr, i64, !llvm.ptr, !llvm.ptr, !llvm.ptr) -> !llvm.struct<(i64, ptr, ptr)>583 %r = call { i64, ptr, ptr } asm "ldr x4, [$2], #8 \0A\09ldr x5, [$1] \0A\09mul x6, x4, $4 \0A\09",584 "=r,=r,=r,=*m,r,*m,0,1,2,*m,~{x4},~{x5},~{x6},~{x7},~{cc}"(585 ptr elementtype([16 x i64]) %ptr0,586 i64 %b,587 ptr elementtype([16 x i64]) %ptr1,588 i64 %c,589 ptr %ptr0,590 ptr %ptr1,591 ptr elementtype([16 x i64]) %ptr0)592 ret void593}594 595; // -----596 597; CHECK-LABEL: @gep_static_idx598; CHECK-SAME: %[[PTR:[a-zA-Z0-9]+]]599define void @gep_static_idx(ptr %ptr) {600 ; CHECK: %[[IDX:.+]] = llvm.mlir.constant(7 : i32)601 ; CHECK: llvm.getelementptr inbounds %[[PTR]][%[[IDX]]] : (!llvm.ptr, i32) -> !llvm.ptr, f32602 %1 = getelementptr inbounds float, ptr %ptr, i32 7603 ret void604}605 606; // -----607 608; CHECK-LABEL: @gep_no_wrap_flags609; CHECK-SAME: %[[PTR:[a-zA-Z0-9]+]]610define void @gep_no_wrap_flags(ptr %ptr) {611 ; CHECK: %[[IDX:.+]] = llvm.mlir.constant(7 : i32)612 ; CHECK: llvm.getelementptr inbounds %[[PTR]][%[[IDX]]] : (!llvm.ptr, i32) -> !llvm.ptr, f32613 %1 = getelementptr inbounds float, ptr %ptr, i32 7614 ; CHECK: llvm.getelementptr nusw %[[PTR]][%[[IDX]]] : (!llvm.ptr, i32) -> !llvm.ptr, f32615 %2 = getelementptr nusw float, ptr %ptr, i32 7616 ; CHECK: llvm.getelementptr nuw %[[PTR]][%[[IDX]]] : (!llvm.ptr, i32) -> !llvm.ptr, f32617 %3 = getelementptr nuw float, ptr %ptr, i32 7618 ; CHECK: llvm.getelementptr nusw|nuw %[[PTR]][%[[IDX]]] : (!llvm.ptr, i32) -> !llvm.ptr, f32619 %4 = getelementptr nusw nuw float, ptr %ptr, i32 7620 ; CHECK: llvm.getelementptr inbounds|nuw %[[PTR]][%[[IDX]]] : (!llvm.ptr, i32) -> !llvm.ptr, f32621 %5 = getelementptr inbounds nuw float, ptr %ptr, i32 7622 ret void623}624 625; // -----626 627; CHECK: @varargs(...)628declare void @varargs(...)629 630; CHECK-LABEL: @varargs_call631; CHECK-SAME: %[[ARG1:[a-zA-Z0-9]+]]632define void @varargs_call(i32 %0) {633 ; CHECK: llvm.call @varargs(%[[ARG1]]) vararg(!llvm.func<void (...)>) : (i32) -> ()634 call void (...) @varargs(i32 %0)635 ret void636}637 638; // -----639 640; CHECK: @varargs(...)641declare void @varargs(...)642 643; CHECK-LABEL: @varargs_call644; CHECK-SAME: %[[ARG1:[a-zA-Z0-9]+]]645define void @varargs_call(i32 %0) {646 ; CHECK: llvm.call @varargs(%[[ARG1]]) vararg(!llvm.func<void (...)>) : (i32) -> ()647 call void @varargs(i32 %0)648 ret void649}650 651; // -----652 653; CHECK: @varargs(...)654declare void @varargs(...)655 656; CHECK-LABEL: @empty_varargs_call657define void @empty_varargs_call() {658 ; CHECK: llvm.call @varargs() vararg(!llvm.func<void (...)>) : () -> ()659 call void @varargs()660 ret void661}662 663; // -----664 665; CHECK: llvm.func @f()666declare void @f()667 668; CHECK-LABEL: @call_convergent669define void @call_convergent() {670; CHECK: llvm.call @f() {convergent}671 call void @f() convergent672 ret void673}674 675; // -----676 677; CHECK: llvm.func @f()678declare void @f()679 680; CHECK-LABEL: @call_no_unwind681define void @call_no_unwind() {682; CHECK: llvm.call @f() {no_unwind}683 call void @f() nounwind684 ret void685}686 687; // -----688 689; CHECK: llvm.func @f()690declare void @f()691 692; CHECK-LABEL: @call_will_return693define void @call_will_return() {694; CHECK: llvm.call @f() {will_return}695 call void @f() willreturn696 ret void697}698 699; // -----700 701; CHECK: llvm.func @f()702declare void @f()703 704; CHECK-LABEL: @call_memory_effects705define void @call_memory_effects() {706; CHECK: llvm.call @f() {memory_effects = #llvm.memory_effects<other = none, argMem = none, inaccessibleMem = none, errnoMem = none, targetMem0 = none, targetMem1 = none>}707 call void @f() memory(none)708; CHECK: llvm.call @f() {memory_effects = #llvm.memory_effects<other = none, argMem = write, inaccessibleMem = read, errnoMem = none, targetMem0 = none, targetMem1 = none>}709 call void @f() memory(none, argmem: write, inaccessiblemem: read)710; CHECK: llvm.call @f() {memory_effects = #llvm.memory_effects<other = write, argMem = none, inaccessibleMem = write, errnoMem = write, targetMem0 = write, targetMem1 = write>}711 call void @f() memory(write, argmem: none)712; CHECK: llvm.call @f() {memory_effects = #llvm.memory_effects<other = readwrite, argMem = readwrite, inaccessibleMem = read, errnoMem = readwrite, targetMem0 = readwrite, targetMem1 = readwrite>}713 call void @f() memory(readwrite, inaccessiblemem: read)714; CHECK: llvm.call @f()715; CHECK-NOT: #llvm.memory_effects716; CHECK-SAME: : () -> ()717 call void @f() memory(readwrite)718 ret void719}720 721; // -----722 723%sub_struct = type { i32, i8 }724%my_struct = type { %sub_struct, [4 x i32] }725 726; CHECK-LABEL: @gep_dynamic_idx727; CHECK-SAME: %[[PTR:[a-zA-Z0-9]+]]728; CHECK-SAME: %[[IDX:[a-zA-Z0-9]+]]729define void @gep_dynamic_idx(ptr %ptr, i32 %idx) {730 ; CHECK: %[[C0:.+]] = llvm.mlir.constant(0 : i32)731 ; CHECK: llvm.getelementptr %[[PTR]][%[[C0]], 1, %[[IDX]]]{{.*}}"my_struct"732 %1 = getelementptr %my_struct, ptr %ptr, i32 0, i32 1, i32 %idx733 ret void734}735 736; // -----737 738; CHECK-LABEL: @freeze739; CHECK-SAME: %[[ARG1:[a-zA-Z0-9]+]]740define void @freeze(i32 %arg1) {741 ; CHECK: %[[UNDEF:[0-9]+]] = llvm.mlir.undef : i64742 ; CHECK: %[[POISON:[0-9]+]] = llvm.mlir.poison : i16743 ; CHECK: llvm.freeze %[[ARG1]] : i32744 ; CHECK: llvm.freeze %[[UNDEF]] : i64745 ; CHECK: llvm.freeze %[[POISON]] : i16746 %1 = freeze i32 %arg1747 %2 = freeze i64 undef748 %3 = freeze i16 poison749 ret void750}751 752; // -----753 754; CHECK-LABEL: @unreachable755define void @unreachable() {756 ; CHECK: llvm.unreachable757 unreachable758}759 760; // -----761 762; CHECK-LABEL: @fence763define void @fence() {764 ; CHECK: llvm.fence syncscope("agent") seq_cst765 ; CHECK: llvm.fence release766 ; CHECK: llvm.fence seq_cst767 fence syncscope("agent") seq_cst768 fence release769 fence syncscope("") seq_cst770 ret void771}772 773; // -----774 775; CHECK-LABEL: @f776define void @f() personality ptr @__gxx_personality_v0 {777entry:778; CHECK: llvm.invoke @g() to ^bb1 unwind ^bb2 vararg(!llvm.func<void (...)>) : () -> ()779 invoke void @g() to label %bb1 unwind label %bb2780bb1:781 ret void782bb2:783 %0 = landingpad i32 cleanup784 unreachable785}786 787declare void @g(...)788 789declare i32 @__gxx_personality_v0(...)790 791; // -----792 793; CHECK-LABEL: llvm.func @incompatible_call_and_callee_types794define void @incompatible_call_and_callee_types() {795 ; CHECK: %[[CST:.*]] = llvm.mlir.constant(0 : i64) : i64796 ; CHECK: %[[TARGET:.*]] = llvm.mlir.addressof @callee : !llvm.ptr797 ; CHECK: llvm.call %[[TARGET]](%[[CST]]) : !llvm.ptr, (i64) -> ()798 call void @callee(i64 0)799 ; CHECK: llvm.return800 ret void801}802 803define void @callee({ptr, i64}, i32) {804 ret void805}806