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1// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s2 3module attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<"dlti.alloca_memory_space", 5 : ui32>>, llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_target_device = true} {4 llvm.func @_QQmain() attributes {bindc_name = "main"} {5 %0 = llvm.mlir.addressof @_QFEsp : !llvm.ptr6 %1 = llvm.mlir.constant(10 : index) : i647 %2 = llvm.mlir.constant(1 : index) : i648 %3 = llvm.mlir.constant(0 : index) : i649 %4 = llvm.mlir.constant(9 : index) : i6410 %5 = omp.map.bounds lower_bound(%3 : i64) upper_bound(%4 : i64) extent(%1 : i64) stride(%2 : i64) start_idx(%2 : i64)11 %6 = omp.map.info var_ptr(%0 : !llvm.ptr, !llvm.array<10 x i32>) map_clauses(tofrom) capture(ByRef) bounds(%5) -> !llvm.ptr {name = "sp"}12 omp.target map_entries(%6 -> %arg0 : !llvm.ptr) {13 %7 = llvm.mlir.constant(20 : i32) : i3214 %8 = llvm.mlir.constant(0 : i64) : i6415 %9 = llvm.getelementptr %arg0[0, %8] : (!llvm.ptr, i64) -> !llvm.ptr, !llvm.array<10 x i32>16 llvm.store %7, %9 : i32, !llvm.ptr17 %10 = llvm.mlir.constant(10 : i32) : i3218 %11 = llvm.mlir.constant(4 : i64) : i6419 %12 = llvm.getelementptr %arg0[0, %11] : (!llvm.ptr, i64) -> !llvm.ptr, !llvm.array<10 x i32>20 llvm.store %10, %12 : i32, !llvm.ptr21 omp.terminator22 }23 llvm.return24 }25 llvm.mlir.global internal @_QFEsp(dense<0> : tensor<10xi32>) {addr_space = 0 : i32} : !llvm.array<10 x i32>26 llvm.mlir.global external constant @_QQEnvironmentDefaults() {addr_space = 0 : i32} : !llvm.ptr {27 %0 = llvm.mlir.zero : !llvm.ptr28 llvm.return %0 : !llvm.ptr29 }30}31 32 33// CHECK: define {{.*}} void @__omp_offloading_{{.*}}_{{.*}}__QQmain_{{.*}}(ptr %{{.*}}, ptr %[[ARG1:.*]]) #{{[0-9]+}} {34 35// CHECK: %[[ARG1_ALLOCA:.*]] = alloca ptr, align 8, addrspace(5)36// CHECK: %[[ARG1_ASCAST:.*]] = addrspacecast ptr addrspace(5) %[[ARG1_ALLOCA]] to ptr37// CHECK: store ptr %[[ARG1]], ptr %[[ARG1_ASCAST]], align 838// CHECK: %[[LOAD_ARG1_ALLOCA:.*]] = load ptr, ptr %[[ARG1_ASCAST]], align 839// CHECK: store i32 20, ptr %[[LOAD_ARG1_ALLOCA]], align 440// CHECK: %[[GEP_ARG1_ALLOCA:.*]] = getelementptr inbounds nuw i8, ptr %[[LOAD_ARG1_ALLOCA]], i64 1641// CHECK: store i32 10, ptr %[[GEP_ARG1_ALLOCA]], align 442 43