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1// RUN: mlir-translate -mlir-to-llvmir -split-input-file %s | FileCheck %s2 3// The intent of these tests are to check that re-ordering the arguments of use_device_addr/ptr do4// not negatively impact the code generation. It's important to note that this test is missing5// components that'd generate a fully funcitoning executeable, as the IR was reduced to keep the6// primary components for the tests.7 8module attributes {omp.is_target_device = false, omp.target_triples = ["amdgcn-amd-amdhsa"], omp.version = #omp.version<version = 50>} {9 llvm.func @mix_use_device_ptr_and_addr_and_map_(%arg0: !llvm.ptr, %arg1: !llvm.ptr, %arg2: !llvm.ptr, %arg3: !llvm.ptr, %arg4: !llvm.ptr, %arg5: !llvm.ptr, %arg11: !llvm.ptr, %arg12: !llvm.ptr) {10 %0 = llvm.mlir.constant(0 : index) : i6411 %1 = llvm.mlir.constant(2 : index) : i6412 %2 = llvm.mlir.constant(1 : index) : i6413 %3 = omp.map.bounds lower_bound(%0 : i64) upper_bound(%1 : i64) extent(%1 : i64) stride(%2 : i64) start_idx(%0 : i64) {stride_in_bytes = true}14 %4 = omp.map.info var_ptr(%arg0 : !llvm.ptr, !llvm.struct<(i64)>) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr15 %5 = omp.map.info var_ptr(%arg1 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr16 %6 = omp.map.info var_ptr(%arg2 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) var_ptr_ptr(%arg3 : !llvm.ptr) bounds(%3) -> !llvm.ptr17 %7 = omp.map.info var_ptr(%arg2 : !llvm.ptr, !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8, array<1 x array<3 x i64>>)>) map_clauses(tofrom) capture(ByRef) members(%6 : [0] : !llvm.ptr) -> !llvm.ptr18 %8 = omp.map.info var_ptr(%arg4 : !llvm.ptr, f32) map_clauses(tofrom) capture(ByRef) var_ptr_ptr(%arg5 : !llvm.ptr) -> !llvm.ptr19 %9 = omp.map.info var_ptr(%arg4 : !llvm.ptr, !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8)>) map_clauses(tofrom) capture(ByRef) members(%8 : [0] : !llvm.ptr) -> !llvm.ptr20 %10 = omp.map.info var_ptr(%arg0 : !llvm.ptr, !llvm.struct<(i64)>) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr21 omp.target_data map_entries(%4, %5 : !llvm.ptr, !llvm.ptr) use_device_addr(%7 -> %arg6, %9 -> %arg7, %6 -> %arg8, %8 -> %arg9 : !llvm.ptr, !llvm.ptr, !llvm.ptr, !llvm.ptr) use_device_ptr(%10 -> %arg10 : !llvm.ptr) {22 %11 = llvm.getelementptr %arg4[0, 0] : (!llvm.ptr) -> !llvm.ptr, !llvm.struct<(i64)>23 %12 = llvm.getelementptr %arg12[0, 0] : (!llvm.ptr) -> !llvm.ptr, !llvm.struct<(i64)>24 %13 = llvm.load %11 : !llvm.ptr -> i6425 llvm.store %13, %12 : i64, !llvm.ptr26 %14 = llvm.mlir.constant(48 : i32) : i3227 "llvm.intr.memcpy"(%arg11, %arg6, %14) <{isVolatile = false}> : (!llvm.ptr, !llvm.ptr, i32) -> ()28 %15 = llvm.getelementptr %arg11[0, 0] : (!llvm.ptr) -> !llvm.ptr, !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8, array<1 x array<3 x i64>>)>29 %16 = llvm.load %15 : !llvm.ptr -> !llvm.ptr30 %17 = llvm.getelementptr %16[%1] : (!llvm.ptr, i64) -> !llvm.ptr, i831 %18 = llvm.load %17 : !llvm.ptr -> i3232 llvm.store %18, %arg1 : i32, !llvm.ptr33 omp.terminator34 }35 llvm.return36 }37 38 llvm.func @mix_use_device_ptr_and_addr_and_map_2(%arg0: !llvm.ptr, %arg1: !llvm.ptr, %arg2: !llvm.ptr, %arg3: !llvm.ptr, %arg4: !llvm.ptr, %arg5: !llvm.ptr, %arg11: !llvm.ptr, %arg12: !llvm.ptr) {39 %0 = llvm.mlir.constant(0 : index) : i6440 %1 = llvm.mlir.constant(2 : index) : i6441 %2 = llvm.mlir.constant(1 : index) : i6442 %3 = omp.map.bounds lower_bound(%0 : i64) upper_bound(%1 : i64) extent(%1 : i64) stride(%2 : i64) start_idx(%0 : i64) {stride_in_bytes = true}43 %4 = omp.map.info var_ptr(%arg0 : !llvm.ptr, !llvm.struct<(i64)>) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr44 %5 = omp.map.info var_ptr(%arg1 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr45 %6 = omp.map.info var_ptr(%arg2 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) var_ptr_ptr(%arg3 : !llvm.ptr) bounds(%3) -> !llvm.ptr46 %7 = omp.map.info var_ptr(%arg2 : !llvm.ptr, !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8, array<1 x array<3 x i64>>)>) map_clauses(tofrom) capture(ByRef) members(%6 : [0] : !llvm.ptr) -> !llvm.ptr47 %8 = omp.map.info var_ptr(%arg4 : !llvm.ptr, f32) map_clauses(tofrom) capture(ByRef) var_ptr_ptr(%arg5 : !llvm.ptr) -> !llvm.ptr48 %9 = omp.map.info var_ptr(%arg4 : !llvm.ptr, !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8)>) map_clauses(tofrom) capture(ByRef) members(%8 : [0] : !llvm.ptr) -> !llvm.ptr49 %10 = omp.map.info var_ptr(%arg0 : !llvm.ptr, !llvm.struct<(i64)>) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr50 omp.target_data map_entries(%5, %4 : !llvm.ptr, !llvm.ptr) use_device_addr(%8 -> %arg6, %6 -> %arg7, %7 -> %arg8, %9 -> %arg9 : !llvm.ptr, !llvm.ptr, !llvm.ptr, !llvm.ptr) use_device_ptr(%10 -> %arg10 : !llvm.ptr) {51 %11 = llvm.getelementptr %arg4[0, 0] : (!llvm.ptr) -> !llvm.ptr, !llvm.struct<(i64)>52 %12 = llvm.getelementptr %arg12[0, 0] : (!llvm.ptr) -> !llvm.ptr, !llvm.struct<(i64)>53 %13 = llvm.load %11 : !llvm.ptr -> i6454 llvm.store %13, %12 : i64, !llvm.ptr55 %14 = llvm.mlir.constant(48 : i32) : i3256 "llvm.intr.memcpy"(%arg11, %arg8, %14) <{isVolatile = false}> : (!llvm.ptr, !llvm.ptr, i32) -> ()57 %15 = llvm.getelementptr %arg11[0, 0] : (!llvm.ptr) -> !llvm.ptr, !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8, array<1 x array<3 x i64>>)>58 %16 = llvm.load %15 : !llvm.ptr -> !llvm.ptr59 %17 = llvm.getelementptr %16[%1] : (!llvm.ptr, i64) -> !llvm.ptr, i860 %18 = llvm.load %17 : !llvm.ptr -> i3261 llvm.store %18, %arg1 : i32, !llvm.ptr62 omp.terminator63 }64 llvm.return65 }66}67 68// CHECK: define void @mix_use_device_ptr_and_addr_and_map_(ptr %[[ARG_0:.*]], ptr %[[ARG_1:.*]], ptr %[[ARG_2:.*]], ptr %[[ARG_3:.*]], ptr %[[ARG_4:.*]], ptr %[[ARG_5:.*]], ptr %[[ARG_6:.*]], ptr %[[ARG_7:.*]]) {69// CHECK: %[[ALLOCA:.*]] = alloca ptr, align 870// CHECK: %[[BASEPTR_0_GEP:.*]] = getelementptr inbounds [12 x ptr], ptr %.offload_baseptrs, i32 0, i32 071// CHECK: store ptr %[[ARG_0]], ptr %[[BASEPTR_0_GEP]], align 872// CHECK: %[[BASEPTR_2_GEP:.*]] = getelementptr inbounds [12 x ptr], ptr %.offload_baseptrs, i32 0, i32 473// CHECK: store ptr %[[ARG_2]], ptr %[[BASEPTR_2_GEP]], align 874// CHECK: %[[BASEPTR_3_GEP:.*]] = getelementptr inbounds [12 x ptr], ptr %.offload_baseptrs, i32 0, i32 975// CHECK: store ptr %[[ARG_4]], ptr %[[BASEPTR_3_GEP]], align 876 77// CHECK: call void @__tgt_target_data_begin_mapper({{.*}})78// CHECK: %[[LOAD_BASEPTR_0:.*]] = load ptr, ptr %[[BASEPTR_0_GEP]], align 879// store ptr %[[LOAD_BASEPTR_0]], ptr %[[ALLOCA]], align 880// CHECK: %[[LOAD_BASEPTR_2:.*]] = load ptr, ptr %[[BASEPTR_2_GEP]], align 881// CHECK: %[[LOAD_BASEPTR_3:.*]] = load ptr, ptr %[[BASEPTR_3_GEP]], align 882// CHECK: %[[GEP_A4:.*]] = getelementptr { i64 }, ptr %[[ARG_4]], i32 0, i32 083// CHECK: %[[GEP_A7:.*]] = getelementptr { i64 }, ptr %[[ARG_7]], i32 0, i32 084// CHECK: %[[LOAD_A4:.*]] = load i64, ptr %[[GEP_A4]], align 485// CHECK: store i64 %[[LOAD_A4]], ptr %[[GEP_A7]], align 486// CHECK: call void @llvm.memcpy.p0.p0.i32(ptr %[[ARG_6]], ptr %[[LOAD_BASEPTR_2]], i32 48, i1 false)87// CHECK: %[[GEP_A6:.*]] = getelementptr { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %[[ARG_6]], i32 0, i32 088// CHECK: %[[LOAD_A6:.*]] = load ptr, ptr %[[GEP_A6]], align 889// CHECK: %[[GEP_A6_2:.*]] = getelementptr i8, ptr %[[LOAD_A6]], i64 290// CHECK: %[[LOAD_A6_2:.*]] = load i32, ptr %[[GEP_A6_2]], align 491// CHECK: store i32 %[[LOAD_A6_2]], ptr %[[ARG_1]], align 492// CHECK: call void @__tgt_target_data_end_mapper({{.*}})93 94// CHECK: define void @mix_use_device_ptr_and_addr_and_map_2(ptr %[[ARG_0:.*]], ptr %[[ARG_1:.*]], ptr %[[ARG_2:.*]], ptr %[[ARG_3:.*]], ptr %[[ARG_4:.*]], ptr %[[ARG_5:.*]], ptr %[[ARG_6:.*]], ptr %[[ARG_7:.*]]) {95// CHECK: %[[ALLOCA:.*]] = alloca ptr, align 896// CHECK: %[[BASEPTR_1_GEP:.*]] = getelementptr inbounds [12 x ptr], ptr %.offload_baseptrs, i32 0, i32 197// CHECK: store ptr %[[ARG_0]], ptr %[[BASEPTR_1_GEP]], align 898// CHECK: %[[BASEPTR_2_GEP:.*]] = getelementptr inbounds [12 x ptr], ptr %.offload_baseptrs, i32 0, i32 499// CHECK: store ptr %[[ARG_2]], ptr %[[BASEPTR_2_GEP]], align 8100// CHECK: %[[BASEPTR_3_GEP:.*]] = getelementptr inbounds [12 x ptr], ptr %.offload_baseptrs, i32 0, i32 9101// CHECK: store ptr %[[ARG_4]], ptr %[[BASEPTR_3_GEP]], align 8102// CHECK: call void @__tgt_target_data_begin_mapper({{.*}})103// CHECK: %[[LOAD_BASEPTR_1:.*]] = load ptr, ptr %[[BASEPTR_1_GEP]], align 8104// store ptr %[[LOAD_BASEPTR_1]], ptr %[[ALLOCA]], align 8105// CHECK: %[[LOAD_BASEPTR_2:.*]] = load ptr, ptr %[[BASEPTR_2_GEP]], align 8106// CHECK: %[[LOAD_BASEPTR_3:.*]] = load ptr, ptr %[[BASEPTR_3_GEP]], align 8107// CHECK: %[[GEP_A4:.*]] = getelementptr { i64 }, ptr %[[ARG_4]], i32 0, i32 0108// CHECK: %[[GEP_A7:.*]] = getelementptr { i64 }, ptr %[[ARG_7]], i32 0, i32 0109// CHECK: %[[LOAD_A4:.*]] = load i64, ptr %[[GEP_A4]], align 4110// CHECK: store i64 %[[LOAD_A4]], ptr %[[GEP_A7]], align 4111// CHECK: call void @llvm.memcpy.p0.p0.i32(ptr %[[ARG_6]], ptr %[[LOAD_BASEPTR_2]], i32 48, i1 false)112// CHECK: %[[GEP_A6:.*]] = getelementptr { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, ptr %[[ARG_6]], i32 0, i32 0113// CHECK: %[[LOAD_A6:.*]] = load ptr, ptr %[[GEP_A6]], align 8114// CHECK: %[[GEP_A6_2:.*]] = getelementptr i8, ptr %[[LOAD_A6]], i64 2115// CHECK: %[[LOAD_A6_2:.*]] = load i32, ptr %[[GEP_A6_2]], align 4116// CHECK: store i32 %[[LOAD_A6_2]], ptr %[[ARG_1]], align 4117// CHECK: call void @__tgt_target_data_end_mapper({{.*}})118