625 lines · plain
1// RUN: mlir-translate -mlir-to-llvmir -split-input-file %s | FileCheck %s2 3module attributes {omp.target_triples = ["amdgcn-amd-amdhsa"]} {4 llvm.func @_QPopenmp_target_data() {5 %0 = llvm.mlir.constant(1 : i64) : i646 %1 = llvm.alloca %0 x i32 {bindc_name = "i", in_type = i32, operand_segment_sizes = array<i32: 0, 0>, uniq_name = "_QFopenmp_target_dataEi"} : (i64) -> !llvm.ptr7 %2 = omp.map.info var_ptr(%1 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}8 omp.target_data map_entries(%2 : !llvm.ptr) {9 %3 = llvm.mlir.constant(99 : i32) : i3210 llvm.store %3, %1 : i32, !llvm.ptr11 omp.terminator12 }13 llvm.return14 }15}16 17// CHECK: @.offload_sizes = private unnamed_addr constant [1 x i64] [i64 4]18// CHECK: @.offload_maptypes = private unnamed_addr constant [1 x i64] [i64 3]19// CHECK-LABEL: define void @_QPopenmp_target_data() {20// CHECK: %[[VAL_0:.*]] = alloca [1 x ptr], align 821// CHECK: %[[VAL_1:.*]] = alloca [1 x ptr], align 822// CHECK: %[[VAL_2:.*]] = alloca [1 x ptr], align 823// CHECK: %[[VAL_3:.*]] = alloca i32, i64 1, align 424// CHECK: br label %[[VAL_4:.*]]25// CHECK: entry: ; preds = %[[VAL_5:.*]]26// CHECK: %[[VAL_6:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_0]], i32 0, i32 027// CHECK: store ptr %[[VAL_3]], ptr %[[VAL_6]], align 828// CHECK: %[[VAL_7:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_1]], i32 0, i32 029// CHECK: store ptr %[[VAL_3]], ptr %[[VAL_7]], align 830// CHECK: %[[VAL_8:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_2]], i64 0, i64 031// CHECK: store ptr null, ptr %[[VAL_8]], align 832// CHECK: %[[VAL_9:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_0]], i32 0, i32 033// CHECK: %[[VAL_10:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_1]], i32 0, i32 034// CHECK: call void @__tgt_target_data_begin_mapper(ptr @2, i64 -1, i32 1, ptr %[[VAL_9]], ptr %[[VAL_10]], ptr @.offload_sizes, ptr @.offload_maptypes, ptr @.offload_mapnames, ptr null)35// CHECK: store i32 99, ptr %[[VAL_3]], align 436// CHECK: %[[VAL_11:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_0]], i32 0, i32 037// CHECK: %[[VAL_12:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_1]], i32 0, i32 038// CHECK: call void @__tgt_target_data_end_mapper(ptr @2, i64 -1, i32 1, ptr %[[VAL_11]], ptr %[[VAL_12]], ptr @.offload_sizes, ptr @.offload_maptypes, ptr @.offload_mapnames, ptr null)39// CHECK: ret void40 41// -----42 43module attributes {omp.target_triples = ["amdgcn-amd-amdhsa"]} {44 llvm.func @_QPopenmp_target_data_region(%0 : !llvm.ptr) {45 %1 = llvm.mlir.constant(1023 : index) : i6446 %2 = llvm.mlir.constant(0 : index) : i6447 %3 = llvm.mlir.constant(1024 : index) : i6448 %4 = llvm.mlir.constant(1 : index) : i6449 %5 = omp.map.bounds lower_bound(%2 : i64) upper_bound(%1 : i64) extent(%3 : i64) stride(%4 : i64) start_idx(%4 : i64)50 %6 = omp.map.info var_ptr(%0 : !llvm.ptr, !llvm.array<1024 x i32>) map_clauses(from) capture(ByRef) bounds(%5) -> !llvm.ptr {name = ""}51 omp.target_data map_entries(%6 : !llvm.ptr) {52 %7 = llvm.mlir.constant(99 : i32) : i3253 %8 = llvm.mlir.constant(1 : i64) : i6454 %9 = llvm.mlir.constant(1 : i64) : i6455 %10 = llvm.mlir.constant(0 : i64) : i6456 %11 = llvm.getelementptr %0[0, %10] : (!llvm.ptr, i64) -> !llvm.ptr, !llvm.array<1024 x i32>57 llvm.store %7, %11 : i32, !llvm.ptr58 omp.terminator59 }60 llvm.return61 }62}63 64// CHECK: @.offload_sizes = private unnamed_addr constant [1 x i64] [i64 4096]65// CHECK: @.offload_maptypes = private unnamed_addr constant [1 x i64] [i64 2]66// CHECK-LABEL: define void @_QPopenmp_target_data_region67// CHECK: (ptr %[[ARG_0:.*]]) {68// CHECK: %[[VAL_0:.*]] = alloca [1 x ptr], align 869// CHECK: %[[VAL_1:.*]] = alloca [1 x ptr], align 870// CHECK: %[[VAL_2:.*]] = alloca [1 x ptr], align 871// CHECK: br label %[[VAL_3:.*]]72// CHECK: entry: ; preds = %[[VAL_4:.*]]73// CHECK: %[[ARR_OFFSET:.*]] = getelementptr inbounds [1024 x i32], ptr %[[ARR_DATA:.*]], i64 0, i64 074// CHECK: %[[VAL_5:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_0]], i32 0, i32 075// CHECK: store ptr %[[ARR_DATA]], ptr %[[VAL_5]], align 876// CHECK: %[[VAL_6:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_1]], i32 0, i32 077// CHECK: store ptr %[[ARR_OFFSET]], ptr %[[VAL_6]], align 878// CHECK: %[[VAL_7:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_2]], i64 0, i64 079// CHECK: store ptr null, ptr %[[VAL_7]], align 880// CHECK: %[[VAL_8:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_0]], i32 0, i32 081// CHECK: %[[VAL_9:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_1]], i32 0, i32 082// CHECK: call void @__tgt_target_data_begin_mapper(ptr @2, i64 -1, i32 1, ptr %[[VAL_8]], ptr %[[VAL_9]], ptr @.offload_sizes, ptr @.offload_maptypes, ptr @.offload_mapnames, ptr null)83// CHECK: %[[VAL_10:.*]] = getelementptr [1024 x i32], ptr %[[ARR_DATA]], i32 0, i64 084// CHECK: store i32 99, ptr %[[VAL_10]], align 485// CHECK: %[[VAL_11:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_0]], i32 0, i32 086// CHECK: %[[VAL_12:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_1]], i32 0, i32 087// CHECK: call void @__tgt_target_data_end_mapper(ptr @2, i64 -1, i32 1, ptr %[[VAL_11]], ptr %[[VAL_12]], ptr @.offload_sizes, ptr @.offload_maptypes, ptr @.offload_mapnames, ptr null)88// CHECK: ret void89 90// -----91 92module attributes {omp.target_triples = ["amdgcn-amd-amdhsa"]} {93 llvm.func @_QPomp_target_enter_exit(%1 : !llvm.ptr, %3 : !llvm.ptr) {94 %4 = llvm.mlir.constant(1 : i64) : i6495 %5 = llvm.alloca %4 x i32 {bindc_name = "dvc", in_type = i32, operandSegmentSizes = array<i32: 0, 0>, uniq_name = "_QFomp_target_enter_exitEdvc"} : (i64) -> !llvm.ptr96 %6 = llvm.mlir.constant(1 : i64) : i6497 %7 = llvm.alloca %6 x i32 {bindc_name = "i", in_type = i32, operandSegmentSizes = array<i32: 0, 0>, uniq_name = "_QFomp_target_enter_exitEi"} : (i64) -> !llvm.ptr98 %8 = llvm.mlir.constant(5 : i32) : i3299 llvm.store %8, %7 : i32, !llvm.ptr100 %9 = llvm.mlir.constant(2 : i32) : i32101 llvm.store %9, %5 : i32, !llvm.ptr102 %10 = llvm.load %7 : !llvm.ptr -> i32103 %11 = llvm.mlir.constant(10 : i32) : i32104 %12 = llvm.icmp "slt" %10, %11 : i32105 %13 = llvm.load %5 : !llvm.ptr -> i32106 %14 = llvm.mlir.constant(1023 : index) : i64107 %15 = llvm.mlir.constant(0 : index) : i64108 %16 = llvm.mlir.constant(1024 : index) : i64109 %17 = llvm.mlir.constant(1 : index) : i64110 %18 = omp.map.bounds lower_bound(%15 : i64) upper_bound(%14 : i64) extent(%16 : i64) stride(%17 : i64) start_idx(%17 : i64)111 %map1 = omp.map.info var_ptr(%1 : !llvm.ptr, !llvm.array<1024 x i32>) map_clauses(to) capture(ByRef) bounds(%18) -> !llvm.ptr {name = ""}112 %19 = llvm.mlir.constant(511 : index) : i64113 %20 = llvm.mlir.constant(0 : index) : i64114 %21 = llvm.mlir.constant(512 : index) : i64115 %22 = llvm.mlir.constant(1 : index) : i64116 %23 = omp.map.bounds lower_bound(%20 : i64) upper_bound(%19 : i64) extent(%21 : i64) stride(%22 : i64) start_idx(%22 : i64)117 %map2 = omp.map.info var_ptr(%3 : !llvm.ptr, !llvm.array<512 x i32>) map_clauses(exit_release_or_enter_alloc) capture(ByRef) bounds(%23) -> !llvm.ptr {name = ""}118 omp.target_enter_data if(%12) device(%13 : i32) map_entries(%map1, %map2 : !llvm.ptr, !llvm.ptr)119 %24 = llvm.load %7 : !llvm.ptr -> i32120 %25 = llvm.mlir.constant(10 : i32) : i32121 %26 = llvm.icmp "sgt" %24, %25 : i32122 %27 = llvm.load %5 : !llvm.ptr -> i32123 %28 = llvm.mlir.constant(1023 : index) : i64124 %29 = llvm.mlir.constant(0 : index) : i64125 %30 = llvm.mlir.constant(1024 : index) : i64126 %31 = llvm.mlir.constant(1 : index) : i64127 %32 = omp.map.bounds lower_bound(%29 : i64) upper_bound(%28 : i64) extent(%30 : i64) stride(%31 : i64) start_idx(%31 : i64)128 %map3 = omp.map.info var_ptr(%1 : !llvm.ptr, !llvm.array<1024 x i32>) map_clauses(from) capture(ByRef) bounds(%32) -> !llvm.ptr {name = ""}129 %33 = llvm.mlir.constant(511 : index) : i64130 %34 = llvm.mlir.constant(0 : index) : i64131 %35 = llvm.mlir.constant(512 : index) : i64132 %36 = llvm.mlir.constant(1 : index) : i64133 %37 = omp.map.bounds lower_bound(%34 : i64) upper_bound(%33 : i64) extent(%35 : i64) stride(%36 : i64) start_idx(%36 : i64)134 %map4 = omp.map.info var_ptr(%3 : !llvm.ptr, !llvm.array<512 x i32>) map_clauses(exit_release_or_enter_alloc) capture(ByRef) bounds(%37) -> !llvm.ptr {name = ""}135 omp.target_exit_data if(%26) device(%27 : i32) map_entries(%map3, %map4 : !llvm.ptr, !llvm.ptr)136 llvm.return137 }138}139 140// CHECK: @.offload_sizes = private unnamed_addr constant [2 x i64] [i64 4096, i64 2048]141// CHECK: @.offload_maptypes = private unnamed_addr constant [2 x i64] [i64 1, i64 0]142// CHECK: @.offload_sizes.1 = private unnamed_addr constant [2 x i64] [i64 4096, i64 2048]143// CHECK: @.offload_maptypes.2 = private unnamed_addr constant [2 x i64] [i64 2, i64 0]144// CHECK-LABEL: define void @_QPomp_target_enter_exit145// CHECK: (ptr %[[ARG_0:.*]], ptr %[[ARG_1:.*]]) {146// CHECK: %[[VAL_0:.*]] = alloca [2 x ptr], align 8147// CHECK: %[[VAL_1:.*]] = alloca [2 x ptr], align 8148// CHECK: %[[VAL_2:.*]] = alloca [2 x ptr], align 8149// CHECK: %[[VAL_3:.*]] = alloca [2 x ptr], align 8150// CHECK: %[[VAL_4:.*]] = alloca [2 x ptr], align 8151// CHECK: %[[VAL_5:.*]] = alloca [2 x ptr], align 8152// CHECK: %[[VAL_6:.*]] = alloca i32, i64 1, align 4153// CHECK: %[[VAL_7:.*]] = alloca i32, i64 1, align 4154// CHECK: store i32 5, ptr %[[VAL_7]], align 4155// CHECK: store i32 2, ptr %[[VAL_6]], align 4156// CHECK: %[[VAL_8:.*]] = load i32, ptr %[[VAL_7]], align 4157// CHECK: %[[VAL_9:.*]] = icmp slt i32 %[[VAL_8]], 10158// CHECK: %[[VAL_10:.*]] = load i32, ptr %[[VAL_6]], align 4159// CHECK: br label %[[VAL_11:.*]]160// CHECK: entry: ; preds = %[[VAL_12:.*]]161// CHECK: br i1 %[[VAL_9]], label %[[VAL_13:.*]], label %[[VAL_14:.*]]162// CHECK: omp_if.then: ; preds = %[[VAL_11]]163// CHECK: %[[ARR_OFFSET1:.*]] = getelementptr inbounds [1024 x i32], ptr %[[VAL_16:.*]], i64 0, i64 0164// CHECK: %[[ARR_OFFSET2:.*]] = getelementptr inbounds [512 x i32], ptr %[[VAL_20:.*]], i64 0, i64 0165// CHECK: %[[VAL_15:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_3]], i32 0, i32 0166// CHECK: store ptr %[[VAL_16]], ptr %[[VAL_15]], align 8167// CHECK: %[[VAL_17:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_4]], i32 0, i32 0168// CHECK: store ptr %[[ARR_OFFSET1]], ptr %[[VAL_17]], align 8169// CHECK: %[[VAL_18:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_5]], i64 0, i64 0170// CHECK: store ptr null, ptr %[[VAL_18]], align 8171// CHECK: %[[VAL_19:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_3]], i32 0, i32 1172// CHECK: store ptr %[[VAL_20]], ptr %[[VAL_19]], align 8173// CHECK: %[[VAL_21:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_4]], i32 0, i32 1174// CHECK: store ptr %[[ARR_OFFSET2]], ptr %[[VAL_21]], align 8175// CHECK: %[[VAL_22:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_5]], i64 0, i64 1176// CHECK: store ptr null, ptr %[[VAL_22]], align 8177// CHECK: %[[VAL_23:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_3]], i32 0, i32 0178// CHECK: %[[VAL_24:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_4]], i32 0, i32 0179// CHECK: call void @__tgt_target_data_begin_mapper(ptr @3, i64 -1, i32 2, ptr %[[VAL_23]], ptr %[[VAL_24]], ptr @.offload_sizes, ptr @.offload_maptypes, ptr @.offload_mapnames, ptr null)180// CHECK: br label %[[VAL_25:.*]]181// CHECK: omp_if.else: ; preds = %[[VAL_11]]182// CHECK: br label %[[VAL_25]]183// CHECK: omp_if.end: ; preds = %[[VAL_14]], %[[VAL_13]]184// CHECK: %[[VAL_26:.*]] = load i32, ptr %[[VAL_7]], align 4185// CHECK: %[[VAL_27:.*]] = icmp sgt i32 %[[VAL_26]], 10186// CHECK: %[[VAL_28:.*]] = load i32, ptr %[[VAL_6]], align 4187// CHECK: br i1 %[[VAL_27]], label %[[VAL_29:.*]], label %[[VAL_30:.*]]188// CHECK: omp_if.then2: ; preds = %[[VAL_25]]189// CHECK: %[[ARR_OFFSET3:.*]] = getelementptr inbounds [1024 x i32], ptr %[[VAL_16]], i64 0, i64 0190// CHECK: %[[ARR_OFFSET4:.*]] = getelementptr inbounds [512 x i32], ptr %[[VAL_20]], i64 0, i64 0191// CHECK: %[[VAL_31:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_0]], i32 0, i32 0192// CHECK: store ptr %[[VAL_16]], ptr %[[VAL_31]], align 8193// CHECK: %[[VAL_32:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_1]], i32 0, i32 0194// CHECK: store ptr %[[ARR_OFFSET3]], ptr %[[VAL_32]], align 8195// CHECK: %[[VAL_33:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_2]], i64 0, i64 0196// CHECK: store ptr null, ptr %[[VAL_33]], align 8197// CHECK: %[[VAL_34:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_0]], i32 0, i32 1198// CHECK: store ptr %[[VAL_20]], ptr %[[VAL_34]], align 8199// CHECK: %[[VAL_35:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_1]], i32 0, i32 1200// CHECK: store ptr %[[ARR_OFFSET4]], ptr %[[VAL_35]], align 8201// CHECK: %[[VAL_36:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_2]], i64 0, i64 1202// CHECK: store ptr null, ptr %[[VAL_36]], align 8203// CHECK: %[[VAL_37:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_0]], i32 0, i32 0204// CHECK: %[[VAL_38:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_1]], i32 0, i32 0205// CHECK: call void @__tgt_target_data_end_mapper(ptr @3, i64 -1, i32 2, ptr %[[VAL_37]], ptr %[[VAL_38]], ptr @.offload_sizes.1, ptr @.offload_maptypes.2, ptr @.offload_mapnames.3, ptr null)206// CHECK: br label %[[VAL_39:.*]]207// CHECK: omp_if.else8: ; preds = %[[VAL_25]]208// CHECK: br label %[[VAL_39]]209// CHECK: omp_if.end9: ; preds = %[[VAL_30]], %[[VAL_29]]210// CHECK: ret void211 212// -----213 214module attributes {omp.target_triples = ["amdgcn-amd-amdhsa"]} {215 llvm.func @_QPopenmp_target_use_dev_ptr() {216 %0 = llvm.mlir.constant(1 : i64) : i64217 %a = llvm.alloca %0 x !llvm.ptr : (i64) -> !llvm.ptr218 %map1 = omp.map.info var_ptr(%a : !llvm.ptr, !llvm.ptr) map_clauses(from) capture(ByRef) -> !llvm.ptr {name = ""}219 %map2 = omp.map.info var_ptr(%a : !llvm.ptr, !llvm.ptr) map_clauses(from) capture(ByRef) -> !llvm.ptr {name = ""}220 omp.target_data map_entries(%map1 : !llvm.ptr) use_device_ptr(%map2 -> %arg0 : !llvm.ptr) {221 %1 = llvm.mlir.constant(10 : i32) : i32222 %2 = llvm.load %arg0 : !llvm.ptr -> !llvm.ptr223 llvm.store %1, %2 : i32, !llvm.ptr224 omp.terminator225 }226 llvm.return227 }228}229 230// CHECK: @.offload_sizes = private unnamed_addr constant [1 x i64] [i64 8]231// CHECK: @.offload_maptypes = private unnamed_addr constant [1 x i64] [i64 66]232// CHECK-LABEL: define void @_QPopenmp_target_use_dev_ptr233// CHECK: %[[VAL_0:.*]] = alloca [1 x ptr], align 8234// CHECK: %[[VAL_1:.*]] = alloca [1 x ptr], align 8235// CHECK: %[[VAL_2:.*]] = alloca [1 x ptr], align 8236// CHECK: %[[VAL_3:.*]] = alloca ptr, align 8237// CHECK: %[[VAL_4:.*]] = alloca ptr, i64 1, align 8238// CHECK: br label %[[VAL_5:.*]]239// CHECK: entry: ; preds = %[[VAL_6:.*]]240// CHECK: %[[VAL_7:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_0]], i32 0, i32 0241// CHECK: store ptr %[[VAL_4]], ptr %[[VAL_7]], align 8242// CHECK: %[[VAL_8:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_1]], i32 0, i32 0243// CHECK: store ptr %[[VAL_4]], ptr %[[VAL_8]], align 8244// CHECK: %[[VAL_9:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_2]], i64 0, i64 0245// CHECK: store ptr null, ptr %[[VAL_9]], align 8246// CHECK: %[[VAL_10:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_0]], i32 0, i32 0247// CHECK: %[[VAL_11:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_1]], i32 0, i32 0248// CHECK: call void @__tgt_target_data_begin_mapper(ptr @{{.*}}, i64 -1, i32 1, ptr %[[VAL_10]], ptr %[[VAL_11]], ptr @.offload_sizes, ptr @.offload_maptypes, ptr @.offload_mapnames, ptr null)249// CHECK: %[[VAL_12:.*]] = load ptr, ptr %[[VAL_7]], align 8250// CHECK: store ptr %[[VAL_12]], ptr %[[VAL_3]], align 8251// CHECK: %[[VAL_13:.*]] = load ptr, ptr %[[VAL_3]], align 8252// CHECK: store i32 10, ptr %[[VAL_13]], align 4253// CHECK: %[[VAL_14:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_0]], i32 0, i32 0254// CHECK: %[[VAL_15:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_1]], i32 0, i32 0255// CHECK: call void @__tgt_target_data_end_mapper(ptr @{{.*}}, i64 -1, i32 1, ptr %[[VAL_14]], ptr %[[VAL_15]], ptr @.offload_sizes, ptr @.offload_maptypes, ptr @.offload_mapnames, ptr null)256// CHECK: ret void257 258// -----259 260module attributes {omp.target_triples = ["amdgcn-amd-amdhsa"]} {261 llvm.func @_QPopenmp_target_use_dev_addr() {262 %0 = llvm.mlir.constant(1 : i64) : i64263 %a = llvm.alloca %0 x !llvm.ptr : (i64) -> !llvm.ptr264 %map = omp.map.info var_ptr(%a : !llvm.ptr, !llvm.ptr) map_clauses(from) capture(ByRef) -> !llvm.ptr {name = ""}265 %map2 = omp.map.info var_ptr(%a : !llvm.ptr, !llvm.ptr) map_clauses(from) capture(ByRef) -> !llvm.ptr {name = ""}266 omp.target_data map_entries(%map : !llvm.ptr) use_device_addr(%map2 -> %arg0 : !llvm.ptr) {267 %1 = llvm.mlir.constant(10 : i32) : i32268 %2 = llvm.load %arg0 : !llvm.ptr -> !llvm.ptr269 llvm.store %1, %2 : i32, !llvm.ptr270 omp.terminator271 }272 llvm.return273 }274}275 276// CHECK: @.offload_sizes = private unnamed_addr constant [1 x i64] [i64 8]277// CHECK: @.offload_maptypes = private unnamed_addr constant [1 x i64] [i64 66]278// CHECK-LABEL: define void @_QPopenmp_target_use_dev_addr279// CHECK: %[[VAL_0:.*]] = alloca [1 x ptr], align 8280// CHECK: %[[VAL_1:.*]] = alloca [1 x ptr], align 8281// CHECK: %[[VAL_2:.*]] = alloca [1 x ptr], align 8282// CHECK: %[[VAL_3:.*]] = alloca ptr, i64 1, align 8283// CHECK: br label %[[VAL_4:.*]]284// CHECK: entry: ; preds = %[[VAL_5:.*]]285// CHECK: %[[VAL_6:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_0]], i32 0, i32 0286// CHECK: store ptr %[[VAL_3]], ptr %[[VAL_6]], align 8287// CHECK: %[[VAL_7:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_1]], i32 0, i32 0288// CHECK: store ptr %[[VAL_3]], ptr %[[VAL_7]], align 8289// CHECK: %[[VAL_8:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_2]], i64 0, i64 0290// CHECK: store ptr null, ptr %[[VAL_8]], align 8291// CHECK: %[[VAL_9:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_0]], i32 0, i32 0292// CHECK: %[[VAL_10:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_1]], i32 0, i32 0293// CHECK: call void @__tgt_target_data_begin_mapper(ptr @{{.*}}, i64 -1, i32 1, ptr %[[VAL_9]], ptr %[[VAL_10]], ptr @.offload_sizes, ptr @.offload_maptypes, ptr @.offload_mapnames, ptr null)294// CHECK: %[[VAL_11:.*]] = load ptr, ptr %[[VAL_6]], align 8295// CHECK: %[[VAL_12:.*]] = load ptr, ptr %[[VAL_11]], align 8296// CHECK: store i32 10, ptr %[[VAL_12]], align 4297// CHECK: %[[VAL_13:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_0]], i32 0, i32 0298// CHECK: %[[VAL_14:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_1]], i32 0, i32 0299// CHECK: call void @__tgt_target_data_end_mapper(ptr @{{.*}}, i64 -1, i32 1, ptr %[[VAL_13]], ptr %[[VAL_14]], ptr @.offload_sizes, ptr @.offload_maptypes, ptr @.offload_mapnames, ptr null)300// CHECK: ret void301 302// -----303 304module attributes {omp.target_triples = ["amdgcn-amd-amdhsa"]} {305 llvm.func @_QPopenmp_target_use_dev_addr_no_ptr() {306 %0 = llvm.mlir.constant(1 : i64) : i64307 %a = llvm.alloca %0 x i32 : (i64) -> !llvm.ptr308 %map = omp.map.info var_ptr(%a : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}309 %map2 = omp.map.info var_ptr(%a : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}310 omp.target_data map_entries(%map : !llvm.ptr) use_device_addr(%map2 -> %arg0 : !llvm.ptr) {311 %1 = llvm.mlir.constant(10 : i32) : i32312 llvm.store %1, %arg0 : i32, !llvm.ptr313 omp.terminator314 }315 llvm.return316 }317}318 319// CHECK: @.offload_sizes = private unnamed_addr constant [1 x i64] [i64 4]320// CHECK: @.offload_maptypes = private unnamed_addr constant [1 x i64] [i64 67]321// CHECK-LABEL: define void @_QPopenmp_target_use_dev_addr_no_ptr322// CHECK: %[[VAL_0:.*]] = alloca [1 x ptr], align 8323// CHECK: %[[VAL_1:.*]] = alloca [1 x ptr], align 8324// CHECK: %[[VAL_2:.*]] = alloca [1 x ptr], align 8325// CHECK: %[[VAL_3:.*]] = alloca i32, i64 1, align 4326// CHECK: br label %[[VAL_4:.*]]327// CHECK: entry: ; preds = %[[VAL_5:.*]]328// CHECK: %[[VAL_6:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_0]], i32 0, i32 0329// CHECK: store ptr %[[VAL_3]], ptr %[[VAL_6]], align 8330// CHECK: %[[VAL_7:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_1]], i32 0, i32 0331// CHECK: store ptr %[[VAL_3]], ptr %[[VAL_7]], align 8332// CHECK: %[[VAL_8:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_2]], i64 0, i64 0333// CHECK: store ptr null, ptr %[[VAL_8]], align 8334// CHECK: %[[VAL_9:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_0]], i32 0, i32 0335// CHECK: %[[VAL_10:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_1]], i32 0, i32 0336// CHECK: call void @__tgt_target_data_begin_mapper(ptr @{{.*}}, i64 -1, i32 1, ptr %[[VAL_9]], ptr %[[VAL_10]], ptr @.offload_sizes, ptr @.offload_maptypes, ptr @.offload_mapnames, ptr null)337// CHECK: %[[VAL_11:.*]] = load ptr, ptr %[[VAL_6]], align 8338// CHECK: store i32 10, ptr %[[VAL_11]], align 4339// CHECK: %[[VAL_12:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_0]], i32 0, i32 0340// CHECK: %[[VAL_13:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_1]], i32 0, i32 0341// CHECK: call void @__tgt_target_data_end_mapper(ptr @{{.*}}, i64 -1, i32 1, ptr %[[VAL_12]], ptr %[[VAL_13]], ptr @.offload_sizes, ptr @.offload_maptypes, ptr @.offload_mapnames, ptr null)342// CHECK: ret void343 344// -----345 346module attributes {omp.target_triples = ["amdgcn-amd-amdhsa"]} {347 llvm.func @_QPopenmp_target_use_dev_addr_nomap() {348 %0 = llvm.mlir.constant(1 : i64) : i64349 %a = llvm.alloca %0 x !llvm.ptr : (i64) -> !llvm.ptr350 %1 = llvm.mlir.constant(1 : i64) : i64351 %b = llvm.alloca %0 x !llvm.ptr : (i64) -> !llvm.ptr352 %map = omp.map.info var_ptr(%b : !llvm.ptr, !llvm.ptr) map_clauses(from) capture(ByRef) -> !llvm.ptr {name = ""}353 %map2 = omp.map.info var_ptr(%a : !llvm.ptr, !llvm.ptr) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}354 omp.target_data map_entries(%map : !llvm.ptr) use_device_addr(%map2 -> %arg0 : !llvm.ptr) {355 %2 = llvm.mlir.constant(10 : i32) : i32356 %3 = llvm.load %arg0 : !llvm.ptr -> !llvm.ptr357 llvm.store %2, %3 : i32, !llvm.ptr358 %4 = llvm.mlir.constant(20 : i32) : i32359 %5 = llvm.load %b : !llvm.ptr -> !llvm.ptr360 llvm.store %4, %5 : i32, !llvm.ptr361 omp.terminator362 }363 llvm.return364 }365}366 367// CHECK: @.offload_sizes = private unnamed_addr constant [2 x i64] [i64 8, i64 0]368// CHECK: @.offload_maptypes = private unnamed_addr constant [2 x i64] [i64 2, i64 64]369// CHECK-LABEL: define void @_QPopenmp_target_use_dev_addr_nomap370// CHECK: %[[VAL_0:.*]] = alloca [2 x ptr], align 8371// CHECK: %[[VAL_1:.*]] = alloca [2 x ptr], align 8372// CHECK: %[[VAL_2:.*]] = alloca [2 x ptr], align 8373// CHECK: %[[VAL_3:.*]] = alloca ptr, i64 1, align 8374// CHECK: %[[VAL_4:.*]] = alloca ptr, i64 1, align 8375// CHECK: br label %[[VAL_5:.*]]376// CHECK: entry: ; preds = %[[VAL_6:.*]]377// CHECK: %[[VAL_7:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_0]], i32 0, i32 0378// CHECK: store ptr %[[VAL_4]], ptr %[[VAL_7]], align 8379// CHECK: %[[VAL_8:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_1]], i32 0, i32 0380// CHECK: store ptr %[[VAL_4]], ptr %[[VAL_8]], align 8381// CHECK: %[[VAL_9:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_2]], i64 0, i64 0382// CHECK: store ptr null, ptr %[[VAL_9]], align 8383// CHECK: %[[VAL_10:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_0]], i32 0, i32 1384// CHECK: store ptr %[[VAL_3]], ptr %[[VAL_10]], align 8385// CHECK: %[[VAL_11:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_1]], i32 0, i32 1386// CHECK: store ptr %[[VAL_3]], ptr %[[VAL_11]], align 8387// CHECK: %[[VAL_12:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_2]], i64 0, i64 1388// CHECK: store ptr null, ptr %[[VAL_12]], align 8389// CHECK: %[[VAL_13:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_0]], i32 0, i32 0390// CHECK: %[[VAL_14:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_1]], i32 0, i32 0391// CHECK: call void @__tgt_target_data_begin_mapper(ptr @3, i64 -1, i32 2, ptr %[[VAL_13]], ptr %[[VAL_14]], ptr @.offload_sizes, ptr @.offload_maptypes, ptr @.offload_mapnames, ptr null)392// CHECK: %[[VAL_15:.*]] = load ptr, ptr %[[VAL_10]], align 8393// CHECK: %[[VAL_16:.*]] = load ptr, ptr %[[VAL_15]], align 8394// CHECK: store i32 10, ptr %[[VAL_16]], align 4395// CHECK: %[[VAL_17:.*]] = load ptr, ptr %[[VAL_4]], align 8396// CHECK: store i32 20, ptr %[[VAL_17]], align 4397// CHECK: %[[VAL_18:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_0]], i32 0, i32 0398// CHECK: %[[VAL_19:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_1]], i32 0, i32 0399// CHECK: call void @__tgt_target_data_end_mapper(ptr @3, i64 -1, i32 2, ptr %[[VAL_18]], ptr %[[VAL_19]], ptr @.offload_sizes, ptr @.offload_maptypes, ptr @.offload_mapnames, ptr null)400// CHECK: ret void401 402// -----403 404module attributes {omp.target_triples = ["amdgcn-amd-amdhsa"]} {405 llvm.func @_QPopenmp_target_use_dev_both() {406 %0 = llvm.mlir.constant(1 : i64) : i64407 %a = llvm.alloca %0 x !llvm.ptr : (i64) -> !llvm.ptr408 %1 = llvm.mlir.constant(1 : i64) : i64409 %b = llvm.alloca %0 x !llvm.ptr : (i64) -> !llvm.ptr410 %map = omp.map.info var_ptr(%a : !llvm.ptr, !llvm.ptr) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}411 %map1 = omp.map.info var_ptr(%b : !llvm.ptr, !llvm.ptr) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}412 %map2 = omp.map.info var_ptr(%a : !llvm.ptr, !llvm.ptr) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}413 %map3 = omp.map.info var_ptr(%b : !llvm.ptr, !llvm.ptr) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}414 omp.target_data map_entries(%map, %map1 : !llvm.ptr, !llvm.ptr) use_device_addr(%map3 -> %arg0 : !llvm.ptr) use_device_ptr(%map2 -> %arg1 : !llvm.ptr) {415 %2 = llvm.mlir.constant(10 : i32) : i32416 %3 = llvm.load %arg1 : !llvm.ptr -> !llvm.ptr417 llvm.store %2, %3 : i32, !llvm.ptr418 %4 = llvm.mlir.constant(20 : i32) : i32419 %5 = llvm.load %arg0 : !llvm.ptr -> !llvm.ptr420 llvm.store %4, %5 : i32, !llvm.ptr421 omp.terminator422 }423 llvm.return424 }425}426 427// CHECK: @.offload_sizes = private unnamed_addr constant [2 x i64] [i64 8, i64 8]428// CHECK: @.offload_maptypes = private unnamed_addr constant [2 x i64] [i64 67, i64 67]429// CHECK-LABEL: define void @_QPopenmp_target_use_dev_both430// CHECK: %[[VAL_0:.*]] = alloca [2 x ptr], align 8431// CHECK: %[[VAL_1:.*]] = alloca [2 x ptr], align 8432// CHECK: %[[VAL_2:.*]] = alloca [2 x ptr], align 8433// CHECK: %[[VAL_3:.*]] = alloca ptr, align 8434// CHECK: %[[VAL_4:.*]] = alloca ptr, i64 1, align 8435// CHECK: %[[VAL_5:.*]] = alloca ptr, i64 1, align 8436// CHECK: br label %[[VAL_6:.*]]437// CHECK: entry: ; preds = %[[VAL_7:.*]]438// CHECK: %[[VAL_8:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_0]], i32 0, i32 0439// CHECK: store ptr %[[VAL_4]], ptr %[[VAL_8]], align 8440// CHECK: %[[VAL_9:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_1]], i32 0, i32 0441// CHECK: store ptr %[[VAL_4]], ptr %[[VAL_9]], align 8442// CHECK: %[[VAL_10:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_2]], i64 0, i64 0443// CHECK: store ptr null, ptr %[[VAL_10]], align 8444// CHECK: %[[VAL_11:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_0]], i32 0, i32 1445// CHECK: store ptr %[[VAL_5]], ptr %[[VAL_11]], align 8446// CHECK: %[[VAL_12:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_1]], i32 0, i32 1447// CHECK: store ptr %[[VAL_5]], ptr %[[VAL_12]], align 8448// CHECK: %[[VAL_13:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_2]], i64 0, i64 1449// CHECK: store ptr null, ptr %[[VAL_13]], align 8450// CHECK: %[[VAL_14:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_0]], i32 0, i32 0451// CHECK: %[[VAL_15:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_1]], i32 0, i32 0452// CHECK: call void @__tgt_target_data_begin_mapper(ptr @{{.*}}, i64 -1, i32 2, ptr %[[VAL_14]], ptr %[[VAL_15]], ptr @.offload_sizes, ptr @.offload_maptypes, ptr @.offload_mapnames, ptr null)453// CHECK: %[[VAL_16:.*]] = load ptr, ptr %[[VAL_8]], align 8454// CHECK: store ptr %[[VAL_16]], ptr %[[VAL_3]], align 8455// CHECK: %[[VAL_17:.*]] = load ptr, ptr %[[VAL_11]], align 8456// CHECK: %[[VAL_18:.*]] = load ptr, ptr %[[VAL_3]], align 8457// CHECK: store i32 10, ptr %[[VAL_18]], align 4458// CHECK: %[[VAL_19:.*]] = load ptr, ptr %[[VAL_17]], align 8459// CHECK: store i32 20, ptr %[[VAL_19]], align 4460// CHECK: %[[VAL_20:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_0]], i32 0, i32 0461// CHECK: %[[VAL_21:.*]] = getelementptr inbounds [2 x ptr], ptr %[[VAL_1]], i32 0, i32 0462// CHECK: call void @__tgt_target_data_end_mapper(ptr @{{.*}}, i64 -1, i32 2, ptr %[[VAL_20]], ptr %[[VAL_21]], ptr @.offload_sizes, ptr @.offload_maptypes, ptr @.offload_mapnames, ptr null)463// CHECK: ret void464 465// -----466 467module attributes {omp.target_triples = ["amdgcn-amd-amdhsa"]} {468 llvm.func @_QPopenmp_target_data_update() {469 %0 = llvm.mlir.constant(1 : i64) : i64470 %1 = llvm.alloca %0 x i32 {bindc_name = "i", in_type = i32, operand_segment_sizes = array<i32: 0, 0>, uniq_name = "_QFopenmp_target_dataEi"} : (i64) -> !llvm.ptr471 %2 = omp.map.info var_ptr(%1 : !llvm.ptr, i32) map_clauses(to) capture(ByRef) -> !llvm.ptr {name = ""}472 omp.target_data map_entries(%2 : !llvm.ptr) {473 %3 = llvm.mlir.constant(99 : i32) : i32474 llvm.store %3, %1 : i32, !llvm.ptr475 omp.terminator476 }477 478 omp.target_update map_entries(%2 : !llvm.ptr)479 480 llvm.return481 }482}483 484// CHECK-LABEL: define void @_QPopenmp_target_data_update485 486// CHECK-DAG: %[[OFFLOAD_BASEPTRS:.*]] = alloca [1 x ptr], align 8487// CHECK-DAG: %[[OFFLOAD_PTRS:.*]] = alloca [1 x ptr], align 8488// CHECK-DAG: %[[INT_ALLOCA:.*]] = alloca i32, i64 1, align 4489// CHECK-DAG: %[[OFFLOAD_MAPPERS:.*]] = alloca [1 x ptr], align 8490 491// CHECK: call void @__tgt_target_data_begin_mapper492// CHECK: store i32 99, ptr %[[INT_ALLOCA]], align 4493// CHECK: call void @__tgt_target_data_end_mapper494 495// CHECK: %[[BASEPTRS_VAL:.*]] = getelementptr inbounds [1 x ptr], ptr %[[OFFLOAD_BASEPTRS]], i32 0, i32 0496// CHECK: store ptr %[[INT_ALLOCA]], ptr %[[BASEPTRS_VAL]], align 8497// CHECK: %[[PTRS_VAL:.*]] = getelementptr inbounds [1 x ptr], ptr %[[OFFLOAD_PTRS]], i32 0, i32 0498// CHECK: store ptr %[[INT_ALLOCA]], ptr %[[PTRS_VAL]], align 8499// CHECK: %[[MAPPERS_VAL:.*]] = getelementptr inbounds [1 x ptr], ptr %[[OFFLOAD_MAPPERS]], i64 0, i64 0500// CHECK: store ptr null, ptr %[[MAPPERS_VAL]], align 8501// CHECK: %[[BASEPTRS_VAL_2:.*]] = getelementptr inbounds [1 x ptr], ptr %[[OFFLOAD_BASEPTRS]], i32 0, i32 0502// CHECK: %[[PTRS_VAL_2:.*]] = getelementptr inbounds [1 x ptr], ptr %[[OFFLOAD_PTRS]], i32 0, i32 0503// CHECK: call void @__tgt_target_data_update_mapper(ptr @2, i64 -1, i32 1, ptr %[[BASEPTRS_VAL_2]], ptr %[[PTRS_VAL_2]], ptr @{{.*}}, ptr @{{.*}}, ptr @{{.*}}, ptr null)504 505// CHECK: ret void506 507// -----508 509module attributes {omp.target_triples = ["amdgcn-amd-amdhsa"]} {510 omp.declare_mapper @_QQFmy_testmy_mapper : !llvm.struct<"_QFmy_testTmy_type", (i32)> {511 ^bb0(%arg0: !llvm.ptr):512 %0 = llvm.mlir.constant(0 : i32) : i32513 %1 = llvm.getelementptr %arg0[0, 0] : (!llvm.ptr) -> !llvm.ptr, !llvm.struct<"_QFmy_testTmy_type", (i32)>514 %2 = omp.map.info var_ptr(%1 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = "var%data"}515 %3 = omp.map.info var_ptr(%arg0 : !llvm.ptr, !llvm.struct<"_QFmy_testTmy_type", (i32)>) map_clauses(tofrom) capture(ByRef) members(%2 : [0] : !llvm.ptr) -> !llvm.ptr {name = "var", partial_map = true}516 omp.declare_mapper.info map_entries(%3, %2 : !llvm.ptr, !llvm.ptr)517 }518 519 llvm.func @_QPopenmp_target_data_mapper() {520 %0 = llvm.mlir.constant(1 : i64) : i64521 %1 = llvm.alloca %0 x !llvm.struct<"_QFmy_testTmy_type", (i32)> {bindc_name = "a"} : (i64) -> !llvm.ptr522 %2 = omp.map.info var_ptr(%1 : !llvm.ptr, !llvm.struct<"_QFmy_testTmy_type", (i32)>) map_clauses(tofrom) capture(ByRef) mapper(@_QQFmy_testmy_mapper) -> !llvm.ptr {name = "a"}523 omp.target_data map_entries(%2 : !llvm.ptr) {524 %3 = llvm.mlir.constant(10 : i32) : i32525 %4 = llvm.getelementptr %1[0, 0] : (!llvm.ptr) -> !llvm.ptr, !llvm.struct<"_QFmy_testTmy_type", (i32)>526 llvm.store %3, %4 : i32, !llvm.ptr527 omp.terminator528 }529 llvm.return530 }531}532 533// CHECK: @.offload_sizes = private unnamed_addr constant [1 x i64] [i64 4]534// CHECK: @.offload_maptypes = private unnamed_addr constant [1 x i64] [i64 3]535// CHECK-LABEL: define void @_QPopenmp_target_data_mapper536// CHECK: %[[VAL_0:.*]] = alloca [1 x ptr], align 8537// CHECK: %[[VAL_1:.*]] = alloca [1 x ptr], align 8538// CHECK: %[[VAL_2:.*]] = alloca [1 x ptr], align 8539// CHECK: %[[VAL_3:.*]] = alloca %[[VAL_4:.*]], i64 1, align 8540// CHECK: br label %[[VAL_5:.*]]541// CHECK: entry: ; preds = %[[VAL_6:.*]]542// CHECK: %[[VAL_7:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_0]], i32 0, i32 0543// CHECK: store ptr %[[VAL_3]], ptr %[[VAL_7]], align 8544// CHECK: %[[VAL_8:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_1]], i32 0, i32 0545// CHECK: store ptr %[[VAL_3]], ptr %[[VAL_8]], align 8546// CHECK: %[[VAL_9:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_2]], i64 0, i64 0547// CHECK: store ptr @.omp_mapper._QQFmy_testmy_mapper, ptr %[[VAL_9]], align 8548// CHECK: %[[VAL_10:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_0]], i32 0, i32 0549// CHECK: %[[VAL_11:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_1]], i32 0, i32 0550// CHECK: call void @__tgt_target_data_begin_mapper(ptr @4, i64 -1, i32 1, ptr %[[VAL_10]], ptr %[[VAL_11]], ptr @.offload_sizes, ptr @.offload_maptypes, ptr @.offload_mapnames, ptr %[[VAL_2]])551// CHECK: %[[VAL_12:.*]] = getelementptr %[[VAL_4]], ptr %[[VAL_3]], i32 0, i32 0552// CHECK: store i32 10, ptr %[[VAL_12]], align 4553// CHECK: %[[VAL_13:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_0]], i32 0, i32 0554// CHECK: %[[VAL_14:.*]] = getelementptr inbounds [1 x ptr], ptr %[[VAL_1]], i32 0, i32 0555// CHECK: call void @__tgt_target_data_end_mapper(ptr @4, i64 -1, i32 1, ptr %[[VAL_13]], ptr %[[VAL_14]], ptr @.offload_sizes, ptr @.offload_maptypes, ptr @.offload_mapnames, ptr %[[VAL_2]])556// CHECK: ret void557 558// CHECK-LABEL: define internal void @.omp_mapper._QQFmy_testmy_mapper559// CHECK: entry:560// CHECK: %[[VAL_15:.*]] = udiv exact i64 %[[VAL_16:.*]], 4561// CHECK: %[[VAL_17:.*]] = getelementptr %[[VAL_18:.*]], ptr %[[VAL_19:.*]], i64 %[[VAL_15]]562// CHECK: %[[VAL_20:.*]] = icmp sgt i64 %[[VAL_15]], 1563// CHECK: %[[VAL_21:.*]] = and i64 %[[VAL_22:.*]], 8564// CHECK: %[[VAL_23:.*]] = icmp ne ptr %[[VAL_24:.*]], %[[VAL_19]]565// CHECK: %[[VAL_25:.*]] = and i64 %[[VAL_22]], 16566// CHECK: %[[VAL_26:.*]] = icmp ne i64 %[[VAL_25]], 0567// CHECK: %[[VAL_27:.*]] = and i1 %[[VAL_23]], %[[VAL_26]]568// CHECK: %[[VAL_28:.*]] = or i1 %[[VAL_20]], %[[VAL_27]]569// CHECK: %[[VAL_29:.*]] = icmp eq i64 %[[VAL_21]], 0570// CHECK: %[[VAL_30:.*]] = and i1 %[[VAL_28]], %[[VAL_29]]571// CHECK: br i1 %[[VAL_30]], label %[[VAL_31:.*]], label %[[VAL_32:.*]]572// CHECK: .omp.array..init: ; preds = %[[VAL_33:.*]]573// CHECK: %[[VAL_34:.*]] = mul nuw i64 %[[VAL_15]], 4574// CHECK: %[[VAL_35:.*]] = and i64 %[[VAL_22]], -4575// CHECK: %[[VAL_36:.*]] = or i64 %[[VAL_35]], 512576// CHECK: call void @__tgt_push_mapper_component(ptr %[[VAL_37:.*]], ptr %[[VAL_24]], ptr %[[VAL_19]], i64 %[[VAL_34]], i64 %[[VAL_36]], ptr %[[VAL_38:.*]])577// CHECK: br label %[[VAL_32]]578// CHECK: omp.arraymap.head: ; preds = %[[VAL_31]], %[[VAL_33]]579// CHECK: %[[VAL_39:.*]] = icmp eq ptr %[[VAL_19]], %[[VAL_17]]580// CHECK: br i1 %[[VAL_39]], label %[[VAL_40:.*]], label %[[VAL_41:.*]]581// CHECK: omp.arraymap.body: ; preds = %[[VAL_42:.*]], %[[VAL_32]]582// CHECK: %[[VAL_43:.*]] = phi ptr [ %[[VAL_19]], %[[VAL_32]] ], [ %[[VAL_44:.*]], %[[VAL_42]] ]583// CHECK: %[[VAL_45:.*]] = getelementptr %[[VAL_18]], ptr %[[VAL_43]], i32 0, i32 0584// CHECK: %[[VAL_46:.*]] = call i64 @__tgt_mapper_num_components(ptr %[[VAL_37]])585// CHECK: %[[VAL_47:.*]] = shl i64 %[[VAL_46]], 48586// CHECK: %[[VAL_48:.*]] = add nuw i64 3, %[[VAL_47]]587// CHECK: %[[VAL_49:.*]] = and i64 %[[VAL_22]], 3588// CHECK: %[[VAL_50:.*]] = icmp eq i64 %[[VAL_49]], 0589// CHECK: br i1 %[[VAL_50]], label %[[VAL_51:.*]], label %[[VAL_52:.*]]590// CHECK: omp.type.alloc: ; preds = %[[VAL_41]]591// CHECK: %[[VAL_53:.*]] = and i64 %[[VAL_48]], -4592// CHECK: br label %[[VAL_42]]593// CHECK: omp.type.alloc.else: ; preds = %[[VAL_41]]594// CHECK: %[[VAL_54:.*]] = icmp eq i64 %[[VAL_49]], 1595// CHECK: br i1 %[[VAL_54]], label %[[VAL_55:.*]], label %[[VAL_56:.*]]596// CHECK: omp.type.to: ; preds = %[[VAL_52]]597// CHECK: %[[VAL_57:.*]] = and i64 %[[VAL_48]], -3598// CHECK: br label %[[VAL_42]]599// CHECK: omp.type.to.else: ; preds = %[[VAL_52]]600// CHECK: %[[VAL_58:.*]] = icmp eq i64 %[[VAL_49]], 2601// CHECK: br i1 %[[VAL_58]], label %[[VAL_59:.*]], label %[[VAL_42]]602// CHECK: omp.type.from: ; preds = %[[VAL_56]]603// CHECK: %[[VAL_60:.*]] = and i64 %[[VAL_48]], -2604// CHECK: br label %[[VAL_42]]605// CHECK: omp.type.end: ; preds = %[[VAL_59]], %[[VAL_56]], %[[VAL_55]], %[[VAL_51]]606// CHECK: %[[VAL_61:.*]] = phi i64 [ %[[VAL_53]], %[[VAL_51]] ], [ %[[VAL_57]], %[[VAL_55]] ], [ %[[VAL_60]], %[[VAL_59]] ], [ %[[VAL_48]], %[[VAL_56]] ]607// CHECK: call void @__tgt_push_mapper_component(ptr %[[VAL_37]], ptr %[[VAL_43]], ptr %[[VAL_45]], i64 4, i64 %[[VAL_61]], ptr @2)608// CHECK: %[[VAL_44]] = getelementptr %[[VAL_18]], ptr %[[VAL_43]], i32 1609// CHECK: %[[VAL_62:.*]] = icmp eq ptr %[[VAL_44]], %[[VAL_17]]610// CHECK: br i1 %[[VAL_62]], label %[[VAL_63:.*]], label %[[VAL_41]]611// CHECK: omp.arraymap.exit: ; preds = %[[VAL_42]]612// CHECK: %[[VAL_64:.*]] = icmp sgt i64 %[[VAL_15]], 1613// CHECK: %[[VAL_65:.*]] = and i64 %[[VAL_22]], 8614// CHECK: %[[VAL_66:.*]] = icmp ne i64 %[[VAL_65]], 0615// CHECK: %[[VAL_67:.*]] = and i1 %[[VAL_64]], %[[VAL_66]]616// CHECK: br i1 %[[VAL_67]], label %[[VAL_68:.*]], label %[[VAL_40]]617// CHECK: .omp.array..del: ; preds = %[[VAL_63]]618// CHECK: %[[VAL_69:.*]] = mul nuw i64 %[[VAL_15]], 4619// CHECK: %[[VAL_70:.*]] = and i64 %[[VAL_22]], -4620// CHECK: %[[VAL_71:.*]] = or i64 %[[VAL_70]], 512621// CHECK: call void @__tgt_push_mapper_component(ptr %[[VAL_37]], ptr %[[VAL_24]], ptr %[[VAL_19]], i64 %[[VAL_69]], i64 %[[VAL_71]], ptr %[[VAL_38]])622// CHECK: br label %[[VAL_40]]623// CHECK: omp.done: ; preds = %[[VAL_68]], %[[VAL_63]], %[[VAL_32]]624// CHECK: ret void625