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1// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s2 3// The aim of the test is to check the GPU LLVM IR codegen4// for nested omp do loop inside omp target region5 6module attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<"dlti.alloca_memory_space", 5 : ui32>>, llvm.data_layout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128:128:48-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8", llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_gpu = true, omp.is_target_device = true } {7 llvm.func @target_parallel_wsloop(%arg0: !llvm.ptr) attributes {omp.declare_target = #omp.declaretarget<device_type = (any), capture_clause = (to)>,8 target_cpu = "gfx90a",9 target_features = #llvm.target_features<["+gfx9-insts", "+wavefrontsize64"]>}10 {11 omp.parallel {12 %loop_ub = llvm.mlir.constant(9 : i32) : i3213 %loop_lb = llvm.mlir.constant(0 : i32) : i3214 %loop_step = llvm.mlir.constant(1 : i32) : i3215 omp.wsloop {16 omp.loop_nest (%loop_cnt) : i32 = (%loop_lb) to (%loop_ub) inclusive step (%loop_step) {17 %gep = llvm.getelementptr %arg0[0, %loop_cnt] : (!llvm.ptr, i32) -> !llvm.ptr, !llvm.array<10 x i32>18 llvm.store %loop_cnt, %gep : i32, !llvm.ptr19 omp.yield20 }21 }22 omp.terminator23 }24 25 llvm.return26 }27 28}29// CHECK: call void @__kmpc_parallel_51(ptr addrspacecast30// CHECK-SAME: (ptr addrspace(1) @[[GLOB:[0-9]+]] to ptr),31// CHECK-SAME: i32 %[[THREAD_NUM:.*]], i32 1, i32 -1, i32 -1,32// CHECK-SAME: ptr @[[PARALLEL_FUNC:.*]], ptr null, ptr %[[PARALLEL_ARGS:.*]], i64 1)33 34// CHECK: define internal void @[[PARALLEL_FUNC]]35// CHECK-SAME: (ptr noalias noundef %[[TID_ADDR:.*]], ptr noalias noundef %[[ZERO_ADDR:.*]],36// CHECK-SAME: ptr %[[ARG_PTR:.*]])37// CHECK-SAME: #[[ATTRS1:[0-9]+]]38// CHECK: call void @__kmpc_for_static_loop_4u(ptr addrspacecast (ptr addrspace(1) @[[GLOB]] to ptr),39// CHECK-SAME: ptr @[[LOOP_BODY_FUNC:.*]], ptr %[[LOO_BODY_FUNC_ARG:.*]], i32 10,40// CHECK-SAME: i32 %[[THREAD_NUM:.*]], i8 0)41 42// CHECK: define internal void @[[LOOP_BODY_FUNC]](i32 %[[CNT:.*]], ptr %[[LOOP_BODY_ARG_PTR:.*]]) #[[ATTRS2:[0-9]+]] {43 44// CHECK: attributes #[[ATTRS2]] = {45// CHECK-SAME: "target-cpu"="gfx90a"46// CHECK-SAME: "target-features"="+gfx9-insts,+wavefrontsize64"47// CHECK: attributes #[[ATTRS1]] = {48// CHECK-SAME: "target-cpu"="gfx90a"49// CHECK-SAME: "target-features"="+gfx9-insts,+wavefrontsize64"50