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1// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s2 3// Not intended to be a functional example, the aim of this test is to verify4// omp.threadprivate does not crash on lowering during the OpenMP target device5// pass when used in conjunction with target code in the same module.6 7module attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<"dlti.alloca_memory_space", 5 : ui32>>, llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_target_device = true } {8 llvm.func @func() attributes {omp.declare_target = #omp.declaretarget<device_type = (host), capture_clause = (to)>} {9 %0 = llvm.mlir.addressof @_QFEpointer2 : !llvm.ptr10 %1 = omp.threadprivate %0 : !llvm.ptr -> !llvm.ptr11 %2 = omp.map.info var_ptr(%1 : !llvm.ptr, !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8, array<1 x array<3 x i64>>)>) map_clauses(implicit, to) capture(ByRef) -> !llvm.ptr12 omp.target map_entries(%2 -> %arg0 : !llvm.ptr) {13 %3 = llvm.mlir.constant(1 : i32) : i3214 %4 = llvm.getelementptr %arg0[0, 0] : (!llvm.ptr) -> !llvm.ptr, !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8, array<1 x array<3 x i64>>)>15 llvm.store %3, %4 : i32, !llvm.ptr16 omp.terminator17 }18 llvm.return19 }20 llvm.mlir.global internal @_QFEpointer2() {addr_space = 0 : i32} : !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8, array<1 x array<3 x i64>>)> {21 %0 = llvm.mlir.undef : !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8, array<1 x array<3 x i64>>)>22 llvm.return %0 : !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8, array<1 x array<3 x i64>>)>23 }24}25 26// CHECK: define weak_odr protected amdgpu_kernel void @{{.*}}(ptr %{{.*}}, ptr %[[ARG1:.*]]) #{{[0-9]+}} {27// CHECK: %[[ALLOCA:.*]] = alloca ptr, align 8, addrspace(5)28// CHECK: %[[ALLOCA_ASCAST:.*]] = addrspacecast ptr addrspace(5) %[[ALLOCA]] to ptr29// CHECK: store ptr %[[ARG1]], ptr %[[ALLOCA_ASCAST]], align 830// CHECK: %[[LOAD_ALLOCA:.*]] = load ptr, ptr %[[ALLOCA_ASCAST]], align 831// CHECK: store i32 1, ptr %[[LOAD_ALLOCA]], align 432