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1// RUN: mlir-translate -mlir-to-llvmir -split-input-file %s | FileCheck %s2 3//CHECK-LABEL: define void @_QPsimd_aligned_pointer() {4//CHECK: %[[A_PTR:.*]] = alloca { ptr, i64, i32, i8, i8, i8, i8 }, i64 1, align 85//CHECK: %[[A_VAL:.*]] = load ptr, ptr %[[A_PTR]], align 86//CHECK: call void @llvm.assume(i1 true) [ "align"(ptr %[[A_VAL]], i64 256) ]7llvm.func @_QPsimd_aligned_pointer() {8 %1 = llvm.mlir.constant(1 : i64) : i649 %2 = llvm.alloca %1 x !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8)> {bindc_name = "x"} : (i64) -> !llvm.ptr10 %3 = llvm.alloca %1 x i32 {bindc_name = "i", pinned} : (i64) -> !llvm.ptr11 %4 = llvm.mlir.constant(1 : i32) : i3212 %5 = llvm.mlir.constant(10 : i32) : i3213 %6 = llvm.mlir.constant(1 : i32) : i3214 omp.simd aligned(%2 : !llvm.ptr -> 256 : i64) {15 omp.loop_nest (%arg0) : i32 = (%4) to (%5) inclusive step (%6) {16 llvm.store %arg0, %3 : i32, !llvm.ptr17 omp.yield18 }19 }20 llvm.return21}22 23//CHECK-LABEL: define void @_QPsimd_aligned_cptr() {24//CHECK: %[[A_CPTR:.*]] = alloca %_QM__fortran_builtinsT__builtin_c_ptr, i64 1, align 825//CHECK: %[[A_VAL:.*]] = load ptr, ptr %[[A_CPTR]], align 826//CHECK: call void @llvm.assume(i1 true) [ "align"(ptr %[[A_VAL]], i64 256) ]27llvm.func @_QPsimd_aligned_cptr() {28 %0 = llvm.mlir.constant(1 : i64) : i6429 %1 = llvm.alloca %0 x !llvm.struct<"_QM__fortran_builtinsT__builtin_c_ptr", (i64)> {bindc_name = "a"} : (i64) -> !llvm.ptr30 %2 = llvm.mlir.constant(1 : i64) : i6431 %3 = llvm.alloca %2 x i32 {bindc_name = "i", pinned} : (i64) -> !llvm.ptr32 %4 = llvm.mlir.constant(1 : i32) : i3233 %5 = llvm.mlir.constant(10 : i32) : i3234 %6 = llvm.mlir.constant(1 : i32) : i3235 omp.simd aligned(%1 : !llvm.ptr -> 256 : i64) {36 omp.loop_nest (%arg0) : i32 = (%4) to (%5) inclusive step (%6) {37 llvm.store %arg0, %3 : i32, !llvm.ptr38 omp.yield39 }40 }41 llvm.return42}43 44//CHECK-LABEL: define void @_QPsimd_aligned_allocatable() {45//CHECK: %[[A_ADDR:.*]] = alloca { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, i64 1, align 846//CHECK: %[[A_VAL:.*]] = load ptr, ptr %[[A_ADDR]], align 847//CHECK: call void @llvm.assume(i1 true) [ "align"(ptr %[[A_VAL]], i64 256) ]48llvm.func @_QPsimd_aligned_allocatable() {49 %0 = llvm.mlir.constant(1 : i64) : i6450 %1 = llvm.alloca %0 x !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8, array<1 x array<3 x i64>>)> {bindc_name = "a"} : (i64) -> !llvm.ptr51 %2 = llvm.mlir.constant(1 : i32) : i3252 %3 = llvm.mlir.constant(10 : i32) : i3253 %4 = llvm.mlir.constant(1 : i32) : i3254 omp.simd aligned(%1 : !llvm.ptr -> 256 : i64) {55 omp.loop_nest (%arg0) : i32 = (%2) to (%3) inclusive step (%4) {56 omp.yield57 }58 }59 llvm.return60}61 62//CHECK-LABEL: define void @_QPsimd_aligned_non_power_of_two() {63//CHECK: %[[A_ADDR:.*]] = alloca { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, i64 1, align 864//CHECK: %[[B_ADDR:.*]] = alloca { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, i64 1, align 865//CHECK: %[[LOAD_B:.*]] = load ptr, ptr %[[B_ADDR]], align 866//CHECK: call void @llvm.assume(i1 true) [ "align"(ptr %[[LOAD_B]], i64 64) ]67//CHECK-NOT: call void @llvm.assume(i1 true) [ "align"(ptr %{{.*}}, i64 257) ]68llvm.func @_QPsimd_aligned_non_power_of_two() {69 %0 = llvm.mlir.constant(1 : i64) : i6470 %1 = llvm.alloca %0 x !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8, array<1 x array<3 x i64>>)> {bindc_name = "a"} : (i64) -> !llvm.ptr71 %2 = llvm.alloca %0 x !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8, array<1 x array<3 x i64>>)> {bindc_name = "b"} : (i64) -> !llvm.ptr72 %3 = llvm.mlir.constant(1 : i32) : i3273 %4 = llvm.mlir.constant(10 : i32) : i3274 %5 = llvm.mlir.constant(1 : i32) : i3275 omp.simd aligned(%1 : !llvm.ptr -> 257 : i64, %2 : !llvm.ptr -> 64 : i64) {76 omp.loop_nest (%arg0) : i32 = (%3) to (%4) inclusive step (%5) {77 omp.yield78 }79 }80 llvm.return81}82 83