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1// RUN: split-file %s %t2// RUN: mlir-translate -mlir-to-llvmir %t/host.mlir | FileCheck %s --check-prefix=HOST3// RUN: mlir-translate -mlir-to-llvmir %t/device.mlir | FileCheck %s --check-prefix=DEVICE4 5//--- host.mlir6 7module attributes {omp.is_target_device = false, omp.target_triples = ["amdgcn-amd-amdhsa"]} {8 llvm.func @main(%x : i32) {9 omp.target host_eval(%x -> %lb, %x -> %ub, %x -> %step : i32, i32, i32) {10 omp.teams {11 omp.parallel {12 omp.distribute {13 omp.wsloop {14 omp.loop_nest (%iv) : i32 = (%lb) to (%ub) step (%step) {15 omp.yield16 }17 } {omp.composite}18 } {omp.composite}19 omp.terminator20 } {omp.composite}21 omp.terminator22 }23 omp.terminator24 }25 llvm.return26 }27}28 29// HOST-LABEL: define void @main30// HOST: %omp_loop.tripcount = {{.*}}31// HOST-NEXT: br label %[[ENTRY:.*]]32// HOST: [[ENTRY]]:33// HOST-NEXT: %[[TRIPCOUNT:.*]] = zext i32 %omp_loop.tripcount to i6434// HOST: %[[TRIPCOUNT_KARG:.*]] = getelementptr inbounds nuw %struct.__tgt_kernel_arguments, ptr %[[KARGS:.*]], i32 0, i32 835// HOST-NEXT: store i64 %[[TRIPCOUNT]], ptr %[[TRIPCOUNT_KARG]]36// HOST: %[[RESULT:.*]] = call i32 @__tgt_target_kernel({{.*}}, ptr %[[KARGS]])37// HOST-NEXT: %[[CMP:.*]] = icmp ne i32 %[[RESULT]], 038// HOST-NEXT: br i1 %[[CMP]], label %[[OFFLOAD_FAILED:.*]], label %{{.*}}39// HOST: [[OFFLOAD_FAILED]]:40// HOST: call void @[[TARGET_OUTLINE:.*]]({{.*}})41 42// HOST: define internal void @[[TARGET_OUTLINE]]43// HOST: call void{{.*}}@__kmpc_fork_teams({{.*}}, ptr @[[TEAMS_OUTLINE:.*]], {{.*}})44 45// HOST: define internal void @[[TEAMS_OUTLINE]]46// HOST: call void{{.*}}@__kmpc_fork_call({{.*}}, ptr @[[PARALLEL_OUTLINE:.*]], {{.*}})47 48// HOST: define internal void @[[PARALLEL_OUTLINE]]49// HOST: call void @__kmpc_dist_for_static_init{{.*}}(ptr {{.*}}, i32 {{.*}}, i32 34, ptr {{.*}}, ptr {{.*}}, ptr {{.*}}, ptr {{.*}}, ptr {{.*}}, i32 {{.*}}, i32 {{.*}})50 51//--- device.mlir52 53module attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<"dlti.alloca_memory_space", 5 : ui32>>, llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_target_device = true, omp.is_gpu = true} {54 llvm.func @main(%x : i32) {55 omp.target host_eval(%x -> %lb, %x -> %ub, %x -> %step : i32, i32, i32) {56 omp.teams {57 omp.parallel {58 omp.distribute {59 omp.wsloop {60 omp.loop_nest (%iv) : i32 = (%lb) to (%ub) step (%step) {61 omp.yield62 }63 } {omp.composite}64 } {omp.composite}65 omp.terminator66 } {omp.composite}67 omp.terminator68 }69 omp.terminator70 }71 llvm.return72 }73}74 75// DEVICE: @[[KERNEL_NAME:.*]]_exec_mode = weak protected constant i8 276// DEVICE: @llvm.compiler.used = appending global [1 x ptr] [ptr @[[KERNEL_NAME]]_exec_mode], section "llvm.metadata"77// DEVICE: @[[KERNEL_NAME]]_kernel_environment = weak_odr protected constant %struct.KernelEnvironmentTy {78// DEVICE-SAME: %struct.ConfigurationEnvironmentTy { i8 0, i8 1, i8 [[EXEC_MODE:2]], {{.*}}},79// DEVICE-SAME: ptr @{{.*}}, ptr @{{.*}} }80 81// DEVICE: define weak_odr protected amdgpu_kernel void @[[KERNEL_NAME]]({{.*}})82// DEVICE: %{{.*}} = call i32 @__kmpc_target_init(ptr @[[KERNEL_NAME]]_kernel_environment, {{.*}})83// DEVICE: call void @[[TARGET_OUTLINE:.*]]({{.*}})84// DEVICE: call void @__kmpc_target_deinit()85 86// DEVICE: define internal void @[[TARGET_OUTLINE]]({{.*}})87// DEVICE: call void @__kmpc_parallel_51(ptr {{.*}}, i32 {{.*}}, i32 {{.*}}, i32 {{.*}}, i32 {{.*}}, ptr @[[PARALLEL_OUTLINE:.*]], ptr {{.*}}, ptr {{.*}}, i64 {{.*}})88 89// DEVICE: define internal void @[[PARALLEL_OUTLINE]]({{.*}})90// DEVICE: call void @[[DISTRIBUTE_OUTLINE:.*]]({{.*}})91 92// DEVICE: define internal void @[[DISTRIBUTE_OUTLINE]]({{.*}})93// DEVICE: call void @__kmpc_distribute_for_static_loop{{.*}}({{.*}})94