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1// RUN: mlir-translate --mlir-to-llvmir %s | FileCheck %s2 3// Check that omp.simd as a leaf of a composite construct still generates4// the appropriate loop vectorization attribute.5 6// CHECK-LABEL: define internal void @test_teams_distribute_parallel_do_simd..omp_par.17// CHECK: teams.body:8// CHECK: omp.teams.region:9 10// CHECK-LABEL: define internal void @test_teams_distribute_parallel_do_simd..omp_par11// CHECK: omp.par.entry:12// CHECK: omp.par.region:13// CHECK: distribute.body:14// CHECK: omp.distribute.region:15// CHECK: omp_loop.header:16// CHECK: omp_loop.inc:17// CHECK-NEXT: %omp_loop.next = add nuw i32 %omp_loop.iv, 118// CHECK-NEXT: br label %omp_loop.header, !llvm.loop ![[LOOP_ATTR:.*]]19// CHECK: omp.par.exit.exitStub:20 21// CHECK: ![[LOOP_ATTR]] = distinct !{![[LOOP_ATTR]], ![[LPAR:.*]], ![[LVEC:.*]]}22// CHECK: ![[LPAR]] = !{!"llvm.loop.parallel_accesses", ![[PAR_ACC:.*]]}23// CHECK: ![[LVEC]] = !{!"llvm.loop.vectorize.enable", i1 true}24 25omp.private {type = private} @_QFEi_private_i32 : i3226llvm.func @test_teams_distribute_parallel_do_simd() {27 %0 = llvm.mlir.constant(1 : i64) : i6428 %1 = llvm.alloca %0 x i32 {bindc_name = "i"} : (i64) -> !llvm.ptr29 %2 = llvm.mlir.constant(1000 : i32) : i3230 %3 = llvm.mlir.constant(1 : i32) : i3231 %4 = llvm.mlir.constant(1 : i64) : i6432 omp.teams {33 omp.parallel {34 omp.distribute {35 omp.wsloop {36 omp.simd private(@_QFEi_private_i32 %1 -> %arg0 : !llvm.ptr) {37 omp.loop_nest (%arg1) : i32 = (%3) to (%2) inclusive step (%3) {38 llvm.store %arg1, %arg0 : i32, !llvm.ptr39 omp.yield40 }41 } {omp.composite}42 } {omp.composite}43 } {omp.composite}44 omp.terminator45 } {omp.composite}46 omp.terminator47 }48 llvm.return49}50