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1// RUN: mlir-translate --no-implicit-module --test-spirv-roundtrip --split-input-file %s | FileCheck %s2 3// RUN: %if spirv-tools %{ rm -rf %t %}4// RUN: %if spirv-tools %{ mkdir %t %}5// RUN: %if spirv-tools %{ mlir-translate --no-implicit-module --serialize-spirv --split-input-file --spirv-save-validation-files-with-prefix=%t/module %s %}6// RUN: %if spirv-tools %{ spirv-val %t %}7 8spirv.module Logical GLSL450 requires #spirv.vce<v1.3,9 [Shader, Linkage, SubgroupBallotKHR, Groups, GroupNonUniformArithmetic, GroupUniformArithmeticKHR],10 [SPV_KHR_storage_buffer_storage_class, SPV_KHR_shader_ballot, SPV_KHR_uniform_group_instructions]> {11 // CHECK-LABEL: @subgroup_ballot12 spirv.func @subgroup_ballot(%predicate: i1) -> vector<4xi32> "None" {13 // CHECK: %{{.*}} = spirv.KHR.SubgroupBallot %{{.*}}: vector<4xi32>14 %0 = spirv.KHR.SubgroupBallot %predicate: vector<4xi32>15 spirv.ReturnValue %0: vector<4xi32>16 }17 // CHECK-LABEL: @group_broadcast_118 spirv.func @group_broadcast_1(%value: f32, %localid: i32 ) -> f32 "None" {19 // CHECK: spirv.GroupBroadcast <Workgroup> %{{.*}}, %{{.*}} : f32, i3220 %0 = spirv.GroupBroadcast <Workgroup> %value, %localid : f32, i3221 spirv.ReturnValue %0: f3222 }23 // CHECK-LABEL: @group_broadcast_224 spirv.func @group_broadcast_2(%value: f32, %localid: vector<3xi32> ) -> f32 "None" {25 // CHECK: spirv.GroupBroadcast <Workgroup> %{{.*}}, %{{.*}} : f32, vector<3xi32>26 %0 = spirv.GroupBroadcast <Workgroup> %value, %localid : f32, vector<3xi32>27 spirv.ReturnValue %0: f3228 }29 // CHECK-LABEL: @group_iadd30 spirv.func @group_iadd(%value: i32) -> i32 "None" {31 // CHECK: spirv.GroupIAdd <Workgroup> <Reduce> %{{.*}} : i3232 %0 = spirv.GroupIAdd <Workgroup> <Reduce> %value : i3233 spirv.ReturnValue %0: i3234 }35 // CHECK-LABEL: @group_fadd36 spirv.func @group_fadd(%value: f32) -> f32 "None" {37 // CHECK: spirv.GroupFAdd <Workgroup> <Reduce> %{{.*}} : f3238 %0 = spirv.GroupFAdd <Workgroup> <Reduce> %value : f3239 spirv.ReturnValue %0: f3240 }41 // CHECK-LABEL: @group_fmin42 spirv.func @group_fmin(%value: f32) -> f32 "None" {43 // CHECK: spirv.GroupFMin <Workgroup> <Reduce> %{{.*}} : f3244 %0 = spirv.GroupFMin <Workgroup> <Reduce> %value : f3245 spirv.ReturnValue %0: f3246 }47 // CHECK-LABEL: @group_umin48 spirv.func @group_umin(%value: i32) -> i32 "None" {49 // CHECK: spirv.GroupUMin <Workgroup> <Reduce> %{{.*}} : i3250 %0 = spirv.GroupUMin <Workgroup> <Reduce> %value : i3251 spirv.ReturnValue %0: i3252 }53 // CHECK-LABEL: @group_smin54 spirv.func @group_smin(%value: i32) -> i32 "None" {55 // CHECK: spirv.GroupSMin <Workgroup> <Reduce> %{{.*}} : i3256 %0 = spirv.GroupSMin <Workgroup> <Reduce> %value : i3257 spirv.ReturnValue %0: i3258 }59 // CHECK-LABEL: @group_fmax60 spirv.func @group_fmax(%value: f32) -> f32 "None" {61 // CHECK: spirv.GroupFMax <Workgroup> <Reduce> %{{.*}} : f3262 %0 = spirv.GroupFMax <Workgroup> <Reduce> %value : f3263 spirv.ReturnValue %0: f3264 }65 // CHECK-LABEL: @group_umax66 spirv.func @group_umax(%value: i32) -> i32 "None" {67 // CHECK: spirv.GroupUMax <Workgroup> <Reduce> %{{.*}} : i3268 %0 = spirv.GroupUMax <Workgroup> <Reduce> %value : i3269 spirv.ReturnValue %0: i3270 }71 // CHECK-LABEL: @group_smax72 spirv.func @group_smax(%value: i32) -> i32 "None" {73 // CHECK: spirv.GroupSMax <Workgroup> <Reduce> %{{.*}} : i3274 %0 = spirv.GroupSMax <Workgroup> <Reduce> %value : i3275 spirv.ReturnValue %0: i3276 }77 // CHECK-LABEL: @group_imul78 spirv.func @group_imul(%value: i32) -> i32 "None" {79 // CHECK: spirv.KHR.GroupIMul <Workgroup> <Reduce> %{{.*}} : i3280 %0 = spirv.KHR.GroupIMul <Workgroup> <Reduce> %value : i3281 spirv.ReturnValue %0: i3282 }83 // CHECK-LABEL: @group_fmul84 spirv.func @group_fmul(%value: f32) -> f32 "None" {85 // CHECK: spirv.KHR.GroupFMul <Workgroup> <Reduce> %{{.*}} : f3286 %0 = spirv.KHR.GroupFMul <Workgroup> <Reduce> %value : f3287 spirv.ReturnValue %0: f3288 }89}90 91// -----92 93spirv.module Logical GLSL450 requires #spirv.vce<v1.3, [Shader, GroupNonUniformBallot, Linkage], []> {94 // CHECK-LABEL: @group_non_uniform_ballot_bit_count95 spirv.func @group_non_uniform_ballot_bit_count(%value: vector<4xi32>) -> i32 "None" {96 // CHECK: spirv.GroupNonUniformBallotBitCount <Subgroup> <Reduce> {{%.*}} : vector<4xi32> -> i3297 %0 = spirv.GroupNonUniformBallotBitCount <Subgroup> <Reduce> %value : vector<4xi32> -> i3298 spirv.ReturnValue %0 : i3299 }100}101