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1; RUN: opt %loadNPMPolly -polly-allow-nonaffine -polly-allow-nonaffine-branches -polly-allow-nonaffine-loops '-passes=polly-custom<scops>' -polly-print-detect -polly-print-scops -disable-output < %s 2>&1 | FileCheck %s2; RUN: opt %loadNPMPolly -polly-allow-nonaffine -polly-allow-nonaffine-branches -polly-allow-nonaffine-loops -polly-unprofitable-scalar-accs=true -polly-process-unprofitable=false '-passes=polly-custom<scops>' -polly-print-detect -polly-print-scops -disable-output < %s 2>&1 | FileCheck %s --check-prefix=PROFIT3;4; Verify that we over approximate the read access of A[j] in the last statement as j is5; computed in a non-affine loop we do not model.6;7; CHECK: Function: f8; CHECK-NEXT: Region: %bb2---%bb249; CHECK-NEXT: Max Loop Depth: 110; CHECK-NEXT: Invariant Accesses: {11; CHECK-NEXT: }12; CHECK-NEXT: Context:13; CHECK-NEXT: [N] -> { : -2147483648 <= N <= 2147483647 }14; CHECK-NEXT: Assumed Context:15; CHECK-NEXT: [N] -> { : }16; CHECK-NEXT: Invalid Context:17; CHECK-NEXT: [N] -> { : false }18; CHECK: p0: %N19; CHECK-NEXT: Arrays {20; CHECK-NEXT: i32 MemRef_j_0__phi; // Element size 421; CHECK-NEXT: i32 MemRef_j_0; // Element size 422; CHECK-NEXT: i32 MemRef_A[*]; // Element size 423; CHECK-NEXT: i32 MemRef_j_2__phi; // Element size 424; CHECK-NEXT: i32 MemRef_j_2; // Element size 425; CHECK-NEXT: }26; CHECK-NEXT: Arrays (Bounds as pw_affs) {27; CHECK-NEXT: i32 MemRef_j_0__phi; // Element size 428; CHECK-NEXT: i32 MemRef_j_0; // Element size 429; CHECK-NEXT: i32 MemRef_A[*]; // Element size 430; CHECK-NEXT: i32 MemRef_j_2__phi; // Element size 431; CHECK-NEXT: i32 MemRef_j_2; // Element size 432; CHECK-NEXT: }33; CHECK-NEXT: Alias Groups (0):34; CHECK-NEXT: n/a35; CHECK-NEXT: Statements {36; CHECK-NEXT: Stmt_bb237; CHECK-NEXT: Domain :=38; CHECK-NEXT: [N] -> { Stmt_bb2[i0] : 0 <= i0 <= N; Stmt_bb2[0] : N < 0 };39; CHECK-NEXT: Schedule :=40; CHECK-NEXT: [N] -> { Stmt_bb2[i0] -> [i0, 0] : i0 <= N; Stmt_bb2[0] -> [0, 0] : N < 0 };41; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]42; CHECK-NEXT: [N] -> { Stmt_bb2[i0] -> MemRef_j_0__phi[] };43; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]44; CHECK-NEXT: [N] -> { Stmt_bb2[i0] -> MemRef_j_0[] };45; CHECK-NEXT: Stmt_bb4__TO__bb1846; CHECK-NEXT: Domain :=47; CHECK-NEXT: [N] -> { Stmt_bb4__TO__bb18[i0] : 0 <= i0 < N };48; CHECK-NEXT: Schedule :=49; CHECK-NEXT: [N] -> { Stmt_bb4__TO__bb18[i0] -> [i0, 1] };50; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]51; CHECK-NEXT: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_A[i0] };52; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]53; CHECK-NEXT: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_A[i0] };54; CHECK-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0]55; CHECK-NEXT: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_A[i0] };56; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]57; CHECK-NEXT: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_j_2__phi[] };58; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]59; CHECK-NEXT: [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_j_0[] };60; CHECK-NEXT: Stmt_bb1861; CHECK-NEXT: Domain :=62; CHECK-NEXT: [N] -> { Stmt_bb18[i0] : 0 <= i0 < N };63; CHECK-NEXT: Schedule :=64; CHECK-NEXT: [N] -> { Stmt_bb18[i0] -> [i0, 2] };65; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]66; CHECK-NEXT: [N] -> { Stmt_bb18[i0] -> MemRef_j_2[] };67; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]68; CHECK-NEXT: [N] -> { Stmt_bb18[i0] -> MemRef_j_2__phi[] };69; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]70; CHECK-NEXT: [N] -> { Stmt_bb18[i0] -> MemRef_A[o0] };71; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]72; CHECK-NEXT: [N] -> { Stmt_bb18[i0] -> MemRef_A[i0] };73; CHECK-NEXT: Stmt_bb2374; CHECK-NEXT: Domain :=75; CHECK-NEXT: [N] -> { Stmt_bb23[i0] : 0 <= i0 < N };76; CHECK-NEXT: Schedule :=77; CHECK-NEXT: [N] -> { Stmt_bb23[i0] -> [i0, 3] };78; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]79; CHECK-NEXT: [N] -> { Stmt_bb23[i0] -> MemRef_j_2[] };80; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]81; CHECK-NEXT: [N] -> { Stmt_bb23[i0] -> MemRef_j_0__phi[] };82; CHECK-NEXT: }83;84; Due to the scalar accesses we are not able to distribute the outer loop, thus we do not consider the region profitable.85;86; PROFIT-NOT: Statements87;88; void f(int *A, int N, int M) {89; int i = 0, j = 0;90; for (i = 0; i < N; i++) {91; if (A[i])92; for (j = 0; j < M; j++)93; A[i]++;94; A[i] = A[j];95; }96; }97;98target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"99 100define void @f(ptr %A, i32 %N, i32 %M) {101bb:102 %tmp = icmp sgt i32 %M, 0103 %smax = select i1 %tmp, i32 %M, i32 0104 %tmp1 = sext i32 %N to i64105 br label %bb2106 107bb2: ; preds = %bb23, %bb108 %indvars.iv = phi i64 [ %indvars.iv.next, %bb23 ], [ 0, %bb ]109 %j.0 = phi i32 [ 0, %bb ], [ %j.2, %bb23 ]110 %tmp3 = icmp slt i64 %indvars.iv, %tmp1111 br i1 %tmp3, label %bb4, label %bb24112 113bb4: ; preds = %bb2114 %tmp5 = getelementptr inbounds i32, ptr %A, i64 %indvars.iv115 %tmp6 = load i32, ptr %tmp5, align 4116 %tmp7 = icmp eq i32 %tmp6, 0117 br i1 %tmp7, label %bb18, label %bb8118 119bb8: ; preds = %bb4120 br label %bb9121 122bb9: ; preds = %bb15, %bb8123 %j.1 = phi i32 [ 0, %bb8 ], [ %tmp16, %bb15 ]124 %tmp10 = icmp slt i32 %j.1, %M125 br i1 %tmp10, label %bb11, label %bb17126 127bb11: ; preds = %bb9128 %tmp12 = getelementptr inbounds i32, ptr %A, i64 %indvars.iv129 %tmp13 = load i32, ptr %tmp12, align 4130 %tmp14 = add nsw i32 %tmp13, 1131 store i32 %tmp14, ptr %tmp12, align 4132 br label %bb15133 134bb15: ; preds = %bb11135 %tmp16 = add nuw nsw i32 %j.1, 1136 br label %bb9137 138bb17: ; preds = %bb9139 br label %bb18140 141bb18: ; preds = %bb4, %bb17142 %j.2 = phi i32 [ %smax, %bb17 ], [ %j.0, %bb4 ]143 %tmp19 = sext i32 %j.2 to i64144 %tmp20 = getelementptr inbounds i32, ptr %A, i64 %tmp19145 %tmp21 = load i32, ptr %tmp20, align 4146 %tmp22 = getelementptr inbounds i32, ptr %A, i64 %indvars.iv147 store i32 %tmp21, ptr %tmp22, align 4148 br label %bb23149 150bb23: ; preds = %bb18151 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1152 br label %bb2153 154bb24: ; preds = %bb2155 ret void156}157