151 lines · plain
1; RUN: opt %loadNPMPolly '-passes=polly-custom<scops>' -polly-print-scops -disable-output < %s 2>&1 | FileCheck %s2; RUN: opt %loadNPMPolly '-passes=polly-custom<ast>' -polly-print-ast -disable-output < %s 2>&1 | FileCheck %s --check-prefix=AST3;4; void f(int *A, int N) {5; for (int i = 0; i < N; i++)6; switch (i % 4) {7; case 0:8; A[i] += 1;9; break;10; case 1:11; A[i] += 2;12; break;13; case 2:14; A[i] += 3;15; break;16; case 3:17; A[i] += 4;18; break;19; default:20; A[i - 1] += A[i + 1];21; }22; }23 24; CHECK: Statements {25; CHECK-NEXT: Stmt_sw_bb26; CHECK-NEXT: Domain :=27; CHECK-NEXT: [N] -> { Stmt_sw_bb[i0] : (i0) mod 4 = 0 and 0 <= i0 < N };28; CHECK-NEXT: Schedule :=29; CHECK-NEXT: [N] -> { Stmt_sw_bb[i0] -> [i0, 3] };30; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]31; CHECK-NEXT: [N] -> { Stmt_sw_bb[i0] -> MemRef_A[i0] };32; CHECK-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0]33; CHECK-NEXT: [N] -> { Stmt_sw_bb[i0] -> MemRef_A[i0] };34; CHECK-NEXT: Stmt_sw_bb_135; CHECK-NEXT: Domain :=36; CHECK-NEXT: [N] -> { Stmt_sw_bb_1[i0] : (-1 + i0) mod 4 = 0 and 0 < i0 < N };37; CHECK-NEXT: Schedule :=38; CHECK-NEXT: [N] -> { Stmt_sw_bb_1[i0] -> [i0, 2] };39; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]40; CHECK-NEXT: [N] -> { Stmt_sw_bb_1[i0] -> MemRef_A[i0] };41; CHECK-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0]42; CHECK-NEXT: [N] -> { Stmt_sw_bb_1[i0] -> MemRef_A[i0] };43; CHECK-NEXT: Stmt_sw_bb_544; CHECK-NEXT: Domain :=45; CHECK-NEXT: [N] -> { Stmt_sw_bb_5[i0] : (2 + i0) mod 4 = 0 and 2 <= i0 < N };46; CHECK-NEXT: Schedule :=47; CHECK-NEXT: [N] -> { Stmt_sw_bb_5[i0] -> [i0, 1] };48; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]49; CHECK-NEXT: [N] -> { Stmt_sw_bb_5[i0] -> MemRef_A[i0] };50; CHECK-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0]51; CHECK-NEXT: [N] -> { Stmt_sw_bb_5[i0] -> MemRef_A[i0] };52; CHECK-NEXT: Stmt_sw_bb_953; CHECK-NEXT: Domain :=54; CHECK-NEXT: [N] -> { Stmt_sw_bb_9[i0] : (1 + i0) mod 4 = 0 and 3 <= i0 < N };55; CHECK-NEXT: Schedule :=56; CHECK-NEXT: [N] -> { Stmt_sw_bb_9[i0] -> [i0, 0] };57; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0]58; CHECK-NEXT: [N] -> { Stmt_sw_bb_9[i0] -> MemRef_A[i0] };59; CHECK-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0]60; CHECK-NEXT: [N] -> { Stmt_sw_bb_9[i0] -> MemRef_A[i0] };61; CHECK-NEXT: }62 63; AST: if (1)64;65; AST: for (int c0 = 0; c0 < N; c0 += 4) {66; AST-NEXT: Stmt_sw_bb(c0);67; AST-NEXT: if (N >= c0 + 2) {68; AST-NEXT: Stmt_sw_bb_1(c0 + 1);69; AST-NEXT: if (N >= c0 + 3) {70; AST-NEXT: Stmt_sw_bb_5(c0 + 2);71; AST-NEXT: if (N >= c0 + 4)72; AST-NEXT: Stmt_sw_bb_9(c0 + 3);73; AST-NEXT: }74; AST-NEXT: }75; AST-NEXT: }76;77; AST: else78; AST-NEXT: { /* original code */ }79 80target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"81 82define void @f(ptr %A, i32 %N) {83entry:84 %tmp = sext i32 %N to i6485 br label %for.cond86 87for.cond: ; preds = %for.inc, %entry88 %indvars.iv = phi i64 [ %indvars.iv.next, %for.inc ], [ 0, %entry ]89 %cmp = icmp slt i64 %indvars.iv, %tmp90 br i1 %cmp, label %for.body, label %for.end91 92for.body: ; preds = %for.cond93 %tmp3 = trunc i64 %indvars.iv to i3294 %rem = srem i32 %tmp3, 495 switch i32 %rem, label %sw.default [96 i32 0, label %sw.bb97 i32 1, label %sw.bb.198 i32 2, label %sw.bb.599 i32 3, label %sw.bb.9100 ]101 102sw.bb: ; preds = %for.body103 %arrayidx = getelementptr inbounds i32, ptr %A, i64 %indvars.iv104 %tmp4 = load i32, ptr %arrayidx, align 4105 %add = add nsw i32 %tmp4, 1106 store i32 %add, ptr %arrayidx, align 4107 br label %sw.epilog108 109sw.bb.1: ; preds = %for.body110 %arrayidx3 = getelementptr inbounds i32, ptr %A, i64 %indvars.iv111 %tmp5 = load i32, ptr %arrayidx3, align 4112 %add4 = add nsw i32 %tmp5, 2113 store i32 %add4, ptr %arrayidx3, align 4114 br label %sw.epilog115 116sw.bb.5: ; preds = %for.body117 %arrayidx7 = getelementptr inbounds i32, ptr %A, i64 %indvars.iv118 %tmp6 = load i32, ptr %arrayidx7, align 4119 %add8 = add nsw i32 %tmp6, 3120 store i32 %add8, ptr %arrayidx7, align 4121 br label %sw.epilog122 123sw.bb.9: ; preds = %for.body124 %arrayidx11 = getelementptr inbounds i32, ptr %A, i64 %indvars.iv125 %tmp7 = load i32, ptr %arrayidx11, align 4126 %add12 = add nsw i32 %tmp7, 4127 store i32 %add12, ptr %arrayidx11, align 4128 br label %sw.epilog129 130sw.default: ; preds = %for.body131 %tmp8 = add nuw nsw i64 %indvars.iv, 1132 %arrayidx15 = getelementptr inbounds i32, ptr %A, i64 %tmp8133 %tmp9 = load i32, ptr %arrayidx15, align 4134 %tmp10 = add nsw i64 %indvars.iv, -1135 %arrayidx17 = getelementptr inbounds i32, ptr %A, i64 %tmp10136 %tmp11 = load i32, ptr %arrayidx17, align 4137 %add18 = add nsw i32 %tmp11, %tmp9138 store i32 %add18, ptr %arrayidx17, align 4139 br label %sw.epilog140 141sw.epilog: ; preds = %sw.default, %sw.bb.9, %sw.bb.5, %sw.bb.1, %sw.bb142 br label %for.inc143 144for.inc: ; preds = %sw.epilog145 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1146 br label %for.cond147 148for.end: ; preds = %for.cond149 ret void150}151