835 lines · c
1/* SPDX-License-Identifier: GPL-2.02 *3 * Copyright 2016-2018 HabanaLabs, Ltd.4 * All Rights Reserved.5 *6 */7 8/************************************9 ** This is an auto-generated file **10 ** DO NOT EDIT BELOW **11 ************************************/12 13#ifndef ASIC_REG_NIC1_QM0_REGS_H_14#define ASIC_REG_NIC1_QM0_REGS_H_15 16/*17 *****************************************18 * NIC1_QM0 (Prototype: QMAN)19 *****************************************20 */21 22#define mmNIC1_QM0_GLBL_CFG0 0xD2000023 24#define mmNIC1_QM0_GLBL_CFG1 0xD2000425 26#define mmNIC1_QM0_GLBL_PROT 0xD2000827 28#define mmNIC1_QM0_GLBL_ERR_CFG 0xD2000C29 30#define mmNIC1_QM0_GLBL_SECURE_PROPS_0 0xD2001031 32#define mmNIC1_QM0_GLBL_SECURE_PROPS_1 0xD2001433 34#define mmNIC1_QM0_GLBL_SECURE_PROPS_2 0xD2001835 36#define mmNIC1_QM0_GLBL_SECURE_PROPS_3 0xD2001C37 38#define mmNIC1_QM0_GLBL_SECURE_PROPS_4 0xD2002039 40#define mmNIC1_QM0_GLBL_NON_SECURE_PROPS_0 0xD2002441 42#define mmNIC1_QM0_GLBL_NON_SECURE_PROPS_1 0xD2002843 44#define mmNIC1_QM0_GLBL_NON_SECURE_PROPS_2 0xD2002C45 46#define mmNIC1_QM0_GLBL_NON_SECURE_PROPS_3 0xD2003047 48#define mmNIC1_QM0_GLBL_NON_SECURE_PROPS_4 0xD2003449 50#define mmNIC1_QM0_GLBL_STS0 0xD2003851 52#define mmNIC1_QM0_GLBL_STS1_0 0xD2004053 54#define mmNIC1_QM0_GLBL_STS1_1 0xD2004455 56#define mmNIC1_QM0_GLBL_STS1_2 0xD2004857 58#define mmNIC1_QM0_GLBL_STS1_3 0xD2004C59 60#define mmNIC1_QM0_GLBL_STS1_4 0xD2005061 62#define mmNIC1_QM0_GLBL_MSG_EN_0 0xD2005463 64#define mmNIC1_QM0_GLBL_MSG_EN_1 0xD2005865 66#define mmNIC1_QM0_GLBL_MSG_EN_2 0xD2005C67 68#define mmNIC1_QM0_GLBL_MSG_EN_3 0xD2006069 70#define mmNIC1_QM0_GLBL_MSG_EN_4 0xD2006871 72#define mmNIC1_QM0_PQ_BASE_LO_0 0xD2007073 74#define mmNIC1_QM0_PQ_BASE_LO_1 0xD2007475 76#define mmNIC1_QM0_PQ_BASE_LO_2 0xD2007877 78#define mmNIC1_QM0_PQ_BASE_LO_3 0xD2007C79 80#define mmNIC1_QM0_PQ_BASE_HI_0 0xD2008081 82#define mmNIC1_QM0_PQ_BASE_HI_1 0xD2008483 84#define mmNIC1_QM0_PQ_BASE_HI_2 0xD2008885 86#define mmNIC1_QM0_PQ_BASE_HI_3 0xD2008C87 88#define mmNIC1_QM0_PQ_SIZE_0 0xD2009089 90#define mmNIC1_QM0_PQ_SIZE_1 0xD2009491 92#define mmNIC1_QM0_PQ_SIZE_2 0xD2009893 94#define mmNIC1_QM0_PQ_SIZE_3 0xD2009C95 96#define mmNIC1_QM0_PQ_PI_0 0xD200A097 98#define mmNIC1_QM0_PQ_PI_1 0xD200A499 100#define mmNIC1_QM0_PQ_PI_2 0xD200A8101 102#define mmNIC1_QM0_PQ_PI_3 0xD200AC103 104#define mmNIC1_QM0_PQ_CI_0 0xD200B0105 106#define mmNIC1_QM0_PQ_CI_1 0xD200B4107 108#define mmNIC1_QM0_PQ_CI_2 0xD200B8109 110#define mmNIC1_QM0_PQ_CI_3 0xD200BC111 112#define mmNIC1_QM0_PQ_CFG0_0 0xD200C0113 114#define mmNIC1_QM0_PQ_CFG0_1 0xD200C4115 116#define mmNIC1_QM0_PQ_CFG0_2 0xD200C8117 118#define mmNIC1_QM0_PQ_CFG0_3 0xD200CC119 120#define mmNIC1_QM0_PQ_CFG1_0 0xD200D0121 122#define mmNIC1_QM0_PQ_CFG1_1 0xD200D4123 124#define mmNIC1_QM0_PQ_CFG1_2 0xD200D8125 126#define mmNIC1_QM0_PQ_CFG1_3 0xD200DC127 128#define mmNIC1_QM0_PQ_ARUSER_31_11_0 0xD200E0129 130#define mmNIC1_QM0_PQ_ARUSER_31_11_1 0xD200E4131 132#define mmNIC1_QM0_PQ_ARUSER_31_11_2 0xD200E8133 134#define mmNIC1_QM0_PQ_ARUSER_31_11_3 0xD200EC135 136#define mmNIC1_QM0_PQ_STS0_0 0xD200F0137 138#define mmNIC1_QM0_PQ_STS0_1 0xD200F4139 140#define mmNIC1_QM0_PQ_STS0_2 0xD200F8141 142#define mmNIC1_QM0_PQ_STS0_3 0xD200FC143 144#define mmNIC1_QM0_PQ_STS1_0 0xD20100145 146#define mmNIC1_QM0_PQ_STS1_1 0xD20104147 148#define mmNIC1_QM0_PQ_STS1_2 0xD20108149 150#define mmNIC1_QM0_PQ_STS1_3 0xD2010C151 152#define mmNIC1_QM0_CQ_CFG0_0 0xD20110153 154#define mmNIC1_QM0_CQ_CFG0_1 0xD20114155 156#define mmNIC1_QM0_CQ_CFG0_2 0xD20118157 158#define mmNIC1_QM0_CQ_CFG0_3 0xD2011C159 160#define mmNIC1_QM0_CQ_CFG0_4 0xD20120161 162#define mmNIC1_QM0_CQ_CFG1_0 0xD20124163 164#define mmNIC1_QM0_CQ_CFG1_1 0xD20128165 166#define mmNIC1_QM0_CQ_CFG1_2 0xD2012C167 168#define mmNIC1_QM0_CQ_CFG1_3 0xD20130169 170#define mmNIC1_QM0_CQ_CFG1_4 0xD20134171 172#define mmNIC1_QM0_CQ_ARUSER_31_11_0 0xD20138173 174#define mmNIC1_QM0_CQ_ARUSER_31_11_1 0xD2013C175 176#define mmNIC1_QM0_CQ_ARUSER_31_11_2 0xD20140177 178#define mmNIC1_QM0_CQ_ARUSER_31_11_3 0xD20144179 180#define mmNIC1_QM0_CQ_ARUSER_31_11_4 0xD20148181 182#define mmNIC1_QM0_CQ_STS0_0 0xD2014C183 184#define mmNIC1_QM0_CQ_STS0_1 0xD20150185 186#define mmNIC1_QM0_CQ_STS0_2 0xD20154187 188#define mmNIC1_QM0_CQ_STS0_3 0xD20158189 190#define mmNIC1_QM0_CQ_STS0_4 0xD2015C191 192#define mmNIC1_QM0_CQ_STS1_0 0xD20160193 194#define mmNIC1_QM0_CQ_STS1_1 0xD20164195 196#define mmNIC1_QM0_CQ_STS1_2 0xD20168197 198#define mmNIC1_QM0_CQ_STS1_3 0xD2016C199 200#define mmNIC1_QM0_CQ_STS1_4 0xD20170201 202#define mmNIC1_QM0_CQ_PTR_LO_0 0xD20174203 204#define mmNIC1_QM0_CQ_PTR_HI_0 0xD20178205 206#define mmNIC1_QM0_CQ_TSIZE_0 0xD2017C207 208#define mmNIC1_QM0_CQ_CTL_0 0xD20180209 210#define mmNIC1_QM0_CQ_PTR_LO_1 0xD20184211 212#define mmNIC1_QM0_CQ_PTR_HI_1 0xD20188213 214#define mmNIC1_QM0_CQ_TSIZE_1 0xD2018C215 216#define mmNIC1_QM0_CQ_CTL_1 0xD20190217 218#define mmNIC1_QM0_CQ_PTR_LO_2 0xD20194219 220#define mmNIC1_QM0_CQ_PTR_HI_2 0xD20198221 222#define mmNIC1_QM0_CQ_TSIZE_2 0xD2019C223 224#define mmNIC1_QM0_CQ_CTL_2 0xD201A0225 226#define mmNIC1_QM0_CQ_PTR_LO_3 0xD201A4227 228#define mmNIC1_QM0_CQ_PTR_HI_3 0xD201A8229 230#define mmNIC1_QM0_CQ_TSIZE_3 0xD201AC231 232#define mmNIC1_QM0_CQ_CTL_3 0xD201B0233 234#define mmNIC1_QM0_CQ_PTR_LO_4 0xD201B4235 236#define mmNIC1_QM0_CQ_PTR_HI_4 0xD201B8237 238#define mmNIC1_QM0_CQ_TSIZE_4 0xD201BC239 240#define mmNIC1_QM0_CQ_CTL_4 0xD201C0241 242#define mmNIC1_QM0_CQ_PTR_LO_STS_0 0xD201C4243 244#define mmNIC1_QM0_CQ_PTR_LO_STS_1 0xD201C8245 246#define mmNIC1_QM0_CQ_PTR_LO_STS_2 0xD201CC247 248#define mmNIC1_QM0_CQ_PTR_LO_STS_3 0xD201D0249 250#define mmNIC1_QM0_CQ_PTR_LO_STS_4 0xD201D4251 252#define mmNIC1_QM0_CQ_PTR_HI_STS_0 0xD201D8253 254#define mmNIC1_QM0_CQ_PTR_HI_STS_1 0xD201DC255 256#define mmNIC1_QM0_CQ_PTR_HI_STS_2 0xD201E0257 258#define mmNIC1_QM0_CQ_PTR_HI_STS_3 0xD201E4259 260#define mmNIC1_QM0_CQ_PTR_HI_STS_4 0xD201E8261 262#define mmNIC1_QM0_CQ_TSIZE_STS_0 0xD201EC263 264#define mmNIC1_QM0_CQ_TSIZE_STS_1 0xD201F0265 266#define mmNIC1_QM0_CQ_TSIZE_STS_2 0xD201F4267 268#define mmNIC1_QM0_CQ_TSIZE_STS_3 0xD201F8269 270#define mmNIC1_QM0_CQ_TSIZE_STS_4 0xD201FC271 272#define mmNIC1_QM0_CQ_CTL_STS_0 0xD20200273 274#define mmNIC1_QM0_CQ_CTL_STS_1 0xD20204275 276#define mmNIC1_QM0_CQ_CTL_STS_2 0xD20208277 278#define mmNIC1_QM0_CQ_CTL_STS_3 0xD2020C279 280#define mmNIC1_QM0_CQ_CTL_STS_4 0xD20210281 282#define mmNIC1_QM0_CQ_IFIFO_CNT_0 0xD20214283 284#define mmNIC1_QM0_CQ_IFIFO_CNT_1 0xD20218285 286#define mmNIC1_QM0_CQ_IFIFO_CNT_2 0xD2021C287 288#define mmNIC1_QM0_CQ_IFIFO_CNT_3 0xD20220289 290#define mmNIC1_QM0_CQ_IFIFO_CNT_4 0xD20224291 292#define mmNIC1_QM0_CP_MSG_BASE0_ADDR_LO_0 0xD20228293 294#define mmNIC1_QM0_CP_MSG_BASE0_ADDR_LO_1 0xD2022C295 296#define mmNIC1_QM0_CP_MSG_BASE0_ADDR_LO_2 0xD20230297 298#define mmNIC1_QM0_CP_MSG_BASE0_ADDR_LO_3 0xD20234299 300#define mmNIC1_QM0_CP_MSG_BASE0_ADDR_LO_4 0xD20238301 302#define mmNIC1_QM0_CP_MSG_BASE0_ADDR_HI_0 0xD2023C303 304#define mmNIC1_QM0_CP_MSG_BASE0_ADDR_HI_1 0xD20240305 306#define mmNIC1_QM0_CP_MSG_BASE0_ADDR_HI_2 0xD20244307 308#define mmNIC1_QM0_CP_MSG_BASE0_ADDR_HI_3 0xD20248309 310#define mmNIC1_QM0_CP_MSG_BASE0_ADDR_HI_4 0xD2024C311 312#define mmNIC1_QM0_CP_MSG_BASE1_ADDR_LO_0 0xD20250313 314#define mmNIC1_QM0_CP_MSG_BASE1_ADDR_LO_1 0xD20254315 316#define mmNIC1_QM0_CP_MSG_BASE1_ADDR_LO_2 0xD20258317 318#define mmNIC1_QM0_CP_MSG_BASE1_ADDR_LO_3 0xD2025C319 320#define mmNIC1_QM0_CP_MSG_BASE1_ADDR_LO_4 0xD20260321 322#define mmNIC1_QM0_CP_MSG_BASE1_ADDR_HI_0 0xD20264323 324#define mmNIC1_QM0_CP_MSG_BASE1_ADDR_HI_1 0xD20268325 326#define mmNIC1_QM0_CP_MSG_BASE1_ADDR_HI_2 0xD2026C327 328#define mmNIC1_QM0_CP_MSG_BASE1_ADDR_HI_3 0xD20270329 330#define mmNIC1_QM0_CP_MSG_BASE1_ADDR_HI_4 0xD20274331 332#define mmNIC1_QM0_CP_MSG_BASE2_ADDR_LO_0 0xD20278333 334#define mmNIC1_QM0_CP_MSG_BASE2_ADDR_LO_1 0xD2027C335 336#define mmNIC1_QM0_CP_MSG_BASE2_ADDR_LO_2 0xD20280337 338#define mmNIC1_QM0_CP_MSG_BASE2_ADDR_LO_3 0xD20284339 340#define mmNIC1_QM0_CP_MSG_BASE2_ADDR_LO_4 0xD20288341 342#define mmNIC1_QM0_CP_MSG_BASE2_ADDR_HI_0 0xD2028C343 344#define mmNIC1_QM0_CP_MSG_BASE2_ADDR_HI_1 0xD20290345 346#define mmNIC1_QM0_CP_MSG_BASE2_ADDR_HI_2 0xD20294347 348#define mmNIC1_QM0_CP_MSG_BASE2_ADDR_HI_3 0xD20298349 350#define mmNIC1_QM0_CP_MSG_BASE2_ADDR_HI_4 0xD2029C351 352#define mmNIC1_QM0_CP_MSG_BASE3_ADDR_LO_0 0xD202A0353 354#define mmNIC1_QM0_CP_MSG_BASE3_ADDR_LO_1 0xD202A4355 356#define mmNIC1_QM0_CP_MSG_BASE3_ADDR_LO_2 0xD202A8357 358#define mmNIC1_QM0_CP_MSG_BASE3_ADDR_LO_3 0xD202AC359 360#define mmNIC1_QM0_CP_MSG_BASE3_ADDR_LO_4 0xD202B0361 362#define mmNIC1_QM0_CP_MSG_BASE3_ADDR_HI_0 0xD202B4363 364#define mmNIC1_QM0_CP_MSG_BASE3_ADDR_HI_1 0xD202B8365 366#define mmNIC1_QM0_CP_MSG_BASE3_ADDR_HI_2 0xD202BC367 368#define mmNIC1_QM0_CP_MSG_BASE3_ADDR_HI_3 0xD202C0369 370#define mmNIC1_QM0_CP_MSG_BASE3_ADDR_HI_4 0xD202C4371 372#define mmNIC1_QM0_CP_LDMA_TSIZE_OFFSET_0 0xD202C8373 374#define mmNIC1_QM0_CP_LDMA_TSIZE_OFFSET_1 0xD202CC375 376#define mmNIC1_QM0_CP_LDMA_TSIZE_OFFSET_2 0xD202D0377 378#define mmNIC1_QM0_CP_LDMA_TSIZE_OFFSET_3 0xD202D4379 380#define mmNIC1_QM0_CP_LDMA_TSIZE_OFFSET_4 0xD202D8381 382#define mmNIC1_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_0 0xD202E0383 384#define mmNIC1_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_1 0xD202E4385 386#define mmNIC1_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_2 0xD202E8387 388#define mmNIC1_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_3 0xD202EC389 390#define mmNIC1_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_4 0xD202F0391 392#define mmNIC1_QM0_CP_LDMA_DST_BASE_LO_OFFSET_0 0xD202F4393 394#define mmNIC1_QM0_CP_LDMA_DST_BASE_LO_OFFSET_1 0xD202F8395 396#define mmNIC1_QM0_CP_LDMA_DST_BASE_LO_OFFSET_2 0xD202FC397 398#define mmNIC1_QM0_CP_LDMA_DST_BASE_LO_OFFSET_3 0xD20300399 400#define mmNIC1_QM0_CP_LDMA_DST_BASE_LO_OFFSET_4 0xD20304401 402#define mmNIC1_QM0_CP_FENCE0_RDATA_0 0xD20308403 404#define mmNIC1_QM0_CP_FENCE0_RDATA_1 0xD2030C405 406#define mmNIC1_QM0_CP_FENCE0_RDATA_2 0xD20310407 408#define mmNIC1_QM0_CP_FENCE0_RDATA_3 0xD20314409 410#define mmNIC1_QM0_CP_FENCE0_RDATA_4 0xD20318411 412#define mmNIC1_QM0_CP_FENCE1_RDATA_0 0xD2031C413 414#define mmNIC1_QM0_CP_FENCE1_RDATA_1 0xD20320415 416#define mmNIC1_QM0_CP_FENCE1_RDATA_2 0xD20324417 418#define mmNIC1_QM0_CP_FENCE1_RDATA_3 0xD20328419 420#define mmNIC1_QM0_CP_FENCE1_RDATA_4 0xD2032C421 422#define mmNIC1_QM0_CP_FENCE2_RDATA_0 0xD20330423 424#define mmNIC1_QM0_CP_FENCE2_RDATA_1 0xD20334425 426#define mmNIC1_QM0_CP_FENCE2_RDATA_2 0xD20338427 428#define mmNIC1_QM0_CP_FENCE2_RDATA_3 0xD2033C429 430#define mmNIC1_QM0_CP_FENCE2_RDATA_4 0xD20340431 432#define mmNIC1_QM0_CP_FENCE3_RDATA_0 0xD20344433 434#define mmNIC1_QM0_CP_FENCE3_RDATA_1 0xD20348435 436#define mmNIC1_QM0_CP_FENCE3_RDATA_2 0xD2034C437 438#define mmNIC1_QM0_CP_FENCE3_RDATA_3 0xD20350439 440#define mmNIC1_QM0_CP_FENCE3_RDATA_4 0xD20354441 442#define mmNIC1_QM0_CP_FENCE0_CNT_0 0xD20358443 444#define mmNIC1_QM0_CP_FENCE0_CNT_1 0xD2035C445 446#define mmNIC1_QM0_CP_FENCE0_CNT_2 0xD20360447 448#define mmNIC1_QM0_CP_FENCE0_CNT_3 0xD20364449 450#define mmNIC1_QM0_CP_FENCE0_CNT_4 0xD20368451 452#define mmNIC1_QM0_CP_FENCE1_CNT_0 0xD2036C453 454#define mmNIC1_QM0_CP_FENCE1_CNT_1 0xD20370455 456#define mmNIC1_QM0_CP_FENCE1_CNT_2 0xD20374457 458#define mmNIC1_QM0_CP_FENCE1_CNT_3 0xD20378459 460#define mmNIC1_QM0_CP_FENCE1_CNT_4 0xD2037C461 462#define mmNIC1_QM0_CP_FENCE2_CNT_0 0xD20380463 464#define mmNIC1_QM0_CP_FENCE2_CNT_1 0xD20384465 466#define mmNIC1_QM0_CP_FENCE2_CNT_2 0xD20388467 468#define mmNIC1_QM0_CP_FENCE2_CNT_3 0xD2038C469 470#define mmNIC1_QM0_CP_FENCE2_CNT_4 0xD20390471 472#define mmNIC1_QM0_CP_FENCE3_CNT_0 0xD20394473 474#define mmNIC1_QM0_CP_FENCE3_CNT_1 0xD20398475 476#define mmNIC1_QM0_CP_FENCE3_CNT_2 0xD2039C477 478#define mmNIC1_QM0_CP_FENCE3_CNT_3 0xD203A0479 480#define mmNIC1_QM0_CP_FENCE3_CNT_4 0xD203A4481 482#define mmNIC1_QM0_CP_STS_0 0xD203A8483 484#define mmNIC1_QM0_CP_STS_1 0xD203AC485 486#define mmNIC1_QM0_CP_STS_2 0xD203B0487 488#define mmNIC1_QM0_CP_STS_3 0xD203B4489 490#define mmNIC1_QM0_CP_STS_4 0xD203B8491 492#define mmNIC1_QM0_CP_CURRENT_INST_LO_0 0xD203BC493 494#define mmNIC1_QM0_CP_CURRENT_INST_LO_1 0xD203C0495 496#define mmNIC1_QM0_CP_CURRENT_INST_LO_2 0xD203C4497 498#define mmNIC1_QM0_CP_CURRENT_INST_LO_3 0xD203C8499 500#define mmNIC1_QM0_CP_CURRENT_INST_LO_4 0xD203CC501 502#define mmNIC1_QM0_CP_CURRENT_INST_HI_0 0xD203D0503 504#define mmNIC1_QM0_CP_CURRENT_INST_HI_1 0xD203D4505 506#define mmNIC1_QM0_CP_CURRENT_INST_HI_2 0xD203D8507 508#define mmNIC1_QM0_CP_CURRENT_INST_HI_3 0xD203DC509 510#define mmNIC1_QM0_CP_CURRENT_INST_HI_4 0xD203E0511 512#define mmNIC1_QM0_CP_BARRIER_CFG_0 0xD203F4513 514#define mmNIC1_QM0_CP_BARRIER_CFG_1 0xD203F8515 516#define mmNIC1_QM0_CP_BARRIER_CFG_2 0xD203FC517 518#define mmNIC1_QM0_CP_BARRIER_CFG_3 0xD20400519 520#define mmNIC1_QM0_CP_BARRIER_CFG_4 0xD20404521 522#define mmNIC1_QM0_CP_DBG_0_0 0xD20408523 524#define mmNIC1_QM0_CP_DBG_0_1 0xD2040C525 526#define mmNIC1_QM0_CP_DBG_0_2 0xD20410527 528#define mmNIC1_QM0_CP_DBG_0_3 0xD20414529 530#define mmNIC1_QM0_CP_DBG_0_4 0xD20418531 532#define mmNIC1_QM0_CP_ARUSER_31_11_0 0xD2041C533 534#define mmNIC1_QM0_CP_ARUSER_31_11_1 0xD20420535 536#define mmNIC1_QM0_CP_ARUSER_31_11_2 0xD20424537 538#define mmNIC1_QM0_CP_ARUSER_31_11_3 0xD20428539 540#define mmNIC1_QM0_CP_ARUSER_31_11_4 0xD2042C541 542#define mmNIC1_QM0_CP_AWUSER_31_11_0 0xD20430543 544#define mmNIC1_QM0_CP_AWUSER_31_11_1 0xD20434545 546#define mmNIC1_QM0_CP_AWUSER_31_11_2 0xD20438547 548#define mmNIC1_QM0_CP_AWUSER_31_11_3 0xD2043C549 550#define mmNIC1_QM0_CP_AWUSER_31_11_4 0xD20440551 552#define mmNIC1_QM0_ARB_CFG_0 0xD20A00553 554#define mmNIC1_QM0_ARB_CHOISE_Q_PUSH 0xD20A04555 556#define mmNIC1_QM0_ARB_WRR_WEIGHT_0 0xD20A08557 558#define mmNIC1_QM0_ARB_WRR_WEIGHT_1 0xD20A0C559 560#define mmNIC1_QM0_ARB_WRR_WEIGHT_2 0xD20A10561 562#define mmNIC1_QM0_ARB_WRR_WEIGHT_3 0xD20A14563 564#define mmNIC1_QM0_ARB_CFG_1 0xD20A18565 566#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_0 0xD20A20567 568#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_1 0xD20A24569 570#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_2 0xD20A28571 572#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_3 0xD20A2C573 574#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_4 0xD20A30575 576#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_5 0xD20A34577 578#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_6 0xD20A38579 580#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_7 0xD20A3C581 582#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_8 0xD20A40583 584#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_9 0xD20A44585 586#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_10 0xD20A48587 588#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_11 0xD20A4C589 590#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_12 0xD20A50591 592#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_13 0xD20A54593 594#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_14 0xD20A58595 596#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_15 0xD20A5C597 598#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_16 0xD20A60599 600#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_17 0xD20A64601 602#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_18 0xD20A68603 604#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_19 0xD20A6C605 606#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_20 0xD20A70607 608#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_21 0xD20A74609 610#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_22 0xD20A78611 612#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_23 0xD20A7C613 614#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_24 0xD20A80615 616#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_25 0xD20A84617 618#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_26 0xD20A88619 620#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_27 0xD20A8C621 622#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_28 0xD20A90623 624#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_29 0xD20A94625 626#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_30 0xD20A98627 628#define mmNIC1_QM0_ARB_MST_AVAIL_CRED_31 0xD20A9C629 630#define mmNIC1_QM0_ARB_MST_CRED_INC 0xD20AA0631 632#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_0 0xD20AA4633 634#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_1 0xD20AA8635 636#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_2 0xD20AAC637 638#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_3 0xD20AB0639 640#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_4 0xD20AB4641 642#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_5 0xD20AB8643 644#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_6 0xD20ABC645 646#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_7 0xD20AC0647 648#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_8 0xD20AC4649 650#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_9 0xD20AC8651 652#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_10 0xD20ACC653 654#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_11 0xD20AD0655 656#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_12 0xD20AD4657 658#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_13 0xD20AD8659 660#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_14 0xD20ADC661 662#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_15 0xD20AE0663 664#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_16 0xD20AE4665 666#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_17 0xD20AE8667 668#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_18 0xD20AEC669 670#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_19 0xD20AF0671 672#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_20 0xD20AF4673 674#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_21 0xD20AF8675 676#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_22 0xD20AFC677 678#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_23 0xD20B00679 680#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_24 0xD20B04681 682#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_25 0xD20B08683 684#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_26 0xD20B0C685 686#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_27 0xD20B10687 688#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_28 0xD20B14689 690#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_29 0xD20B18691 692#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_30 0xD20B1C693 694#define mmNIC1_QM0_ARB_MST_CHOISE_PUSH_OFST_31 0xD20B20695 696#define mmNIC1_QM0_ARB_SLV_MASTER_INC_CRED_OFST 0xD20B28697 698#define mmNIC1_QM0_ARB_MST_SLAVE_EN 0xD20B2C699 700#define mmNIC1_QM0_ARB_MST_QUIET_PER 0xD20B34701 702#define mmNIC1_QM0_ARB_SLV_CHOISE_WDT 0xD20B38703 704#define mmNIC1_QM0_ARB_SLV_ID 0xD20B3C705 706#define mmNIC1_QM0_ARB_MSG_MAX_INFLIGHT 0xD20B44707 708#define mmNIC1_QM0_ARB_MSG_AWUSER_31_11 0xD20B48709 710#define mmNIC1_QM0_ARB_MSG_AWUSER_SEC_PROP 0xD20B4C711 712#define mmNIC1_QM0_ARB_MSG_AWUSER_NON_SEC_PROP 0xD20B50713 714#define mmNIC1_QM0_ARB_BASE_LO 0xD20B54715 716#define mmNIC1_QM0_ARB_BASE_HI 0xD20B58717 718#define mmNIC1_QM0_ARB_STATE_STS 0xD20B80719 720#define mmNIC1_QM0_ARB_CHOISE_FULLNESS_STS 0xD20B84721 722#define mmNIC1_QM0_ARB_MSG_STS 0xD20B88723 724#define mmNIC1_QM0_ARB_SLV_CHOISE_Q_HEAD 0xD20B8C725 726#define mmNIC1_QM0_ARB_ERR_CAUSE 0xD20B9C727 728#define mmNIC1_QM0_ARB_ERR_MSG_EN 0xD20BA0729 730#define mmNIC1_QM0_ARB_ERR_STS_DRP 0xD20BA8731 732#define mmNIC1_QM0_ARB_MST_CRED_STS_0 0xD20BB0733 734#define mmNIC1_QM0_ARB_MST_CRED_STS_1 0xD20BB4735 736#define mmNIC1_QM0_ARB_MST_CRED_STS_2 0xD20BB8737 738#define mmNIC1_QM0_ARB_MST_CRED_STS_3 0xD20BBC739 740#define mmNIC1_QM0_ARB_MST_CRED_STS_4 0xD20BC0741 742#define mmNIC1_QM0_ARB_MST_CRED_STS_5 0xD20BC4743 744#define mmNIC1_QM0_ARB_MST_CRED_STS_6 0xD20BC8745 746#define mmNIC1_QM0_ARB_MST_CRED_STS_7 0xD20BCC747 748#define mmNIC1_QM0_ARB_MST_CRED_STS_8 0xD20BD0749 750#define mmNIC1_QM0_ARB_MST_CRED_STS_9 0xD20BD4751 752#define mmNIC1_QM0_ARB_MST_CRED_STS_10 0xD20BD8753 754#define mmNIC1_QM0_ARB_MST_CRED_STS_11 0xD20BDC755 756#define mmNIC1_QM0_ARB_MST_CRED_STS_12 0xD20BE0757 758#define mmNIC1_QM0_ARB_MST_CRED_STS_13 0xD20BE4759 760#define mmNIC1_QM0_ARB_MST_CRED_STS_14 0xD20BE8761 762#define mmNIC1_QM0_ARB_MST_CRED_STS_15 0xD20BEC763 764#define mmNIC1_QM0_ARB_MST_CRED_STS_16 0xD20BF0765 766#define mmNIC1_QM0_ARB_MST_CRED_STS_17 0xD20BF4767 768#define mmNIC1_QM0_ARB_MST_CRED_STS_18 0xD20BF8769 770#define mmNIC1_QM0_ARB_MST_CRED_STS_19 0xD20BFC771 772#define mmNIC1_QM0_ARB_MST_CRED_STS_20 0xD20C00773 774#define mmNIC1_QM0_ARB_MST_CRED_STS_21 0xD20C04775 776#define mmNIC1_QM0_ARB_MST_CRED_STS_22 0xD20C08777 778#define mmNIC1_QM0_ARB_MST_CRED_STS_23 0xD20C0C779 780#define mmNIC1_QM0_ARB_MST_CRED_STS_24 0xD20C10781 782#define mmNIC1_QM0_ARB_MST_CRED_STS_25 0xD20C14783 784#define mmNIC1_QM0_ARB_MST_CRED_STS_26 0xD20C18785 786#define mmNIC1_QM0_ARB_MST_CRED_STS_27 0xD20C1C787 788#define mmNIC1_QM0_ARB_MST_CRED_STS_28 0xD20C20789 790#define mmNIC1_QM0_ARB_MST_CRED_STS_29 0xD20C24791 792#define mmNIC1_QM0_ARB_MST_CRED_STS_30 0xD20C28793 794#define mmNIC1_QM0_ARB_MST_CRED_STS_31 0xD20C2C795 796#define mmNIC1_QM0_CGM_CFG 0xD20C70797 798#define mmNIC1_QM0_CGM_STS 0xD20C74799 800#define mmNIC1_QM0_CGM_CFG1 0xD20C78801 802#define mmNIC1_QM0_LOCAL_RANGE_BASE 0xD20C80803 804#define mmNIC1_QM0_LOCAL_RANGE_SIZE 0xD20C84805 806#define mmNIC1_QM0_CSMR_STRICT_PRIO_CFG 0xD20C90807 808#define mmNIC1_QM0_HBW_RD_RATE_LIM_CFG_1 0xD20C94809 810#define mmNIC1_QM0_LBW_WR_RATE_LIM_CFG_0 0xD20C98811 812#define mmNIC1_QM0_LBW_WR_RATE_LIM_CFG_1 0xD20C9C813 814#define mmNIC1_QM0_HBW_RD_RATE_LIM_CFG_0 0xD20CA0815 816#define mmNIC1_QM0_GLBL_AXCACHE 0xD20CA4817 818#define mmNIC1_QM0_IND_GW_APB_CFG 0xD20CB0819 820#define mmNIC1_QM0_IND_GW_APB_WDATA 0xD20CB4821 822#define mmNIC1_QM0_IND_GW_APB_RDATA 0xD20CB8823 824#define mmNIC1_QM0_IND_GW_APB_STATUS 0xD20CBC825 826#define mmNIC1_QM0_GLBL_ERR_ADDR_LO 0xD20CD0827 828#define mmNIC1_QM0_GLBL_ERR_ADDR_HI 0xD20CD4829 830#define mmNIC1_QM0_GLBL_ERR_WDATA 0xD20CD8831 832#define mmNIC1_QM0_GLBL_MEM_INIT_BUSY 0xD20D00833 834#endif /* ASIC_REG_NIC1_QM0_REGS_H_ */835