.. cpu_if_regs.h dma_if_e_n_down_ch0_regs.h dma_if_e_n_down_ch1_regs.h dma_if_e_n_regs.h dma_if_e_s_down_ch0_regs.h dma_if_e_s_down_ch1_regs.h dma_if_e_s_regs.h dma_if_w_n_down_ch0_regs.h dma_if_w_n_down_ch1_regs.h dma_if_w_n_regs.h dma_if_w_s_down_ch0_regs.h dma_if_w_s_down_ch1_regs.h dma_if_w_s_regs.h dma0_core_masks.h dma0_core_regs.h dma0_qm_masks.h dma0_qm_regs.h dma1_core_regs.h dma1_qm_regs.h dma2_core_regs.h dma2_qm_regs.h dma3_core_regs.h dma3_qm_regs.h dma4_core_regs.h dma4_qm_regs.h dma5_core_regs.h dma5_qm_regs.h dma6_core_regs.h dma6_qm_regs.h dma7_core_regs.h dma7_qm_regs.h gaudi_blocks.h gaudi_regs.h mme0_ctrl_regs.h mme0_qm_masks.h mme0_qm_regs.h mme1_ctrl_regs.h mme2_ctrl_regs.h mme2_qm_regs.h mme3_ctrl_regs.h mmu_up_regs.h nic0_qm0_masks.h nic0_qm0_regs.h nic0_qm1_regs.h nic1_qm0_regs.h nic1_qm1_regs.h nic2_qm0_regs.h nic2_qm1_regs.h nic3_qm0_regs.h nic3_qm1_regs.h nic4_qm0_regs.h nic4_qm1_regs.h nif_rtr_ctrl_0_regs.h nif_rtr_ctrl_1_regs.h nif_rtr_ctrl_2_regs.h nif_rtr_ctrl_3_regs.h nif_rtr_ctrl_4_regs.h nif_rtr_ctrl_5_regs.h nif_rtr_ctrl_6_regs.h nif_rtr_ctrl_7_regs.h psoc_cpu_pll_regs.h psoc_etr_regs.h psoc_global_conf_masks.h psoc_global_conf_regs.h psoc_timestamp_regs.h sif_rtr_ctrl_0_regs.h sif_rtr_ctrl_1_regs.h sif_rtr_ctrl_2_regs.h sif_rtr_ctrl_3_regs.h sif_rtr_ctrl_4_regs.h sif_rtr_ctrl_5_regs.h sif_rtr_ctrl_6_regs.h sif_rtr_ctrl_7_regs.h stlb_regs.h tpc0_cfg_masks.h tpc0_cfg_regs.h tpc0_qm_masks.h tpc0_qm_regs.h tpc1_cfg_regs.h tpc1_qm_regs.h tpc2_cfg_regs.h tpc2_qm_regs.h tpc3_cfg_regs.h tpc3_qm_regs.h tpc4_cfg_regs.h tpc4_qm_regs.h tpc5_cfg_regs.h tpc5_qm_regs.h tpc6_cfg_regs.h tpc6_qm_regs.h tpc7_cfg_regs.h tpc7_qm_regs.h