835 lines · c
1/* SPDX-License-Identifier: GPL-2.02 *3 * Copyright 2016-2018 HabanaLabs, Ltd.4 * All Rights Reserved.5 *6 */7 8/************************************9 ** This is an auto-generated file **10 ** DO NOT EDIT BELOW **11 ************************************/12 13#ifndef ASIC_REG_NIC1_QM1_REGS_H_14#define ASIC_REG_NIC1_QM1_REGS_H_15 16/*17 *****************************************18 * NIC1_QM1 (Prototype: QMAN)19 *****************************************20 */21 22#define mmNIC1_QM1_GLBL_CFG0 0xD2200023 24#define mmNIC1_QM1_GLBL_CFG1 0xD2200425 26#define mmNIC1_QM1_GLBL_PROT 0xD2200827 28#define mmNIC1_QM1_GLBL_ERR_CFG 0xD2200C29 30#define mmNIC1_QM1_GLBL_SECURE_PROPS_0 0xD2201031 32#define mmNIC1_QM1_GLBL_SECURE_PROPS_1 0xD2201433 34#define mmNIC1_QM1_GLBL_SECURE_PROPS_2 0xD2201835 36#define mmNIC1_QM1_GLBL_SECURE_PROPS_3 0xD2201C37 38#define mmNIC1_QM1_GLBL_SECURE_PROPS_4 0xD2202039 40#define mmNIC1_QM1_GLBL_NON_SECURE_PROPS_0 0xD2202441 42#define mmNIC1_QM1_GLBL_NON_SECURE_PROPS_1 0xD2202843 44#define mmNIC1_QM1_GLBL_NON_SECURE_PROPS_2 0xD2202C45 46#define mmNIC1_QM1_GLBL_NON_SECURE_PROPS_3 0xD2203047 48#define mmNIC1_QM1_GLBL_NON_SECURE_PROPS_4 0xD2203449 50#define mmNIC1_QM1_GLBL_STS0 0xD2203851 52#define mmNIC1_QM1_GLBL_STS1_0 0xD2204053 54#define mmNIC1_QM1_GLBL_STS1_1 0xD2204455 56#define mmNIC1_QM1_GLBL_STS1_2 0xD2204857 58#define mmNIC1_QM1_GLBL_STS1_3 0xD2204C59 60#define mmNIC1_QM1_GLBL_STS1_4 0xD2205061 62#define mmNIC1_QM1_GLBL_MSG_EN_0 0xD2205463 64#define mmNIC1_QM1_GLBL_MSG_EN_1 0xD2205865 66#define mmNIC1_QM1_GLBL_MSG_EN_2 0xD2205C67 68#define mmNIC1_QM1_GLBL_MSG_EN_3 0xD2206069 70#define mmNIC1_QM1_GLBL_MSG_EN_4 0xD2206871 72#define mmNIC1_QM1_PQ_BASE_LO_0 0xD2207073 74#define mmNIC1_QM1_PQ_BASE_LO_1 0xD2207475 76#define mmNIC1_QM1_PQ_BASE_LO_2 0xD2207877 78#define mmNIC1_QM1_PQ_BASE_LO_3 0xD2207C79 80#define mmNIC1_QM1_PQ_BASE_HI_0 0xD2208081 82#define mmNIC1_QM1_PQ_BASE_HI_1 0xD2208483 84#define mmNIC1_QM1_PQ_BASE_HI_2 0xD2208885 86#define mmNIC1_QM1_PQ_BASE_HI_3 0xD2208C87 88#define mmNIC1_QM1_PQ_SIZE_0 0xD2209089 90#define mmNIC1_QM1_PQ_SIZE_1 0xD2209491 92#define mmNIC1_QM1_PQ_SIZE_2 0xD2209893 94#define mmNIC1_QM1_PQ_SIZE_3 0xD2209C95 96#define mmNIC1_QM1_PQ_PI_0 0xD220A097 98#define mmNIC1_QM1_PQ_PI_1 0xD220A499 100#define mmNIC1_QM1_PQ_PI_2 0xD220A8101 102#define mmNIC1_QM1_PQ_PI_3 0xD220AC103 104#define mmNIC1_QM1_PQ_CI_0 0xD220B0105 106#define mmNIC1_QM1_PQ_CI_1 0xD220B4107 108#define mmNIC1_QM1_PQ_CI_2 0xD220B8109 110#define mmNIC1_QM1_PQ_CI_3 0xD220BC111 112#define mmNIC1_QM1_PQ_CFG0_0 0xD220C0113 114#define mmNIC1_QM1_PQ_CFG0_1 0xD220C4115 116#define mmNIC1_QM1_PQ_CFG0_2 0xD220C8117 118#define mmNIC1_QM1_PQ_CFG0_3 0xD220CC119 120#define mmNIC1_QM1_PQ_CFG1_0 0xD220D0121 122#define mmNIC1_QM1_PQ_CFG1_1 0xD220D4123 124#define mmNIC1_QM1_PQ_CFG1_2 0xD220D8125 126#define mmNIC1_QM1_PQ_CFG1_3 0xD220DC127 128#define mmNIC1_QM1_PQ_ARUSER_31_11_0 0xD220E0129 130#define mmNIC1_QM1_PQ_ARUSER_31_11_1 0xD220E4131 132#define mmNIC1_QM1_PQ_ARUSER_31_11_2 0xD220E8133 134#define mmNIC1_QM1_PQ_ARUSER_31_11_3 0xD220EC135 136#define mmNIC1_QM1_PQ_STS0_0 0xD220F0137 138#define mmNIC1_QM1_PQ_STS0_1 0xD220F4139 140#define mmNIC1_QM1_PQ_STS0_2 0xD220F8141 142#define mmNIC1_QM1_PQ_STS0_3 0xD220FC143 144#define mmNIC1_QM1_PQ_STS1_0 0xD22100145 146#define mmNIC1_QM1_PQ_STS1_1 0xD22104147 148#define mmNIC1_QM1_PQ_STS1_2 0xD22108149 150#define mmNIC1_QM1_PQ_STS1_3 0xD2210C151 152#define mmNIC1_QM1_CQ_CFG0_0 0xD22110153 154#define mmNIC1_QM1_CQ_CFG0_1 0xD22114155 156#define mmNIC1_QM1_CQ_CFG0_2 0xD22118157 158#define mmNIC1_QM1_CQ_CFG0_3 0xD2211C159 160#define mmNIC1_QM1_CQ_CFG0_4 0xD22120161 162#define mmNIC1_QM1_CQ_CFG1_0 0xD22124163 164#define mmNIC1_QM1_CQ_CFG1_1 0xD22128165 166#define mmNIC1_QM1_CQ_CFG1_2 0xD2212C167 168#define mmNIC1_QM1_CQ_CFG1_3 0xD22130169 170#define mmNIC1_QM1_CQ_CFG1_4 0xD22134171 172#define mmNIC1_QM1_CQ_ARUSER_31_11_0 0xD22138173 174#define mmNIC1_QM1_CQ_ARUSER_31_11_1 0xD2213C175 176#define mmNIC1_QM1_CQ_ARUSER_31_11_2 0xD22140177 178#define mmNIC1_QM1_CQ_ARUSER_31_11_3 0xD22144179 180#define mmNIC1_QM1_CQ_ARUSER_31_11_4 0xD22148181 182#define mmNIC1_QM1_CQ_STS0_0 0xD2214C183 184#define mmNIC1_QM1_CQ_STS0_1 0xD22150185 186#define mmNIC1_QM1_CQ_STS0_2 0xD22154187 188#define mmNIC1_QM1_CQ_STS0_3 0xD22158189 190#define mmNIC1_QM1_CQ_STS0_4 0xD2215C191 192#define mmNIC1_QM1_CQ_STS1_0 0xD22160193 194#define mmNIC1_QM1_CQ_STS1_1 0xD22164195 196#define mmNIC1_QM1_CQ_STS1_2 0xD22168197 198#define mmNIC1_QM1_CQ_STS1_3 0xD2216C199 200#define mmNIC1_QM1_CQ_STS1_4 0xD22170201 202#define mmNIC1_QM1_CQ_PTR_LO_0 0xD22174203 204#define mmNIC1_QM1_CQ_PTR_HI_0 0xD22178205 206#define mmNIC1_QM1_CQ_TSIZE_0 0xD2217C207 208#define mmNIC1_QM1_CQ_CTL_0 0xD22180209 210#define mmNIC1_QM1_CQ_PTR_LO_1 0xD22184211 212#define mmNIC1_QM1_CQ_PTR_HI_1 0xD22188213 214#define mmNIC1_QM1_CQ_TSIZE_1 0xD2218C215 216#define mmNIC1_QM1_CQ_CTL_1 0xD22190217 218#define mmNIC1_QM1_CQ_PTR_LO_2 0xD22194219 220#define mmNIC1_QM1_CQ_PTR_HI_2 0xD22198221 222#define mmNIC1_QM1_CQ_TSIZE_2 0xD2219C223 224#define mmNIC1_QM1_CQ_CTL_2 0xD221A0225 226#define mmNIC1_QM1_CQ_PTR_LO_3 0xD221A4227 228#define mmNIC1_QM1_CQ_PTR_HI_3 0xD221A8229 230#define mmNIC1_QM1_CQ_TSIZE_3 0xD221AC231 232#define mmNIC1_QM1_CQ_CTL_3 0xD221B0233 234#define mmNIC1_QM1_CQ_PTR_LO_4 0xD221B4235 236#define mmNIC1_QM1_CQ_PTR_HI_4 0xD221B8237 238#define mmNIC1_QM1_CQ_TSIZE_4 0xD221BC239 240#define mmNIC1_QM1_CQ_CTL_4 0xD221C0241 242#define mmNIC1_QM1_CQ_PTR_LO_STS_0 0xD221C4243 244#define mmNIC1_QM1_CQ_PTR_LO_STS_1 0xD221C8245 246#define mmNIC1_QM1_CQ_PTR_LO_STS_2 0xD221CC247 248#define mmNIC1_QM1_CQ_PTR_LO_STS_3 0xD221D0249 250#define mmNIC1_QM1_CQ_PTR_LO_STS_4 0xD221D4251 252#define mmNIC1_QM1_CQ_PTR_HI_STS_0 0xD221D8253 254#define mmNIC1_QM1_CQ_PTR_HI_STS_1 0xD221DC255 256#define mmNIC1_QM1_CQ_PTR_HI_STS_2 0xD221E0257 258#define mmNIC1_QM1_CQ_PTR_HI_STS_3 0xD221E4259 260#define mmNIC1_QM1_CQ_PTR_HI_STS_4 0xD221E8261 262#define mmNIC1_QM1_CQ_TSIZE_STS_0 0xD221EC263 264#define mmNIC1_QM1_CQ_TSIZE_STS_1 0xD221F0265 266#define mmNIC1_QM1_CQ_TSIZE_STS_2 0xD221F4267 268#define mmNIC1_QM1_CQ_TSIZE_STS_3 0xD221F8269 270#define mmNIC1_QM1_CQ_TSIZE_STS_4 0xD221FC271 272#define mmNIC1_QM1_CQ_CTL_STS_0 0xD22200273 274#define mmNIC1_QM1_CQ_CTL_STS_1 0xD22204275 276#define mmNIC1_QM1_CQ_CTL_STS_2 0xD22208277 278#define mmNIC1_QM1_CQ_CTL_STS_3 0xD2220C279 280#define mmNIC1_QM1_CQ_CTL_STS_4 0xD22210281 282#define mmNIC1_QM1_CQ_IFIFO_CNT_0 0xD22214283 284#define mmNIC1_QM1_CQ_IFIFO_CNT_1 0xD22218285 286#define mmNIC1_QM1_CQ_IFIFO_CNT_2 0xD2221C287 288#define mmNIC1_QM1_CQ_IFIFO_CNT_3 0xD22220289 290#define mmNIC1_QM1_CQ_IFIFO_CNT_4 0xD22224291 292#define mmNIC1_QM1_CP_MSG_BASE0_ADDR_LO_0 0xD22228293 294#define mmNIC1_QM1_CP_MSG_BASE0_ADDR_LO_1 0xD2222C295 296#define mmNIC1_QM1_CP_MSG_BASE0_ADDR_LO_2 0xD22230297 298#define mmNIC1_QM1_CP_MSG_BASE0_ADDR_LO_3 0xD22234299 300#define mmNIC1_QM1_CP_MSG_BASE0_ADDR_LO_4 0xD22238301 302#define mmNIC1_QM1_CP_MSG_BASE0_ADDR_HI_0 0xD2223C303 304#define mmNIC1_QM1_CP_MSG_BASE0_ADDR_HI_1 0xD22240305 306#define mmNIC1_QM1_CP_MSG_BASE0_ADDR_HI_2 0xD22244307 308#define mmNIC1_QM1_CP_MSG_BASE0_ADDR_HI_3 0xD22248309 310#define mmNIC1_QM1_CP_MSG_BASE0_ADDR_HI_4 0xD2224C311 312#define mmNIC1_QM1_CP_MSG_BASE1_ADDR_LO_0 0xD22250313 314#define mmNIC1_QM1_CP_MSG_BASE1_ADDR_LO_1 0xD22254315 316#define mmNIC1_QM1_CP_MSG_BASE1_ADDR_LO_2 0xD22258317 318#define mmNIC1_QM1_CP_MSG_BASE1_ADDR_LO_3 0xD2225C319 320#define mmNIC1_QM1_CP_MSG_BASE1_ADDR_LO_4 0xD22260321 322#define mmNIC1_QM1_CP_MSG_BASE1_ADDR_HI_0 0xD22264323 324#define mmNIC1_QM1_CP_MSG_BASE1_ADDR_HI_1 0xD22268325 326#define mmNIC1_QM1_CP_MSG_BASE1_ADDR_HI_2 0xD2226C327 328#define mmNIC1_QM1_CP_MSG_BASE1_ADDR_HI_3 0xD22270329 330#define mmNIC1_QM1_CP_MSG_BASE1_ADDR_HI_4 0xD22274331 332#define mmNIC1_QM1_CP_MSG_BASE2_ADDR_LO_0 0xD22278333 334#define mmNIC1_QM1_CP_MSG_BASE2_ADDR_LO_1 0xD2227C335 336#define mmNIC1_QM1_CP_MSG_BASE2_ADDR_LO_2 0xD22280337 338#define mmNIC1_QM1_CP_MSG_BASE2_ADDR_LO_3 0xD22284339 340#define mmNIC1_QM1_CP_MSG_BASE2_ADDR_LO_4 0xD22288341 342#define mmNIC1_QM1_CP_MSG_BASE2_ADDR_HI_0 0xD2228C343 344#define mmNIC1_QM1_CP_MSG_BASE2_ADDR_HI_1 0xD22290345 346#define mmNIC1_QM1_CP_MSG_BASE2_ADDR_HI_2 0xD22294347 348#define mmNIC1_QM1_CP_MSG_BASE2_ADDR_HI_3 0xD22298349 350#define mmNIC1_QM1_CP_MSG_BASE2_ADDR_HI_4 0xD2229C351 352#define mmNIC1_QM1_CP_MSG_BASE3_ADDR_LO_0 0xD222A0353 354#define mmNIC1_QM1_CP_MSG_BASE3_ADDR_LO_1 0xD222A4355 356#define mmNIC1_QM1_CP_MSG_BASE3_ADDR_LO_2 0xD222A8357 358#define mmNIC1_QM1_CP_MSG_BASE3_ADDR_LO_3 0xD222AC359 360#define mmNIC1_QM1_CP_MSG_BASE3_ADDR_LO_4 0xD222B0361 362#define mmNIC1_QM1_CP_MSG_BASE3_ADDR_HI_0 0xD222B4363 364#define mmNIC1_QM1_CP_MSG_BASE3_ADDR_HI_1 0xD222B8365 366#define mmNIC1_QM1_CP_MSG_BASE3_ADDR_HI_2 0xD222BC367 368#define mmNIC1_QM1_CP_MSG_BASE3_ADDR_HI_3 0xD222C0369 370#define mmNIC1_QM1_CP_MSG_BASE3_ADDR_HI_4 0xD222C4371 372#define mmNIC1_QM1_CP_LDMA_TSIZE_OFFSET_0 0xD222C8373 374#define mmNIC1_QM1_CP_LDMA_TSIZE_OFFSET_1 0xD222CC375 376#define mmNIC1_QM1_CP_LDMA_TSIZE_OFFSET_2 0xD222D0377 378#define mmNIC1_QM1_CP_LDMA_TSIZE_OFFSET_3 0xD222D4379 380#define mmNIC1_QM1_CP_LDMA_TSIZE_OFFSET_4 0xD222D8381 382#define mmNIC1_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_0 0xD222E0383 384#define mmNIC1_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_1 0xD222E4385 386#define mmNIC1_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_2 0xD222E8387 388#define mmNIC1_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_3 0xD222EC389 390#define mmNIC1_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_4 0xD222F0391 392#define mmNIC1_QM1_CP_LDMA_DST_BASE_LO_OFFSET_0 0xD222F4393 394#define mmNIC1_QM1_CP_LDMA_DST_BASE_LO_OFFSET_1 0xD222F8395 396#define mmNIC1_QM1_CP_LDMA_DST_BASE_LO_OFFSET_2 0xD222FC397 398#define mmNIC1_QM1_CP_LDMA_DST_BASE_LO_OFFSET_3 0xD22300399 400#define mmNIC1_QM1_CP_LDMA_DST_BASE_LO_OFFSET_4 0xD22304401 402#define mmNIC1_QM1_CP_FENCE0_RDATA_0 0xD22308403 404#define mmNIC1_QM1_CP_FENCE0_RDATA_1 0xD2230C405 406#define mmNIC1_QM1_CP_FENCE0_RDATA_2 0xD22310407 408#define mmNIC1_QM1_CP_FENCE0_RDATA_3 0xD22314409 410#define mmNIC1_QM1_CP_FENCE0_RDATA_4 0xD22318411 412#define mmNIC1_QM1_CP_FENCE1_RDATA_0 0xD2231C413 414#define mmNIC1_QM1_CP_FENCE1_RDATA_1 0xD22320415 416#define mmNIC1_QM1_CP_FENCE1_RDATA_2 0xD22324417 418#define mmNIC1_QM1_CP_FENCE1_RDATA_3 0xD22328419 420#define mmNIC1_QM1_CP_FENCE1_RDATA_4 0xD2232C421 422#define mmNIC1_QM1_CP_FENCE2_RDATA_0 0xD22330423 424#define mmNIC1_QM1_CP_FENCE2_RDATA_1 0xD22334425 426#define mmNIC1_QM1_CP_FENCE2_RDATA_2 0xD22338427 428#define mmNIC1_QM1_CP_FENCE2_RDATA_3 0xD2233C429 430#define mmNIC1_QM1_CP_FENCE2_RDATA_4 0xD22340431 432#define mmNIC1_QM1_CP_FENCE3_RDATA_0 0xD22344433 434#define mmNIC1_QM1_CP_FENCE3_RDATA_1 0xD22348435 436#define mmNIC1_QM1_CP_FENCE3_RDATA_2 0xD2234C437 438#define mmNIC1_QM1_CP_FENCE3_RDATA_3 0xD22350439 440#define mmNIC1_QM1_CP_FENCE3_RDATA_4 0xD22354441 442#define mmNIC1_QM1_CP_FENCE0_CNT_0 0xD22358443 444#define mmNIC1_QM1_CP_FENCE0_CNT_1 0xD2235C445 446#define mmNIC1_QM1_CP_FENCE0_CNT_2 0xD22360447 448#define mmNIC1_QM1_CP_FENCE0_CNT_3 0xD22364449 450#define mmNIC1_QM1_CP_FENCE0_CNT_4 0xD22368451 452#define mmNIC1_QM1_CP_FENCE1_CNT_0 0xD2236C453 454#define mmNIC1_QM1_CP_FENCE1_CNT_1 0xD22370455 456#define mmNIC1_QM1_CP_FENCE1_CNT_2 0xD22374457 458#define mmNIC1_QM1_CP_FENCE1_CNT_3 0xD22378459 460#define mmNIC1_QM1_CP_FENCE1_CNT_4 0xD2237C461 462#define mmNIC1_QM1_CP_FENCE2_CNT_0 0xD22380463 464#define mmNIC1_QM1_CP_FENCE2_CNT_1 0xD22384465 466#define mmNIC1_QM1_CP_FENCE2_CNT_2 0xD22388467 468#define mmNIC1_QM1_CP_FENCE2_CNT_3 0xD2238C469 470#define mmNIC1_QM1_CP_FENCE2_CNT_4 0xD22390471 472#define mmNIC1_QM1_CP_FENCE3_CNT_0 0xD22394473 474#define mmNIC1_QM1_CP_FENCE3_CNT_1 0xD22398475 476#define mmNIC1_QM1_CP_FENCE3_CNT_2 0xD2239C477 478#define mmNIC1_QM1_CP_FENCE3_CNT_3 0xD223A0479 480#define mmNIC1_QM1_CP_FENCE3_CNT_4 0xD223A4481 482#define mmNIC1_QM1_CP_STS_0 0xD223A8483 484#define mmNIC1_QM1_CP_STS_1 0xD223AC485 486#define mmNIC1_QM1_CP_STS_2 0xD223B0487 488#define mmNIC1_QM1_CP_STS_3 0xD223B4489 490#define mmNIC1_QM1_CP_STS_4 0xD223B8491 492#define mmNIC1_QM1_CP_CURRENT_INST_LO_0 0xD223BC493 494#define mmNIC1_QM1_CP_CURRENT_INST_LO_1 0xD223C0495 496#define mmNIC1_QM1_CP_CURRENT_INST_LO_2 0xD223C4497 498#define mmNIC1_QM1_CP_CURRENT_INST_LO_3 0xD223C8499 500#define mmNIC1_QM1_CP_CURRENT_INST_LO_4 0xD223CC501 502#define mmNIC1_QM1_CP_CURRENT_INST_HI_0 0xD223D0503 504#define mmNIC1_QM1_CP_CURRENT_INST_HI_1 0xD223D4505 506#define mmNIC1_QM1_CP_CURRENT_INST_HI_2 0xD223D8507 508#define mmNIC1_QM1_CP_CURRENT_INST_HI_3 0xD223DC509 510#define mmNIC1_QM1_CP_CURRENT_INST_HI_4 0xD223E0511 512#define mmNIC1_QM1_CP_BARRIER_CFG_0 0xD223F4513 514#define mmNIC1_QM1_CP_BARRIER_CFG_1 0xD223F8515 516#define mmNIC1_QM1_CP_BARRIER_CFG_2 0xD223FC517 518#define mmNIC1_QM1_CP_BARRIER_CFG_3 0xD22400519 520#define mmNIC1_QM1_CP_BARRIER_CFG_4 0xD22404521 522#define mmNIC1_QM1_CP_DBG_0_0 0xD22408523 524#define mmNIC1_QM1_CP_DBG_0_1 0xD2240C525 526#define mmNIC1_QM1_CP_DBG_0_2 0xD22410527 528#define mmNIC1_QM1_CP_DBG_0_3 0xD22414529 530#define mmNIC1_QM1_CP_DBG_0_4 0xD22418531 532#define mmNIC1_QM1_CP_ARUSER_31_11_0 0xD2241C533 534#define mmNIC1_QM1_CP_ARUSER_31_11_1 0xD22420535 536#define mmNIC1_QM1_CP_ARUSER_31_11_2 0xD22424537 538#define mmNIC1_QM1_CP_ARUSER_31_11_3 0xD22428539 540#define mmNIC1_QM1_CP_ARUSER_31_11_4 0xD2242C541 542#define mmNIC1_QM1_CP_AWUSER_31_11_0 0xD22430543 544#define mmNIC1_QM1_CP_AWUSER_31_11_1 0xD22434545 546#define mmNIC1_QM1_CP_AWUSER_31_11_2 0xD22438547 548#define mmNIC1_QM1_CP_AWUSER_31_11_3 0xD2243C549 550#define mmNIC1_QM1_CP_AWUSER_31_11_4 0xD22440551 552#define mmNIC1_QM1_ARB_CFG_0 0xD22A00553 554#define mmNIC1_QM1_ARB_CHOISE_Q_PUSH 0xD22A04555 556#define mmNIC1_QM1_ARB_WRR_WEIGHT_0 0xD22A08557 558#define mmNIC1_QM1_ARB_WRR_WEIGHT_1 0xD22A0C559 560#define mmNIC1_QM1_ARB_WRR_WEIGHT_2 0xD22A10561 562#define mmNIC1_QM1_ARB_WRR_WEIGHT_3 0xD22A14563 564#define mmNIC1_QM1_ARB_CFG_1 0xD22A18565 566#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_0 0xD22A20567 568#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_1 0xD22A24569 570#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_2 0xD22A28571 572#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_3 0xD22A2C573 574#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_4 0xD22A30575 576#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_5 0xD22A34577 578#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_6 0xD22A38579 580#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_7 0xD22A3C581 582#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_8 0xD22A40583 584#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_9 0xD22A44585 586#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_10 0xD22A48587 588#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_11 0xD22A4C589 590#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_12 0xD22A50591 592#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_13 0xD22A54593 594#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_14 0xD22A58595 596#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_15 0xD22A5C597 598#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_16 0xD22A60599 600#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_17 0xD22A64601 602#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_18 0xD22A68603 604#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_19 0xD22A6C605 606#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_20 0xD22A70607 608#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_21 0xD22A74609 610#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_22 0xD22A78611 612#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_23 0xD22A7C613 614#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_24 0xD22A80615 616#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_25 0xD22A84617 618#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_26 0xD22A88619 620#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_27 0xD22A8C621 622#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_28 0xD22A90623 624#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_29 0xD22A94625 626#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_30 0xD22A98627 628#define mmNIC1_QM1_ARB_MST_AVAIL_CRED_31 0xD22A9C629 630#define mmNIC1_QM1_ARB_MST_CRED_INC 0xD22AA0631 632#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_0 0xD22AA4633 634#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_1 0xD22AA8635 636#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_2 0xD22AAC637 638#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_3 0xD22AB0639 640#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_4 0xD22AB4641 642#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_5 0xD22AB8643 644#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_6 0xD22ABC645 646#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_7 0xD22AC0647 648#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_8 0xD22AC4649 650#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_9 0xD22AC8651 652#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_10 0xD22ACC653 654#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_11 0xD22AD0655 656#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_12 0xD22AD4657 658#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_13 0xD22AD8659 660#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_14 0xD22ADC661 662#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_15 0xD22AE0663 664#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_16 0xD22AE4665 666#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_17 0xD22AE8667 668#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_18 0xD22AEC669 670#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_19 0xD22AF0671 672#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_20 0xD22AF4673 674#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_21 0xD22AF8675 676#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_22 0xD22AFC677 678#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_23 0xD22B00679 680#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_24 0xD22B04681 682#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_25 0xD22B08683 684#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_26 0xD22B0C685 686#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_27 0xD22B10687 688#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_28 0xD22B14689 690#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_29 0xD22B18691 692#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_30 0xD22B1C693 694#define mmNIC1_QM1_ARB_MST_CHOISE_PUSH_OFST_31 0xD22B20695 696#define mmNIC1_QM1_ARB_SLV_MASTER_INC_CRED_OFST 0xD22B28697 698#define mmNIC1_QM1_ARB_MST_SLAVE_EN 0xD22B2C699 700#define mmNIC1_QM1_ARB_MST_QUIET_PER 0xD22B34701 702#define mmNIC1_QM1_ARB_SLV_CHOISE_WDT 0xD22B38703 704#define mmNIC1_QM1_ARB_SLV_ID 0xD22B3C705 706#define mmNIC1_QM1_ARB_MSG_MAX_INFLIGHT 0xD22B44707 708#define mmNIC1_QM1_ARB_MSG_AWUSER_31_11 0xD22B48709 710#define mmNIC1_QM1_ARB_MSG_AWUSER_SEC_PROP 0xD22B4C711 712#define mmNIC1_QM1_ARB_MSG_AWUSER_NON_SEC_PROP 0xD22B50713 714#define mmNIC1_QM1_ARB_BASE_LO 0xD22B54715 716#define mmNIC1_QM1_ARB_BASE_HI 0xD22B58717 718#define mmNIC1_QM1_ARB_STATE_STS 0xD22B80719 720#define mmNIC1_QM1_ARB_CHOISE_FULLNESS_STS 0xD22B84721 722#define mmNIC1_QM1_ARB_MSG_STS 0xD22B88723 724#define mmNIC1_QM1_ARB_SLV_CHOISE_Q_HEAD 0xD22B8C725 726#define mmNIC1_QM1_ARB_ERR_CAUSE 0xD22B9C727 728#define mmNIC1_QM1_ARB_ERR_MSG_EN 0xD22BA0729 730#define mmNIC1_QM1_ARB_ERR_STS_DRP 0xD22BA8731 732#define mmNIC1_QM1_ARB_MST_CRED_STS_0 0xD22BB0733 734#define mmNIC1_QM1_ARB_MST_CRED_STS_1 0xD22BB4735 736#define mmNIC1_QM1_ARB_MST_CRED_STS_2 0xD22BB8737 738#define mmNIC1_QM1_ARB_MST_CRED_STS_3 0xD22BBC739 740#define mmNIC1_QM1_ARB_MST_CRED_STS_4 0xD22BC0741 742#define mmNIC1_QM1_ARB_MST_CRED_STS_5 0xD22BC4743 744#define mmNIC1_QM1_ARB_MST_CRED_STS_6 0xD22BC8745 746#define mmNIC1_QM1_ARB_MST_CRED_STS_7 0xD22BCC747 748#define mmNIC1_QM1_ARB_MST_CRED_STS_8 0xD22BD0749 750#define mmNIC1_QM1_ARB_MST_CRED_STS_9 0xD22BD4751 752#define mmNIC1_QM1_ARB_MST_CRED_STS_10 0xD22BD8753 754#define mmNIC1_QM1_ARB_MST_CRED_STS_11 0xD22BDC755 756#define mmNIC1_QM1_ARB_MST_CRED_STS_12 0xD22BE0757 758#define mmNIC1_QM1_ARB_MST_CRED_STS_13 0xD22BE4759 760#define mmNIC1_QM1_ARB_MST_CRED_STS_14 0xD22BE8761 762#define mmNIC1_QM1_ARB_MST_CRED_STS_15 0xD22BEC763 764#define mmNIC1_QM1_ARB_MST_CRED_STS_16 0xD22BF0765 766#define mmNIC1_QM1_ARB_MST_CRED_STS_17 0xD22BF4767 768#define mmNIC1_QM1_ARB_MST_CRED_STS_18 0xD22BF8769 770#define mmNIC1_QM1_ARB_MST_CRED_STS_19 0xD22BFC771 772#define mmNIC1_QM1_ARB_MST_CRED_STS_20 0xD22C00773 774#define mmNIC1_QM1_ARB_MST_CRED_STS_21 0xD22C04775 776#define mmNIC1_QM1_ARB_MST_CRED_STS_22 0xD22C08777 778#define mmNIC1_QM1_ARB_MST_CRED_STS_23 0xD22C0C779 780#define mmNIC1_QM1_ARB_MST_CRED_STS_24 0xD22C10781 782#define mmNIC1_QM1_ARB_MST_CRED_STS_25 0xD22C14783 784#define mmNIC1_QM1_ARB_MST_CRED_STS_26 0xD22C18785 786#define mmNIC1_QM1_ARB_MST_CRED_STS_27 0xD22C1C787 788#define mmNIC1_QM1_ARB_MST_CRED_STS_28 0xD22C20789 790#define mmNIC1_QM1_ARB_MST_CRED_STS_29 0xD22C24791 792#define mmNIC1_QM1_ARB_MST_CRED_STS_30 0xD22C28793 794#define mmNIC1_QM1_ARB_MST_CRED_STS_31 0xD22C2C795 796#define mmNIC1_QM1_CGM_CFG 0xD22C70797 798#define mmNIC1_QM1_CGM_STS 0xD22C74799 800#define mmNIC1_QM1_CGM_CFG1 0xD22C78801 802#define mmNIC1_QM1_LOCAL_RANGE_BASE 0xD22C80803 804#define mmNIC1_QM1_LOCAL_RANGE_SIZE 0xD22C84805 806#define mmNIC1_QM1_CSMR_STRICT_PRIO_CFG 0xD22C90807 808#define mmNIC1_QM1_HBW_RD_RATE_LIM_CFG_1 0xD22C94809 810#define mmNIC1_QM1_LBW_WR_RATE_LIM_CFG_0 0xD22C98811 812#define mmNIC1_QM1_LBW_WR_RATE_LIM_CFG_1 0xD22C9C813 814#define mmNIC1_QM1_HBW_RD_RATE_LIM_CFG_0 0xD22CA0815 816#define mmNIC1_QM1_GLBL_AXCACHE 0xD22CA4817 818#define mmNIC1_QM1_IND_GW_APB_CFG 0xD22CB0819 820#define mmNIC1_QM1_IND_GW_APB_WDATA 0xD22CB4821 822#define mmNIC1_QM1_IND_GW_APB_RDATA 0xD22CB8823 824#define mmNIC1_QM1_IND_GW_APB_STATUS 0xD22CBC825 826#define mmNIC1_QM1_GLBL_ERR_ADDR_LO 0xD22CD0827 828#define mmNIC1_QM1_GLBL_ERR_ADDR_HI 0xD22CD4829 830#define mmNIC1_QM1_GLBL_ERR_WDATA 0xD22CD8831 832#define mmNIC1_QM1_GLBL_MEM_INIT_BUSY 0xD22D00833 834#endif /* ASIC_REG_NIC1_QM1_REGS_H_ */835