835 lines · c
1/* SPDX-License-Identifier: GPL-2.02 *3 * Copyright 2016-2018 HabanaLabs, Ltd.4 * All Rights Reserved.5 *6 */7 8/************************************9 ** This is an auto-generated file **10 ** DO NOT EDIT BELOW **11 ************************************/12 13#ifndef ASIC_REG_NIC4_QM0_REGS_H_14#define ASIC_REG_NIC4_QM0_REGS_H_15 16/*17 *****************************************18 * NIC4_QM0 (Prototype: QMAN)19 *****************************************20 */21 22#define mmNIC4_QM0_GLBL_CFG0 0xDE000023 24#define mmNIC4_QM0_GLBL_CFG1 0xDE000425 26#define mmNIC4_QM0_GLBL_PROT 0xDE000827 28#define mmNIC4_QM0_GLBL_ERR_CFG 0xDE000C29 30#define mmNIC4_QM0_GLBL_SECURE_PROPS_0 0xDE001031 32#define mmNIC4_QM0_GLBL_SECURE_PROPS_1 0xDE001433 34#define mmNIC4_QM0_GLBL_SECURE_PROPS_2 0xDE001835 36#define mmNIC4_QM0_GLBL_SECURE_PROPS_3 0xDE001C37 38#define mmNIC4_QM0_GLBL_SECURE_PROPS_4 0xDE002039 40#define mmNIC4_QM0_GLBL_NON_SECURE_PROPS_0 0xDE002441 42#define mmNIC4_QM0_GLBL_NON_SECURE_PROPS_1 0xDE002843 44#define mmNIC4_QM0_GLBL_NON_SECURE_PROPS_2 0xDE002C45 46#define mmNIC4_QM0_GLBL_NON_SECURE_PROPS_3 0xDE003047 48#define mmNIC4_QM0_GLBL_NON_SECURE_PROPS_4 0xDE003449 50#define mmNIC4_QM0_GLBL_STS0 0xDE003851 52#define mmNIC4_QM0_GLBL_STS1_0 0xDE004053 54#define mmNIC4_QM0_GLBL_STS1_1 0xDE004455 56#define mmNIC4_QM0_GLBL_STS1_2 0xDE004857 58#define mmNIC4_QM0_GLBL_STS1_3 0xDE004C59 60#define mmNIC4_QM0_GLBL_STS1_4 0xDE005061 62#define mmNIC4_QM0_GLBL_MSG_EN_0 0xDE005463 64#define mmNIC4_QM0_GLBL_MSG_EN_1 0xDE005865 66#define mmNIC4_QM0_GLBL_MSG_EN_2 0xDE005C67 68#define mmNIC4_QM0_GLBL_MSG_EN_3 0xDE006069 70#define mmNIC4_QM0_GLBL_MSG_EN_4 0xDE006871 72#define mmNIC4_QM0_PQ_BASE_LO_0 0xDE007073 74#define mmNIC4_QM0_PQ_BASE_LO_1 0xDE007475 76#define mmNIC4_QM0_PQ_BASE_LO_2 0xDE007877 78#define mmNIC4_QM0_PQ_BASE_LO_3 0xDE007C79 80#define mmNIC4_QM0_PQ_BASE_HI_0 0xDE008081 82#define mmNIC4_QM0_PQ_BASE_HI_1 0xDE008483 84#define mmNIC4_QM0_PQ_BASE_HI_2 0xDE008885 86#define mmNIC4_QM0_PQ_BASE_HI_3 0xDE008C87 88#define mmNIC4_QM0_PQ_SIZE_0 0xDE009089 90#define mmNIC4_QM0_PQ_SIZE_1 0xDE009491 92#define mmNIC4_QM0_PQ_SIZE_2 0xDE009893 94#define mmNIC4_QM0_PQ_SIZE_3 0xDE009C95 96#define mmNIC4_QM0_PQ_PI_0 0xDE00A097 98#define mmNIC4_QM0_PQ_PI_1 0xDE00A499 100#define mmNIC4_QM0_PQ_PI_2 0xDE00A8101 102#define mmNIC4_QM0_PQ_PI_3 0xDE00AC103 104#define mmNIC4_QM0_PQ_CI_0 0xDE00B0105 106#define mmNIC4_QM0_PQ_CI_1 0xDE00B4107 108#define mmNIC4_QM0_PQ_CI_2 0xDE00B8109 110#define mmNIC4_QM0_PQ_CI_3 0xDE00BC111 112#define mmNIC4_QM0_PQ_CFG0_0 0xDE00C0113 114#define mmNIC4_QM0_PQ_CFG0_1 0xDE00C4115 116#define mmNIC4_QM0_PQ_CFG0_2 0xDE00C8117 118#define mmNIC4_QM0_PQ_CFG0_3 0xDE00CC119 120#define mmNIC4_QM0_PQ_CFG1_0 0xDE00D0121 122#define mmNIC4_QM0_PQ_CFG1_1 0xDE00D4123 124#define mmNIC4_QM0_PQ_CFG1_2 0xDE00D8125 126#define mmNIC4_QM0_PQ_CFG1_3 0xDE00DC127 128#define mmNIC4_QM0_PQ_ARUSER_31_11_0 0xDE00E0129 130#define mmNIC4_QM0_PQ_ARUSER_31_11_1 0xDE00E4131 132#define mmNIC4_QM0_PQ_ARUSER_31_11_2 0xDE00E8133 134#define mmNIC4_QM0_PQ_ARUSER_31_11_3 0xDE00EC135 136#define mmNIC4_QM0_PQ_STS0_0 0xDE00F0137 138#define mmNIC4_QM0_PQ_STS0_1 0xDE00F4139 140#define mmNIC4_QM0_PQ_STS0_2 0xDE00F8141 142#define mmNIC4_QM0_PQ_STS0_3 0xDE00FC143 144#define mmNIC4_QM0_PQ_STS1_0 0xDE0100145 146#define mmNIC4_QM0_PQ_STS1_1 0xDE0104147 148#define mmNIC4_QM0_PQ_STS1_2 0xDE0108149 150#define mmNIC4_QM0_PQ_STS1_3 0xDE010C151 152#define mmNIC4_QM0_CQ_CFG0_0 0xDE0110153 154#define mmNIC4_QM0_CQ_CFG0_1 0xDE0114155 156#define mmNIC4_QM0_CQ_CFG0_2 0xDE0118157 158#define mmNIC4_QM0_CQ_CFG0_3 0xDE011C159 160#define mmNIC4_QM0_CQ_CFG0_4 0xDE0120161 162#define mmNIC4_QM0_CQ_CFG1_0 0xDE0124163 164#define mmNIC4_QM0_CQ_CFG1_1 0xDE0128165 166#define mmNIC4_QM0_CQ_CFG1_2 0xDE012C167 168#define mmNIC4_QM0_CQ_CFG1_3 0xDE0130169 170#define mmNIC4_QM0_CQ_CFG1_4 0xDE0134171 172#define mmNIC4_QM0_CQ_ARUSER_31_11_0 0xDE0138173 174#define mmNIC4_QM0_CQ_ARUSER_31_11_1 0xDE013C175 176#define mmNIC4_QM0_CQ_ARUSER_31_11_2 0xDE0140177 178#define mmNIC4_QM0_CQ_ARUSER_31_11_3 0xDE0144179 180#define mmNIC4_QM0_CQ_ARUSER_31_11_4 0xDE0148181 182#define mmNIC4_QM0_CQ_STS0_0 0xDE014C183 184#define mmNIC4_QM0_CQ_STS0_1 0xDE0150185 186#define mmNIC4_QM0_CQ_STS0_2 0xDE0154187 188#define mmNIC4_QM0_CQ_STS0_3 0xDE0158189 190#define mmNIC4_QM0_CQ_STS0_4 0xDE015C191 192#define mmNIC4_QM0_CQ_STS1_0 0xDE0160193 194#define mmNIC4_QM0_CQ_STS1_1 0xDE0164195 196#define mmNIC4_QM0_CQ_STS1_2 0xDE0168197 198#define mmNIC4_QM0_CQ_STS1_3 0xDE016C199 200#define mmNIC4_QM0_CQ_STS1_4 0xDE0170201 202#define mmNIC4_QM0_CQ_PTR_LO_0 0xDE0174203 204#define mmNIC4_QM0_CQ_PTR_HI_0 0xDE0178205 206#define mmNIC4_QM0_CQ_TSIZE_0 0xDE017C207 208#define mmNIC4_QM0_CQ_CTL_0 0xDE0180209 210#define mmNIC4_QM0_CQ_PTR_LO_1 0xDE0184211 212#define mmNIC4_QM0_CQ_PTR_HI_1 0xDE0188213 214#define mmNIC4_QM0_CQ_TSIZE_1 0xDE018C215 216#define mmNIC4_QM0_CQ_CTL_1 0xDE0190217 218#define mmNIC4_QM0_CQ_PTR_LO_2 0xDE0194219 220#define mmNIC4_QM0_CQ_PTR_HI_2 0xDE0198221 222#define mmNIC4_QM0_CQ_TSIZE_2 0xDE019C223 224#define mmNIC4_QM0_CQ_CTL_2 0xDE01A0225 226#define mmNIC4_QM0_CQ_PTR_LO_3 0xDE01A4227 228#define mmNIC4_QM0_CQ_PTR_HI_3 0xDE01A8229 230#define mmNIC4_QM0_CQ_TSIZE_3 0xDE01AC231 232#define mmNIC4_QM0_CQ_CTL_3 0xDE01B0233 234#define mmNIC4_QM0_CQ_PTR_LO_4 0xDE01B4235 236#define mmNIC4_QM0_CQ_PTR_HI_4 0xDE01B8237 238#define mmNIC4_QM0_CQ_TSIZE_4 0xDE01BC239 240#define mmNIC4_QM0_CQ_CTL_4 0xDE01C0241 242#define mmNIC4_QM0_CQ_PTR_LO_STS_0 0xDE01C4243 244#define mmNIC4_QM0_CQ_PTR_LO_STS_1 0xDE01C8245 246#define mmNIC4_QM0_CQ_PTR_LO_STS_2 0xDE01CC247 248#define mmNIC4_QM0_CQ_PTR_LO_STS_3 0xDE01D0249 250#define mmNIC4_QM0_CQ_PTR_LO_STS_4 0xDE01D4251 252#define mmNIC4_QM0_CQ_PTR_HI_STS_0 0xDE01D8253 254#define mmNIC4_QM0_CQ_PTR_HI_STS_1 0xDE01DC255 256#define mmNIC4_QM0_CQ_PTR_HI_STS_2 0xDE01E0257 258#define mmNIC4_QM0_CQ_PTR_HI_STS_3 0xDE01E4259 260#define mmNIC4_QM0_CQ_PTR_HI_STS_4 0xDE01E8261 262#define mmNIC4_QM0_CQ_TSIZE_STS_0 0xDE01EC263 264#define mmNIC4_QM0_CQ_TSIZE_STS_1 0xDE01F0265 266#define mmNIC4_QM0_CQ_TSIZE_STS_2 0xDE01F4267 268#define mmNIC4_QM0_CQ_TSIZE_STS_3 0xDE01F8269 270#define mmNIC4_QM0_CQ_TSIZE_STS_4 0xDE01FC271 272#define mmNIC4_QM0_CQ_CTL_STS_0 0xDE0200273 274#define mmNIC4_QM0_CQ_CTL_STS_1 0xDE0204275 276#define mmNIC4_QM0_CQ_CTL_STS_2 0xDE0208277 278#define mmNIC4_QM0_CQ_CTL_STS_3 0xDE020C279 280#define mmNIC4_QM0_CQ_CTL_STS_4 0xDE0210281 282#define mmNIC4_QM0_CQ_IFIFO_CNT_0 0xDE0214283 284#define mmNIC4_QM0_CQ_IFIFO_CNT_1 0xDE0218285 286#define mmNIC4_QM0_CQ_IFIFO_CNT_2 0xDE021C287 288#define mmNIC4_QM0_CQ_IFIFO_CNT_3 0xDE0220289 290#define mmNIC4_QM0_CQ_IFIFO_CNT_4 0xDE0224291 292#define mmNIC4_QM0_CP_MSG_BASE0_ADDR_LO_0 0xDE0228293 294#define mmNIC4_QM0_CP_MSG_BASE0_ADDR_LO_1 0xDE022C295 296#define mmNIC4_QM0_CP_MSG_BASE0_ADDR_LO_2 0xDE0230297 298#define mmNIC4_QM0_CP_MSG_BASE0_ADDR_LO_3 0xDE0234299 300#define mmNIC4_QM0_CP_MSG_BASE0_ADDR_LO_4 0xDE0238301 302#define mmNIC4_QM0_CP_MSG_BASE0_ADDR_HI_0 0xDE023C303 304#define mmNIC4_QM0_CP_MSG_BASE0_ADDR_HI_1 0xDE0240305 306#define mmNIC4_QM0_CP_MSG_BASE0_ADDR_HI_2 0xDE0244307 308#define mmNIC4_QM0_CP_MSG_BASE0_ADDR_HI_3 0xDE0248309 310#define mmNIC4_QM0_CP_MSG_BASE0_ADDR_HI_4 0xDE024C311 312#define mmNIC4_QM0_CP_MSG_BASE1_ADDR_LO_0 0xDE0250313 314#define mmNIC4_QM0_CP_MSG_BASE1_ADDR_LO_1 0xDE0254315 316#define mmNIC4_QM0_CP_MSG_BASE1_ADDR_LO_2 0xDE0258317 318#define mmNIC4_QM0_CP_MSG_BASE1_ADDR_LO_3 0xDE025C319 320#define mmNIC4_QM0_CP_MSG_BASE1_ADDR_LO_4 0xDE0260321 322#define mmNIC4_QM0_CP_MSG_BASE1_ADDR_HI_0 0xDE0264323 324#define mmNIC4_QM0_CP_MSG_BASE1_ADDR_HI_1 0xDE0268325 326#define mmNIC4_QM0_CP_MSG_BASE1_ADDR_HI_2 0xDE026C327 328#define mmNIC4_QM0_CP_MSG_BASE1_ADDR_HI_3 0xDE0270329 330#define mmNIC4_QM0_CP_MSG_BASE1_ADDR_HI_4 0xDE0274331 332#define mmNIC4_QM0_CP_MSG_BASE2_ADDR_LO_0 0xDE0278333 334#define mmNIC4_QM0_CP_MSG_BASE2_ADDR_LO_1 0xDE027C335 336#define mmNIC4_QM0_CP_MSG_BASE2_ADDR_LO_2 0xDE0280337 338#define mmNIC4_QM0_CP_MSG_BASE2_ADDR_LO_3 0xDE0284339 340#define mmNIC4_QM0_CP_MSG_BASE2_ADDR_LO_4 0xDE0288341 342#define mmNIC4_QM0_CP_MSG_BASE2_ADDR_HI_0 0xDE028C343 344#define mmNIC4_QM0_CP_MSG_BASE2_ADDR_HI_1 0xDE0290345 346#define mmNIC4_QM0_CP_MSG_BASE2_ADDR_HI_2 0xDE0294347 348#define mmNIC4_QM0_CP_MSG_BASE2_ADDR_HI_3 0xDE0298349 350#define mmNIC4_QM0_CP_MSG_BASE2_ADDR_HI_4 0xDE029C351 352#define mmNIC4_QM0_CP_MSG_BASE3_ADDR_LO_0 0xDE02A0353 354#define mmNIC4_QM0_CP_MSG_BASE3_ADDR_LO_1 0xDE02A4355 356#define mmNIC4_QM0_CP_MSG_BASE3_ADDR_LO_2 0xDE02A8357 358#define mmNIC4_QM0_CP_MSG_BASE3_ADDR_LO_3 0xDE02AC359 360#define mmNIC4_QM0_CP_MSG_BASE3_ADDR_LO_4 0xDE02B0361 362#define mmNIC4_QM0_CP_MSG_BASE3_ADDR_HI_0 0xDE02B4363 364#define mmNIC4_QM0_CP_MSG_BASE3_ADDR_HI_1 0xDE02B8365 366#define mmNIC4_QM0_CP_MSG_BASE3_ADDR_HI_2 0xDE02BC367 368#define mmNIC4_QM0_CP_MSG_BASE3_ADDR_HI_3 0xDE02C0369 370#define mmNIC4_QM0_CP_MSG_BASE3_ADDR_HI_4 0xDE02C4371 372#define mmNIC4_QM0_CP_LDMA_TSIZE_OFFSET_0 0xDE02C8373 374#define mmNIC4_QM0_CP_LDMA_TSIZE_OFFSET_1 0xDE02CC375 376#define mmNIC4_QM0_CP_LDMA_TSIZE_OFFSET_2 0xDE02D0377 378#define mmNIC4_QM0_CP_LDMA_TSIZE_OFFSET_3 0xDE02D4379 380#define mmNIC4_QM0_CP_LDMA_TSIZE_OFFSET_4 0xDE02D8381 382#define mmNIC4_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_0 0xDE02E0383 384#define mmNIC4_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_1 0xDE02E4385 386#define mmNIC4_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_2 0xDE02E8387 388#define mmNIC4_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_3 0xDE02EC389 390#define mmNIC4_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_4 0xDE02F0391 392#define mmNIC4_QM0_CP_LDMA_DST_BASE_LO_OFFSET_0 0xDE02F4393 394#define mmNIC4_QM0_CP_LDMA_DST_BASE_LO_OFFSET_1 0xDE02F8395 396#define mmNIC4_QM0_CP_LDMA_DST_BASE_LO_OFFSET_2 0xDE02FC397 398#define mmNIC4_QM0_CP_LDMA_DST_BASE_LO_OFFSET_3 0xDE0300399 400#define mmNIC4_QM0_CP_LDMA_DST_BASE_LO_OFFSET_4 0xDE0304401 402#define mmNIC4_QM0_CP_FENCE0_RDATA_0 0xDE0308403 404#define mmNIC4_QM0_CP_FENCE0_RDATA_1 0xDE030C405 406#define mmNIC4_QM0_CP_FENCE0_RDATA_2 0xDE0310407 408#define mmNIC4_QM0_CP_FENCE0_RDATA_3 0xDE0314409 410#define mmNIC4_QM0_CP_FENCE0_RDATA_4 0xDE0318411 412#define mmNIC4_QM0_CP_FENCE1_RDATA_0 0xDE031C413 414#define mmNIC4_QM0_CP_FENCE1_RDATA_1 0xDE0320415 416#define mmNIC4_QM0_CP_FENCE1_RDATA_2 0xDE0324417 418#define mmNIC4_QM0_CP_FENCE1_RDATA_3 0xDE0328419 420#define mmNIC4_QM0_CP_FENCE1_RDATA_4 0xDE032C421 422#define mmNIC4_QM0_CP_FENCE2_RDATA_0 0xDE0330423 424#define mmNIC4_QM0_CP_FENCE2_RDATA_1 0xDE0334425 426#define mmNIC4_QM0_CP_FENCE2_RDATA_2 0xDE0338427 428#define mmNIC4_QM0_CP_FENCE2_RDATA_3 0xDE033C429 430#define mmNIC4_QM0_CP_FENCE2_RDATA_4 0xDE0340431 432#define mmNIC4_QM0_CP_FENCE3_RDATA_0 0xDE0344433 434#define mmNIC4_QM0_CP_FENCE3_RDATA_1 0xDE0348435 436#define mmNIC4_QM0_CP_FENCE3_RDATA_2 0xDE034C437 438#define mmNIC4_QM0_CP_FENCE3_RDATA_3 0xDE0350439 440#define mmNIC4_QM0_CP_FENCE3_RDATA_4 0xDE0354441 442#define mmNIC4_QM0_CP_FENCE0_CNT_0 0xDE0358443 444#define mmNIC4_QM0_CP_FENCE0_CNT_1 0xDE035C445 446#define mmNIC4_QM0_CP_FENCE0_CNT_2 0xDE0360447 448#define mmNIC4_QM0_CP_FENCE0_CNT_3 0xDE0364449 450#define mmNIC4_QM0_CP_FENCE0_CNT_4 0xDE0368451 452#define mmNIC4_QM0_CP_FENCE1_CNT_0 0xDE036C453 454#define mmNIC4_QM0_CP_FENCE1_CNT_1 0xDE0370455 456#define mmNIC4_QM0_CP_FENCE1_CNT_2 0xDE0374457 458#define mmNIC4_QM0_CP_FENCE1_CNT_3 0xDE0378459 460#define mmNIC4_QM0_CP_FENCE1_CNT_4 0xDE037C461 462#define mmNIC4_QM0_CP_FENCE2_CNT_0 0xDE0380463 464#define mmNIC4_QM0_CP_FENCE2_CNT_1 0xDE0384465 466#define mmNIC4_QM0_CP_FENCE2_CNT_2 0xDE0388467 468#define mmNIC4_QM0_CP_FENCE2_CNT_3 0xDE038C469 470#define mmNIC4_QM0_CP_FENCE2_CNT_4 0xDE0390471 472#define mmNIC4_QM0_CP_FENCE3_CNT_0 0xDE0394473 474#define mmNIC4_QM0_CP_FENCE3_CNT_1 0xDE0398475 476#define mmNIC4_QM0_CP_FENCE3_CNT_2 0xDE039C477 478#define mmNIC4_QM0_CP_FENCE3_CNT_3 0xDE03A0479 480#define mmNIC4_QM0_CP_FENCE3_CNT_4 0xDE03A4481 482#define mmNIC4_QM0_CP_STS_0 0xDE03A8483 484#define mmNIC4_QM0_CP_STS_1 0xDE03AC485 486#define mmNIC4_QM0_CP_STS_2 0xDE03B0487 488#define mmNIC4_QM0_CP_STS_3 0xDE03B4489 490#define mmNIC4_QM0_CP_STS_4 0xDE03B8491 492#define mmNIC4_QM0_CP_CURRENT_INST_LO_0 0xDE03BC493 494#define mmNIC4_QM0_CP_CURRENT_INST_LO_1 0xDE03C0495 496#define mmNIC4_QM0_CP_CURRENT_INST_LO_2 0xDE03C4497 498#define mmNIC4_QM0_CP_CURRENT_INST_LO_3 0xDE03C8499 500#define mmNIC4_QM0_CP_CURRENT_INST_LO_4 0xDE03CC501 502#define mmNIC4_QM0_CP_CURRENT_INST_HI_0 0xDE03D0503 504#define mmNIC4_QM0_CP_CURRENT_INST_HI_1 0xDE03D4505 506#define mmNIC4_QM0_CP_CURRENT_INST_HI_2 0xDE03D8507 508#define mmNIC4_QM0_CP_CURRENT_INST_HI_3 0xDE03DC509 510#define mmNIC4_QM0_CP_CURRENT_INST_HI_4 0xDE03E0511 512#define mmNIC4_QM0_CP_BARRIER_CFG_0 0xDE03F4513 514#define mmNIC4_QM0_CP_BARRIER_CFG_1 0xDE03F8515 516#define mmNIC4_QM0_CP_BARRIER_CFG_2 0xDE03FC517 518#define mmNIC4_QM0_CP_BARRIER_CFG_3 0xDE0400519 520#define mmNIC4_QM0_CP_BARRIER_CFG_4 0xDE0404521 522#define mmNIC4_QM0_CP_DBG_0_0 0xDE0408523 524#define mmNIC4_QM0_CP_DBG_0_1 0xDE040C525 526#define mmNIC4_QM0_CP_DBG_0_2 0xDE0410527 528#define mmNIC4_QM0_CP_DBG_0_3 0xDE0414529 530#define mmNIC4_QM0_CP_DBG_0_4 0xDE0418531 532#define mmNIC4_QM0_CP_ARUSER_31_11_0 0xDE041C533 534#define mmNIC4_QM0_CP_ARUSER_31_11_1 0xDE0420535 536#define mmNIC4_QM0_CP_ARUSER_31_11_2 0xDE0424537 538#define mmNIC4_QM0_CP_ARUSER_31_11_3 0xDE0428539 540#define mmNIC4_QM0_CP_ARUSER_31_11_4 0xDE042C541 542#define mmNIC4_QM0_CP_AWUSER_31_11_0 0xDE0430543 544#define mmNIC4_QM0_CP_AWUSER_31_11_1 0xDE0434545 546#define mmNIC4_QM0_CP_AWUSER_31_11_2 0xDE0438547 548#define mmNIC4_QM0_CP_AWUSER_31_11_3 0xDE043C549 550#define mmNIC4_QM0_CP_AWUSER_31_11_4 0xDE0440551 552#define mmNIC4_QM0_ARB_CFG_0 0xDE0A00553 554#define mmNIC4_QM0_ARB_CHOISE_Q_PUSH 0xDE0A04555 556#define mmNIC4_QM0_ARB_WRR_WEIGHT_0 0xDE0A08557 558#define mmNIC4_QM0_ARB_WRR_WEIGHT_1 0xDE0A0C559 560#define mmNIC4_QM0_ARB_WRR_WEIGHT_2 0xDE0A10561 562#define mmNIC4_QM0_ARB_WRR_WEIGHT_3 0xDE0A14563 564#define mmNIC4_QM0_ARB_CFG_1 0xDE0A18565 566#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_0 0xDE0A20567 568#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_1 0xDE0A24569 570#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_2 0xDE0A28571 572#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_3 0xDE0A2C573 574#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_4 0xDE0A30575 576#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_5 0xDE0A34577 578#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_6 0xDE0A38579 580#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_7 0xDE0A3C581 582#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_8 0xDE0A40583 584#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_9 0xDE0A44585 586#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_10 0xDE0A48587 588#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_11 0xDE0A4C589 590#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_12 0xDE0A50591 592#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_13 0xDE0A54593 594#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_14 0xDE0A58595 596#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_15 0xDE0A5C597 598#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_16 0xDE0A60599 600#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_17 0xDE0A64601 602#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_18 0xDE0A68603 604#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_19 0xDE0A6C605 606#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_20 0xDE0A70607 608#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_21 0xDE0A74609 610#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_22 0xDE0A78611 612#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_23 0xDE0A7C613 614#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_24 0xDE0A80615 616#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_25 0xDE0A84617 618#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_26 0xDE0A88619 620#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_27 0xDE0A8C621 622#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_28 0xDE0A90623 624#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_29 0xDE0A94625 626#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_30 0xDE0A98627 628#define mmNIC4_QM0_ARB_MST_AVAIL_CRED_31 0xDE0A9C629 630#define mmNIC4_QM0_ARB_MST_CRED_INC 0xDE0AA0631 632#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_0 0xDE0AA4633 634#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_1 0xDE0AA8635 636#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_2 0xDE0AAC637 638#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_3 0xDE0AB0639 640#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_4 0xDE0AB4641 642#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_5 0xDE0AB8643 644#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_6 0xDE0ABC645 646#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_7 0xDE0AC0647 648#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_8 0xDE0AC4649 650#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_9 0xDE0AC8651 652#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_10 0xDE0ACC653 654#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_11 0xDE0AD0655 656#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_12 0xDE0AD4657 658#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_13 0xDE0AD8659 660#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_14 0xDE0ADC661 662#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_15 0xDE0AE0663 664#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_16 0xDE0AE4665 666#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_17 0xDE0AE8667 668#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_18 0xDE0AEC669 670#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_19 0xDE0AF0671 672#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_20 0xDE0AF4673 674#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_21 0xDE0AF8675 676#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_22 0xDE0AFC677 678#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_23 0xDE0B00679 680#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_24 0xDE0B04681 682#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_25 0xDE0B08683 684#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_26 0xDE0B0C685 686#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_27 0xDE0B10687 688#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_28 0xDE0B14689 690#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_29 0xDE0B18691 692#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_30 0xDE0B1C693 694#define mmNIC4_QM0_ARB_MST_CHOISE_PUSH_OFST_31 0xDE0B20695 696#define mmNIC4_QM0_ARB_SLV_MASTER_INC_CRED_OFST 0xDE0B28697 698#define mmNIC4_QM0_ARB_MST_SLAVE_EN 0xDE0B2C699 700#define mmNIC4_QM0_ARB_MST_QUIET_PER 0xDE0B34701 702#define mmNIC4_QM0_ARB_SLV_CHOISE_WDT 0xDE0B38703 704#define mmNIC4_QM0_ARB_SLV_ID 0xDE0B3C705 706#define mmNIC4_QM0_ARB_MSG_MAX_INFLIGHT 0xDE0B44707 708#define mmNIC4_QM0_ARB_MSG_AWUSER_31_11 0xDE0B48709 710#define mmNIC4_QM0_ARB_MSG_AWUSER_SEC_PROP 0xDE0B4C711 712#define mmNIC4_QM0_ARB_MSG_AWUSER_NON_SEC_PROP 0xDE0B50713 714#define mmNIC4_QM0_ARB_BASE_LO 0xDE0B54715 716#define mmNIC4_QM0_ARB_BASE_HI 0xDE0B58717 718#define mmNIC4_QM0_ARB_STATE_STS 0xDE0B80719 720#define mmNIC4_QM0_ARB_CHOISE_FULLNESS_STS 0xDE0B84721 722#define mmNIC4_QM0_ARB_MSG_STS 0xDE0B88723 724#define mmNIC4_QM0_ARB_SLV_CHOISE_Q_HEAD 0xDE0B8C725 726#define mmNIC4_QM0_ARB_ERR_CAUSE 0xDE0B9C727 728#define mmNIC4_QM0_ARB_ERR_MSG_EN 0xDE0BA0729 730#define mmNIC4_QM0_ARB_ERR_STS_DRP 0xDE0BA8731 732#define mmNIC4_QM0_ARB_MST_CRED_STS_0 0xDE0BB0733 734#define mmNIC4_QM0_ARB_MST_CRED_STS_1 0xDE0BB4735 736#define mmNIC4_QM0_ARB_MST_CRED_STS_2 0xDE0BB8737 738#define mmNIC4_QM0_ARB_MST_CRED_STS_3 0xDE0BBC739 740#define mmNIC4_QM0_ARB_MST_CRED_STS_4 0xDE0BC0741 742#define mmNIC4_QM0_ARB_MST_CRED_STS_5 0xDE0BC4743 744#define mmNIC4_QM0_ARB_MST_CRED_STS_6 0xDE0BC8745 746#define mmNIC4_QM0_ARB_MST_CRED_STS_7 0xDE0BCC747 748#define mmNIC4_QM0_ARB_MST_CRED_STS_8 0xDE0BD0749 750#define mmNIC4_QM0_ARB_MST_CRED_STS_9 0xDE0BD4751 752#define mmNIC4_QM0_ARB_MST_CRED_STS_10 0xDE0BD8753 754#define mmNIC4_QM0_ARB_MST_CRED_STS_11 0xDE0BDC755 756#define mmNIC4_QM0_ARB_MST_CRED_STS_12 0xDE0BE0757 758#define mmNIC4_QM0_ARB_MST_CRED_STS_13 0xDE0BE4759 760#define mmNIC4_QM0_ARB_MST_CRED_STS_14 0xDE0BE8761 762#define mmNIC4_QM0_ARB_MST_CRED_STS_15 0xDE0BEC763 764#define mmNIC4_QM0_ARB_MST_CRED_STS_16 0xDE0BF0765 766#define mmNIC4_QM0_ARB_MST_CRED_STS_17 0xDE0BF4767 768#define mmNIC4_QM0_ARB_MST_CRED_STS_18 0xDE0BF8769 770#define mmNIC4_QM0_ARB_MST_CRED_STS_19 0xDE0BFC771 772#define mmNIC4_QM0_ARB_MST_CRED_STS_20 0xDE0C00773 774#define mmNIC4_QM0_ARB_MST_CRED_STS_21 0xDE0C04775 776#define mmNIC4_QM0_ARB_MST_CRED_STS_22 0xDE0C08777 778#define mmNIC4_QM0_ARB_MST_CRED_STS_23 0xDE0C0C779 780#define mmNIC4_QM0_ARB_MST_CRED_STS_24 0xDE0C10781 782#define mmNIC4_QM0_ARB_MST_CRED_STS_25 0xDE0C14783 784#define mmNIC4_QM0_ARB_MST_CRED_STS_26 0xDE0C18785 786#define mmNIC4_QM0_ARB_MST_CRED_STS_27 0xDE0C1C787 788#define mmNIC4_QM0_ARB_MST_CRED_STS_28 0xDE0C20789 790#define mmNIC4_QM0_ARB_MST_CRED_STS_29 0xDE0C24791 792#define mmNIC4_QM0_ARB_MST_CRED_STS_30 0xDE0C28793 794#define mmNIC4_QM0_ARB_MST_CRED_STS_31 0xDE0C2C795 796#define mmNIC4_QM0_CGM_CFG 0xDE0C70797 798#define mmNIC4_QM0_CGM_STS 0xDE0C74799 800#define mmNIC4_QM0_CGM_CFG1 0xDE0C78801 802#define mmNIC4_QM0_LOCAL_RANGE_BASE 0xDE0C80803 804#define mmNIC4_QM0_LOCAL_RANGE_SIZE 0xDE0C84805 806#define mmNIC4_QM0_CSMR_STRICT_PRIO_CFG 0xDE0C90807 808#define mmNIC4_QM0_HBW_RD_RATE_LIM_CFG_1 0xDE0C94809 810#define mmNIC4_QM0_LBW_WR_RATE_LIM_CFG_0 0xDE0C98811 812#define mmNIC4_QM0_LBW_WR_RATE_LIM_CFG_1 0xDE0C9C813 814#define mmNIC4_QM0_HBW_RD_RATE_LIM_CFG_0 0xDE0CA0815 816#define mmNIC4_QM0_GLBL_AXCACHE 0xDE0CA4817 818#define mmNIC4_QM0_IND_GW_APB_CFG 0xDE0CB0819 820#define mmNIC4_QM0_IND_GW_APB_WDATA 0xDE0CB4821 822#define mmNIC4_QM0_IND_GW_APB_RDATA 0xDE0CB8823 824#define mmNIC4_QM0_IND_GW_APB_STATUS 0xDE0CBC825 826#define mmNIC4_QM0_GLBL_ERR_ADDR_LO 0xDE0CD0827 828#define mmNIC4_QM0_GLBL_ERR_ADDR_HI 0xDE0CD4829 830#define mmNIC4_QM0_GLBL_ERR_WDATA 0xDE0CD8831 832#define mmNIC4_QM0_GLBL_MEM_INIT_BUSY 0xDE0D00833 834#endif /* ASIC_REG_NIC4_QM0_REGS_H_ */835